JP2001292579A - Inverter - Google Patents

Inverter

Info

Publication number
JP2001292579A
JP2001292579A JP2000106178A JP2000106178A JP2001292579A JP 2001292579 A JP2001292579 A JP 2001292579A JP 2000106178 A JP2000106178 A JP 2000106178A JP 2000106178 A JP2000106178 A JP 2000106178A JP 2001292579 A JP2001292579 A JP 2001292579A
Authority
JP
Japan
Prior art keywords
reactor
circuit
connection point
series circuit
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2000106178A
Other languages
Japanese (ja)
Other versions
JP2001292579A5 (en
Inventor
Nobunaru Koga
宣考 古賀
Hiroshi Kirino
博士 桐野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaskawa Electric Corp
Original Assignee
Yaskawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaskawa Electric Corp filed Critical Yaskawa Electric Corp
Priority to JP2000106178A priority Critical patent/JP2001292579A/en
Publication of JP2001292579A publication Critical patent/JP2001292579A/en
Publication of JP2001292579A5 publication Critical patent/JP2001292579A5/ja
Abandoned legal-status Critical Current

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  • Rectifiers (AREA)
  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To control harmonics in the power supply and EMI noise in an inverter. SOLUTION: In a PWM inverter, a first capacitor serial circuit 7, in which one ends of a first DC reactor 2a inserted into the positive side of a linear bus in the output side of a rectifier circuit, a second DC reactor 2b inserted in the load of the DC bus and having an inductance identical to that of the first DC reactor 2a and a first capacitor serial circuit 7 are connected to the connecting point of the first EC reactor 2a and the rectifier circuit 1. The other ends thereof are connected to the connecting point side of the second DC reactor 2b and the connecting circuit, a second capacitor serial circuit 8, a connecting point at which two capacitors of the first capacitor serial circuit are connected and a connecting point, at which two capacitors of the second capacitor serial circuit are grounded.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、インバータ装置に
おける電源高調波およびEMIノイズを抑制する技術に
関する。
The present invention relates to a technique for suppressing power supply harmonics and EMI noise in an inverter device.

【0002】[0002]

【従来の技術】従来の電源高調波の抑制を目的とする直
流リアクトル内蔵形インバータ装置は図2のように構成
されている。同図において、21はダイオード整流回
路、22は直流リアクトル、23は平滑コンデンサ、2
4はインバータ部、25は突入電流抑制抵抗、26は突
入電流抑制抵抗短絡用コンタクタである。30は前述の
各構成要素を内蔵するインバータ装置でありR〜T、U
〜W等はインバータ装置に設けた外部端子である。
2. Description of the Related Art A conventional DC reactor built-in inverter for suppressing power supply harmonics is configured as shown in FIG. In the figure, 21 is a diode rectifier circuit, 22 is a DC reactor, 23 is a smoothing capacitor, 2
4 is an inverter unit, 25 is an inrush current suppression resistor, and 26 is an inrush current suppression resistor short circuit contactor. Reference numeral 30 denotes an inverter device incorporating the above-described components, and RT to T, U
WW and the like are external terminals provided in the inverter device.

【0003】[0003]

【発明が解決しようとする課題】ところが、従来技術で
は、直流リアクトルが整流出力の片側にしか接続されて
いないため、電源高調波の抑制には効果が有るものの、
EMIノイズに対してはほとんど効果がなかった。本発
明はこのような問題点に鑑みてなされたものであり、P
WMインバータ装置が発生するEMIノイズと電源高調
波の両方を低減することを目的とする。
However, in the prior art, since the DC reactor is connected to only one side of the rectified output, it is effective in suppressing power supply harmonics.
There was almost no effect on EMI noise. The present invention has been made in view of such a problem, and P
An object is to reduce both EMI noise and power supply harmonics generated by a WM inverter device.

【0004】[0004]

【課題を解決するための手段】上記問題を解決するた
め、請求項1記載の発明はPWMインバータ装置におい
て、整流回路出力側の直線母線の正側に挿入される第1
の直流リアクトルと、前記直流母線の負荷に挿入され、
前記第1の直流リアクトルと同一のインダクタンスを有
する第2の直流リアクトルと、容量の等しい2つのコン
デンサを直列接続した2つの回路を各々第1コンデンサ
直列回路、第2コンデンサ直列回路とし、前記第1コン
デンサ直列回路の一端を第1の直流リアクトルと整流回
路との接続点側に接続し、他端を第2の直流リアクトル
と接続回路との接続点側に接続した第1コンデンサ直列
回路と、前記第2コンデンサ直列回路の一端を第1直流
リアクトルと平滑コンデンサの正極との接続点側に接続
し、他端を第2直流リアクトルと平滑コンデンサの負極
との接続点側に接続した第2コンデンサ直列回路と、前
記第1コンデンサ直列回路中で2つのコンデンサを接続
した接続点と前記第2コンデンサ直列回路中で2つのコ
ンデンサを接続した接続点を接地したものである。ま
た、請求項2記載の発明は前記第1コンデンサ直列回路
中の前記接続点と前記第2コンデンサ直列回路中の前記
接続点とを共に回路の基準電位に接続したものである。
また、請求項3記載の発明は前記第1の直流リアクトル
と第2の直流リアクトルが、これらリアクトルを流れる
直流電流が作る磁束を打ち消す方向に永久磁石を設けた
永久磁石内蔵型直流リアクトルとしたものである。
According to a first aspect of the present invention, there is provided a PWM inverter having a first rectifying circuit having a first side inserted on a positive side of a linear bus on the output side.
DC reactor, and inserted into the load of the DC bus,
A second DC reactor having the same inductance as the first DC reactor and two circuits in which two capacitors having the same capacitance are connected in series are referred to as a first capacitor series circuit and a second capacitor series circuit, respectively. A first capacitor series circuit having one end connected to a connection point between the first DC reactor and the rectifier circuit and the other end connected to a connection point between the second DC reactor and the connection circuit; A second capacitor series circuit in which one end of the second capacitor series circuit is connected to the connection point between the first DC reactor and the positive electrode of the smoothing capacitor, and the other end is connected to the connection point side between the second DC reactor and the negative electrode of the smoothing capacitor. A circuit, a connection point connecting two capacitors in the first capacitor series circuit, and a connection point connecting two capacitors in the second capacitor series circuit. It is obtained by grounding the connection point. According to a second aspect of the present invention, the connection point in the first capacitor series circuit and the connection point in the second capacitor series circuit are both connected to a reference potential of the circuit.
According to a third aspect of the present invention, the first DC reactor and the second DC reactor are DC reactors with built-in permanent magnets in which permanent magnets are provided in such a direction as to cancel a magnetic flux generated by a DC current flowing through the reactors. It is.

【0005】[0005]

【発明の実施の形態】図1は本発明のインバータ装置の
パワー部の構成を示す回路ブロック図である。同図にお
いて、1は交流電圧を直流電圧に変換するダイオード整
流回路、2a、2bは分割して配置された等しいインダ
クタンス値をもつ直流リアクトル、3は平滑コンデン
サ、4はインバータ部である。インバータ部4はIGB
Tからなり図示しない制御回路から出力されるゲートド
ライブ信号に基づいてPWM駆動される。5は突入電流
抑制抵抗、6は突入電流抑制抵抗短絡用コンタクタ、C
1〜C4はコンデンサである。7、8は各々容量の等し
い2つのコンデンサを直列接続した第1、第2コンデン
サ直列回路である。10は前述の各構成要素を内蔵する
インバータ装置でありR〜T、U〜W等はインバータ装
置に設けた外部端子である。R〜Tは三相交流電流に、
U〜Wは電動機等の負荷に接続される。Gは回路基準電
位であるグランドであり、通常インバータ装置10の筐
体に接続される。この回路基準電位Gは必ずしも接地
(アース)しなくても使用できるが、接地した方がより
効果的である。
FIG. 1 is a circuit block diagram showing a configuration of a power section of an inverter device according to the present invention. In the figure, 1 is a diode rectifier circuit for converting an AC voltage to a DC voltage, 2a and 2b are DC reactors having the same inductance value and divided, 3 is a smoothing capacitor, and 4 is an inverter unit. Inverter unit 4 is IGB
It is driven by PWM based on a gate drive signal composed of T and output from a control circuit (not shown). 5 is an inrush current suppression resistor, 6 is an inrush current suppression resistor short-circuiting contactor, C
1 to C4 are capacitors. Reference numerals 7 and 8 denote first and second capacitor series circuits in which two capacitors having the same capacity are connected in series. Reference numeral 10 denotes an inverter device incorporating the above-described components, and RT to U, U to W, and the like are external terminals provided in the inverter device. R to T are three-phase AC currents,
U to W are connected to loads such as electric motors. G is a ground which is a circuit reference potential, and is normally connected to the housing of the inverter device 10. The circuit reference potential G can be used without necessarily being grounded (grounded), but grounding is more effective.

【0006】次に動作を説明する。三相交流電源電圧は
ダイオード整流回路1により整流される。整流された電
圧は直流母線の正側、負側に各々設けられた直流リアク
トル2a、2bとコンデンサC1〜C4からなる平衡し
たLCフィルタおよび、整流された直流電圧のリップル
を平滑する平滑コンデンサ3を介して電源高調波は直流
2a、2bでまず抑制される。インバータ部へ直流電圧
が供給される。インバータ部4ではIGBTをスイッチ
ングすることで、可変電圧可変周波の交流電圧を負荷へ
供給する。インバータ部4で発生させた交流電圧波形は
PWMによる電圧のため、キャリア周波数以上の高周波
ノイズからなるEMIノイズが負荷側と電源側に放出さ
れる。電源側に放出されたEMIノイズは、直流母線の
正側とグランド端子G間の直流リアクトル2とコンデン
サC1、C3からなる直流母線の正側の合成インピーダ
ンスを通して、または直流母線の負側とグランド端子G
間の直流リアクトル2とコンデンサC2、C4からなる
直流母線の負側の合成インピーダンスを通してグランド
端子Gへ導かれる。
Next, the operation will be described. The three-phase AC power supply voltage is rectified by the diode rectifier circuit 1. The rectified voltage is supplied to a balanced LC filter including DC reactors 2a and 2b and capacitors C1 to C4 provided on the positive and negative sides of the DC bus, and a smoothing capacitor 3 for smoothing the ripple of the rectified DC voltage. Power supply harmonics are first suppressed by the direct currents 2a and 2b. DC voltage is supplied to the inverter unit. The inverter unit 4 switches the IGBT to supply a variable voltage / variable frequency AC voltage to the load. Since the AC voltage waveform generated by the inverter unit 4 is a voltage based on PWM, EMI noise composed of high-frequency noise equal to or higher than the carrier frequency is emitted to the load side and the power supply side. The EMI noise emitted to the power supply side passes through the combined impedance on the positive side of the DC bus composed of the DC reactor 2 and the capacitors C1 and C3 between the positive side of the DC bus and the ground terminal G, or the negative side of the DC bus and the ground terminal. G
It is led to the ground terminal G through the combined impedance on the negative side of the DC bus composed of the DC reactor 2 and the capacitors C2 and C4 between them.

【0007】これら合成インピーダンスは互いに等しい
インピーダンスをもつように、直流リアクトル2a、2
bのインダクタンスを同一とし、コンデンサC1とC2
およびC3とC4の容量を同一としている。このためグ
ランドGと直流母線の正負間の合成インピーダンスを平
衡させることができ、EMIノイズを効果的に低減でき
る。直流リアクトル2a、2bはインバータ装置10に
内蔵できるように小型のものを使用した方が望ましい。
このために永久磁石を磁気回路に用いて、直流電流が作
る磁束を打ち消す方向にバイアス起磁力を与えた永久磁
石内蔵型直流リアクトルを適用するとインバータ装置を
小型軽量することができる。
[0007] The DC reactors 2a, 2a and 2a are combined so that their combined impedances are equal to each other.
b and the capacitors C1 and C2
And C3 and C4 have the same capacity. Therefore, the combined impedance between the ground G and the positive and negative DC buses can be balanced, and EMI noise can be effectively reduced. It is desirable to use small DC reactors 2a and 2b so that they can be built into inverter device 10.
For this reason, if a permanent magnet is used in a magnetic circuit and a permanent magnet built-in type DC reactor that applies a bias magnetomotive force in a direction to cancel a magnetic flux generated by a direct current is applied, the inverter device can be reduced in size and weight.

【0008】[0008]

【発明の効果】本発明によれば、直流リアクトルを分割
して配置し、該直流リアクトルの両端とアース間にコン
デンサを接続することで、電源高調波を抑制するととも
に、外部にEMIフィルタを接続すること無しに、小さ
なスペースかつ低コストでEMIノイズを抑制すること
ができる。
According to the present invention, a DC reactor is divided and arranged, and a capacitor is connected between both ends of the DC reactor and ground, thereby suppressing power supply harmonics and connecting an external EMI filter. Without doing so, EMI noise can be suppressed in a small space and at low cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のインバータ装置の構成を示す回路ブロ
ック図
FIG. 1 is a circuit block diagram showing a configuration of an inverter device according to the present invention.

【図2】従来の直流リアクトル内蔵形インバータ装置の
構成を示す回路ブロック図
FIG. 2 is a circuit block diagram showing a configuration of a conventional inverter device incorporating a DC reactor.

【符号の説明】[Explanation of symbols]

1、21 ダイオード整流回路 2a、2b、22 直流リアクトル 3、23 平滑コンデンサ 4、24 インバータ部 5、25 突入電流抑制抵抗 6、26 突入電流抑制用コンタクタ 7 第1コンデンサ直列回路 8 第2コンデンサ直列回路 10、30 インバータ装置 C1、C2、C3、C4 コンデンサ G グランド 1, 21 Diode rectifier circuit 2a, 2b, 22 DC reactor 3, 23 Smoothing capacitor 4, 24 Inverter section 5, 25 Inrush current suppression resistor 6, 26 Inrush current suppression contactor 7 First capacitor series circuit 8 Second capacitor series circuit 10, 30 Inverter device C1, C2, C3, C4 Capacitor G Ground

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H02M 7/06 H02M 7/06 H Fターム(参考) 5H006 AA01 AA07 CA07 CB01 CC08 FA02 GA01 HA83 HA84 5H007 AA01 AA08 CA01 CB05 CC01 FA03 FA12 GA03 HA02 5H740 BA11 BA18 BB05 BB08 MM12 NN02 NN06 PP02 PP10 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H02M 7/06 H02M 7/06 HF term (Reference) 5H006 AA01 AA07 CA07 CB01 CC08 FA02 GA01 HA83 HA84 5H007 AA01 AA08 CA01 CB05 CC01 FA03 FA12 GA03 HA02 5H740 BA11 BA18 BB05 BB08 MM12 NN02 NN06 PP02 PP10

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 PWMインバータ装置において、 整流回路出力側の直線母線の正側に挿入される第1の直
流リアクトルと、前記直流母線の負荷に挿入され、前記
第1の直流リアクトルと同一のインダクタンスを有する
第2の直流リアクトルと、 容量の等しい2つのコンデンサを直列接続した2つの回
路を各々第1コンデンサ直列回路、第2コンデンサ直列
回路とし、前記第1コンデンサ直列回路の一端を第1の
直流リアクトルと整流回路との接続点側に接続し、他端
を第2の直流リアクトルと接続回路との接続点側に接続
した第1コンデンサ直列回路と、 前記第2コンデンサ直列回路の一端を第1直流リアクト
ルと平滑コンデンサの正極との接続点側に接続し、他端
を第2直流リアクトルと平滑コンデンサの負極との接続
点側に接続した第2コンデンサ直列回路と、 前記第1コンデンサ直列回路中で2つのコンデンサを接
続した接続点と前記第2コンデンサ直列回路中で2つの
コンデンサを接続した接続点を接地したことを特徴とす
るインバータ装置。
In a PWM inverter device, a first DC reactor inserted on the positive side of a straight bus on the output side of a rectifier circuit, and an inductance same as that of the first DC reactor inserted into a load of the DC bus. And two circuits in which two capacitors of equal capacity are connected in series as a first capacitor series circuit and a second capacitor series circuit, respectively, and one end of the first capacitor series circuit is connected to a first DC A first capacitor series circuit connected to a connection point between the reactor and the rectifier circuit and the other end connected to a connection point between the second DC reactor and the connection circuit; A second terminal connected to the connection point between the DC reactor and the positive electrode of the smoothing capacitor and the other end connected to the connection point between the second DC reactor and the negative electrode of the smoothing capacitor An inverter device comprising: a capacitor series circuit; and a connection point connecting two capacitors in the first capacitor series circuit and a connection point connecting two capacitors in the second capacitor series circuit.
【請求項2】 前記第1コンデンサ直列回路中の前記接
続点と前記第2コンデンサ直列回路中の前記接続点とを
共に回路の基準電位に接続したものである請求項1記載
のインバータ装置。
2. The inverter device according to claim 1, wherein the connection point in the first capacitor series circuit and the connection point in the second capacitor series circuit are both connected to a reference potential of the circuit.
【請求項3】 前記第1の直流リアクトルと第2の直流
リアクトルが、これらリアクトルを流れる直流電流が作
る磁束を打ち消す方向に永久磁石を設けた永久磁石内蔵
型直流リアクトルである請求項1記載のインバータ装
置。
3. The DC reactor according to claim 1, wherein the first DC reactor and the second DC reactor are DC reactors with built-in permanent magnets provided with permanent magnets in a direction to cancel a magnetic flux generated by a DC current flowing through the reactors. Inverter device.
JP2000106178A 2000-04-07 2000-04-07 Inverter Abandoned JP2001292579A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000106178A JP2001292579A (en) 2000-04-07 2000-04-07 Inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000106178A JP2001292579A (en) 2000-04-07 2000-04-07 Inverter

Publications (2)

Publication Number Publication Date
JP2001292579A true JP2001292579A (en) 2001-10-19
JP2001292579A5 JP2001292579A5 (en) 2007-05-17

Family

ID=18619399

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000106178A Abandoned JP2001292579A (en) 2000-04-07 2000-04-07 Inverter

Country Status (1)

Country Link
JP (1) JP2001292579A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013219920A (en) * 2012-04-09 2013-10-24 Mitsubishi Electric Corp Power conversion device
WO2015107639A1 (en) * 2014-01-15 2015-07-23 三菱電機株式会社 Inverter device and air conditioner using inverter device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013219920A (en) * 2012-04-09 2013-10-24 Mitsubishi Electric Corp Power conversion device
WO2015107639A1 (en) * 2014-01-15 2015-07-23 三菱電機株式会社 Inverter device and air conditioner using inverter device
GB2536589A (en) * 2014-01-15 2016-09-21 Mitsubishi Electric Corp Inverter device and air conditioner using inverter device
JPWO2015107639A1 (en) * 2014-01-15 2017-03-23 三菱電機株式会社 Inverter device and air conditioner using inverter device

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