JP2001257248A - Device and method for machining semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device and method for machining a semiconductor water that increases the transverse rupture strength of a semiconductor wafer for preventing damage, and improves a machining yield. SOLUTION: In machining where the semiconductor wafer is thinned to target thickness, a polishing part 6, a wafer-washing part 10, and plasma treatment parts 4A and 4B are provided. The polishing part 6 polishes a side opposite to the circuit formation surface of the semiconductor wafer. The wafer- washing part 10 washes the semiconductor wafer after polishing. The plasma treatment parts 4A and 4B allow the semiconductor wafer after washing to be subjected to dry etching by plasma treatment. Also, a wafer-carrying-out part 9B and a wafer conveyance part 3 are provided. The wafer-carrying-out part 9B transfers the semiconductor wafer after polishing to the wafer-washing part 10, and the wafer conveyance part 3 transfers the semiconductor wafer after washing to the plasma treatment parts 4A and 4B, thus separately performing conveyance before/after washing, hence preventing foreign objects from adhering to the semiconductor wafer after washing for positively carrying out dry etching, and hence improving the transverse rupture strength of the semiconductor wafer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer processing apparatus and method for thinning a semiconductor wafer.

[0002]

2. Description of the Related Art In a manufacturing process of a semiconductor wafer used for a semiconductor device, a polishing process is performed to reduce the thickness of the semiconductor wafer as the semiconductor device becomes thinner. This polishing is performed by forming a circuit pattern on the front surface of the semiconductor wafer and then mechanically polishing the back surface opposite to the circuit formation surface. On the surface of the silicon substrate after mechanical polishing, there is a layer (microcrack-introduced layer) embrittled by microcracks formed by processing.

Since the microcracks impair the bending strength of the silicon substrate, it is necessary to remove the microcrack-introduced layer on the silicon surface after mechanical polishing. For this reason,
Conventionally, a semiconductor wafer after mechanical polishing has been dry-etched by plasma processing to remove the microcrack-introduced layer, and a series of thinning equipment combining a polishing apparatus with a dry-etching apparatus has been employed. I have.

[0004]

However, the semiconductor wafer after polishing is in a state where foreign substances such as silicon powder and abrasive grains removed by polishing are attached. When dry etching is performed by sending to a dry etching apparatus by plasma processing in a state in which the foreign matter remains attached, the portion where the foreign matter is attached may be interrupted by the foreign matter, and the plasma may not be sufficiently etched. is there. As a result, the microcrack-introduced layer is not completely removed, so that the bending strength of the semiconductor wafer is not improved.

Accordingly, an object of the present invention is to provide a semiconductor wafer processing apparatus and a processing method capable of improving the bending strength of a semiconductor wafer to prevent breakage and improving the processing yield.

[0006]

According to a first aspect of the present invention, there is provided an apparatus for processing a semiconductor wafer, comprising: polishing a surface of the semiconductor wafer by mechanical polishing; An apparatus for processing a semiconductor wafer for thinning, comprising: polishing means for mechanically polishing the semiconductor wafer; cleaning means for cleaning the polished semiconductor wafer; and dry etching means for dry-etching the cleaned semiconductor wafer. And a pre-cleaning transfer means for taking out the polished semiconductor wafer from the polishing means and transferring it to the cleaning means, and a post-cleaning transfer means for taking out the cleaned semiconductor wafer from the cleaning means and transferring it to the dry etching means.

According to a second aspect of the present invention, there is provided a semiconductor wafer processing method for thinning a semiconductor wafer to a target thickness, wherein the opposite side of a circuit forming surface of the semiconductor wafer is polished by mechanical polishing. Carrying out the process, taking out the polished semiconductor wafer by the pre-cleaning transfer means and transferring it to the cleaning means, cleaning the transferred semiconductor wafer by the cleaning means, and taking out the cleaned semiconductor wafer by the post-cleaning transfer means Transfer to the dry etching means, and dry etching the transferred semiconductor wafer by the dry etching means.

According to the present invention, there is provided a polishing means for polishing a semiconductor wafer, a cleaning means for cleaning the polished semiconductor wafer, and a dry etching means for dry-etching the cleaned semiconductor wafer. By providing transport means for individually transporting the wafer and transporting the semiconductor wafer after cleaning, it is possible to prevent foreign substances from adhering to the semiconductor wafer after cleaning and perform dry etching in a good state. The bending strength of the wafer can be improved.

[0009]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a perspective view of a semiconductor wafer processing apparatus according to one embodiment of the present invention, FIG. 2 is a plan view of a semiconductor wafer processing apparatus according to one embodiment of the present invention, and FIGS. FIG. 5 is a perspective view of a wafer storage unit of the semiconductor wafer processing apparatus according to the embodiment; FIG. 5 is a partial plan view of the semiconductor wafer processing apparatus according to one embodiment of the present invention; Side view of a polishing unit of a wafer processing apparatus,
7 is a cross-sectional view of a wafer cleaning unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention, FIG. 8 is a cross-sectional view of a plasma processing unit of the semiconductor wafer processing apparatus of one embodiment of the present invention,
9 and 10 are process explanatory views of a method for processing a semiconductor wafer according to one embodiment of the present invention, and FIG. 11 is a flow chart of semiconductor wafer cleaning in the method for processing a semiconductor wafer according to one embodiment of the present invention.

First, the overall structure of a semiconductor wafer processing apparatus will be described with reference to FIGS. 1 and 2,
In the first half 1a of the upper surface of the base unit 1, the wafer storage unit 2 and the first plasma processing unit 4
A, a second plasma processing unit 4B, a pre-center unit 5, and a wafer cleaning unit 10 are arranged radially.

The wafer storage unit 2 stores the semiconductor wafer 11 before and after processing. That is, the wafer storage unit 2 is a storage unit for the semiconductor wafer 11. The first plasma processing unit 4A and the second plasma processing unit 4B dry-etch the surface of the semiconductor wafer 11 by an etching action of plasma generated under a reduced pressure atmosphere. Therefore, the first plasma processing section 4A and the second plasma processing section 4B are dry etching means for the semiconductor wafer 11.

The pre-center unit 5 performs a pre-center operation for pre-positioning the semiconductor wafer 11 to be transferred to a polishing unit 6 described later. The wafer cleaning unit 10 cleans the semiconductor wafer 11 polished by the polishing unit 6 with a cleaning liquid. That is, the wafer cleaning unit 10 is a cleaning unit for the semiconductor wafer 11.

A polishing section 6 is provided on the rear half 1b of the upper surface of the base section 1. The polishing unit 6 includes a wall 6a erected on the upper surface of the base 1, and a first polishing unit 8A and a second polishing unit 8B are disposed on the front side surface of the wall 6a. The first polishing unit 8A and the second polishing unit 8B perform rough polishing and finish polishing of the semiconductor wafer 11, respectively. That is, the polishing section 6 is a polishing means for mechanically polishing the semiconductor wafer 11. A turntable 7 is disposed below the first polishing unit 8A and the second polishing unit 8B, surrounded by the combing 6b. The turntable 7 rotates by an index, holds the semiconductor wafer 11 to be polished, and holds the first polishing unit 8A.
And the second polishing unit 8B.

In front of the polishing section 6, a wafer loading section 9 is provided.
A, a wafer unloading section 9B is provided. The wafer carry-in section 9A carries the semiconductor wafer 11 aligned in the pre-center section 5 into the polishing section 6. The wafer carrying-out section 9B carries out the mechanically polished semiconductor wafer 11 from the polishing section 6.
Therefore, the above-described wafer transport unit 3 and wafer loading unit 9
A, the wafer unloading section 9B includes the polishing section 6, the wafer cleaning section 1
0, the semiconductor wafer 11 is transferred between the first plasma processing unit 4A and the second plasma processing unit 4B, the semiconductor wafer 11 is supplied to the polishing unit 6, and the first plasma processing unit 4A or the second It serves as a wafer handling unit for taking out the semiconductor wafer 11 after the dry etching from the plasma processing unit 4B.

Hereinafter, the configuration and function of each section will be sequentially described. As shown in FIGS. 1 and 2, the wafer storage section 2 includes two magazines 2A and 2B for storing wafers. The magazines 2A and 2B store a large number of semiconductor wafers 11 to be thinned. As shown in FIGS. 3 and 4, the magazines 2 </ b> A and 2 </ b> B have a structure in which shelf members 13 are provided in multiple stages inside a housing 12, and a semiconductor wafer 11 is placed on the shelf members 13.

The semiconductor wafer 11 contains silicon as a main component, and has a plurality of semiconductor elements. A protective film 11a is formed on the circuit formation surface of the semiconductor wafer 11 (see FIG. 10B). The protective film 11a has a function of protecting the circuit pattern of the semiconductor wafer 11 and reinforcing the semiconductor wafer 11 to improve the bending strength. When the semiconductor wafer 11 is stored in the magazines 2A and 2B, the shelf member 1 is placed with the protective film 11a facing upward.
3 is placed.

In FIG. 2, a wafer transfer section 3 is provided in a recess 1c formed in the center of the first half 1a. On the base member 3a of the wafer transfer section 3, a robot mechanism of a polar coordinate system is provided. The base member 3a can be turned 360 degrees on the base part 1 by a drive mechanism (not shown), and the direction of the robot mechanism can be freely controlled.

The robot mechanism includes a first swing arm 14a extending in a lateral direction with respect to an arm shaft (not shown) which can be vertically extended and retracted on a base member 3a, and a second swing arm 14b. The second rotating arm 14b is connected to the wafer holding unit 17 at the distal end thereof.
The wafer holding unit 17 has a suction hole 17a on its upper surface.
A crotch fork-like member 17b (see FIG. 4);
It is rotated about an axis by the hand rotation mechanism 15 and the inclination of the wafer holding unit 17 is controlled by the wrist mechanism 16. Further, by turning the first turning arm 14a and the second turning arm 14b, the wafer holder 17 can be moved forward and backward in the horizontal direction.

By driving each part of the robot mechanism, the wafer holding unit 17 can store the wafers such as the magazines 2A and 2B, the first plasma processing unit 4A, the second plasma processing unit 4B, the pre-center unit 5, and the wafer cleaning unit 10. Move to the delivery target. Then, the semiconductor wafer 11 is held by the wafer holding unit 17 and the semiconductor wafer 11 is transferred between the respective parts to be transferred.

That is, the wafer holding portion 17 can be turned in any direction by turning the base member 3a.
The swivel arm 14a and the second swivel arm 14b allow the wafer holding unit 17 to move forward in the horizontal direction to access the respective parts to be transferred. By driving the hand rotation mechanism 15, the wafer holding unit 1
The semiconductor wafer 11 (see FIG. 4), which is sucked and held by the suction holes 17a on the wafer 7, is turned upside down, and by driving an arm shaft (not shown), the wafer holding unit 17 moves up and down. As described above, by adopting a configuration in which the respective parts to be transferred are radially arranged around the wafer transfer unit 3 using the robot mechanism of the polar coordinate system, a plurality of wafer transfer targets can be transferred by a single robot mechanism. A compact processing apparatus for the semiconductor wafer 11 that can be covered and has excellent work efficiency is realized.

The operation of taking out and storing the semiconductor wafer 11 from the magazines 2A and 2B by the wafer holder 17 will now be described. At the time of unloading, as shown in FIG. 3, the wafer holding unit 17 is inserted up to above the semiconductor wafer 11 stored in the magazine 2A (2B) with the suction hole 17a facing downward. Next, the wafer holding unit 1
The semiconductor wafer 11 is lowered and brought into contact with the upper surface of the semiconductor wafer 11, and in this state, the semiconductor wafer 11 is suction-held on the lower surface of the wafer holding portion 17 by vacuum suction from the suction holes 17 a. Thereafter, when the wafer holding unit 17 is raised again and pulled out of the magazine 2A (2B), the semiconductor wafer 11 is taken out while being held by suction on the lower surface of the wafer holding unit 17.

FIG. 4 shows a semiconductor wafer 11 in a magazine 2A.
(2B) shows the storing operation of returning the inside. In this storing operation, the semiconductor wafer 1 sucked and held from the upper surface side by the wafer holding unit 17 with the thinned surface facing upward.
1 is turned upside down by rotating the wafer holding unit 17 around an axis, and is stored in the magazine 2A (2B) with the protective film 11a facing upward. At this time, the same semiconductor wafer 11 is returned to the same position stored before processing.

This return is carried out by inserting the wafer holder 17 holding the semiconductor wafer 11 on the upper surface into the magazine 2A (2B), then releasing the vacuum suction and lowering the wafer holder 17. That is, in this lowering operation, as shown in FIG. 4, the fork-like member 17 b of the wafer holding unit 17 passes through the notch 13 a downward with the semiconductor wafer 11 placed on the shelf member 13. Then, the storage of the semiconductor wafer 11 is completed by pulling the wafer holding unit 17 out of the magazine.

Next, the pre-center unit 5 will be described with reference to FIG. The pre-center unit 5 is for positioning the semiconductor wafer 11 supplied to the polishing unit 6 in advance. In FIG. 5, a pre-center unit 5 is a circular mounting table 20.
It has. On the upper surface of the mounting table 20, there is formed a removed portion 21 (see hatched portion) whose upper surface is partially removed corresponding to the shape of the wafer holding portion 17, and the depth of the removed portion 21 is equal to the removed portion 21. The depth is set so that the wafer holding unit 17 can be accommodated therein.

The loading of the semiconductor wafer 11 into the pre-center unit 5 is performed as follows. First, the wafer holding unit 17 holding the semiconductor wafer 11 on the upper surface side is placed on the mounting table 20.
The horizontal position of the wafer holding unit 17 is moved upward to remove unit 2.
After that, the wafer holding unit 17 is lowered to a height position where the wafer holding unit 17 is accommodated in the removing unit 21. Thereby, the semiconductor wafer 11 is mounted on the mounting table 20. Thereafter, the wafer holding unit 17 is retracted from the inside of the removing unit 21 to complete the loading of the semiconductor wafer 11.

The mounting table 20 is provided with a plurality of groove portions 22 radially toward the center at equal positions at 120 degrees, and each groove portion 22 is positioned so as to be movable in the groove direction. The claw 22a is provided. By moving the positioning claw 22a toward the center of the mounting table 20 while the semiconductor wafer 11 is mounted on the mounting table 20, the semiconductor wafer 11 is aligned with the center position of the mounting table 20. Is done. That is, the pre-center unit 5
This is a mounting section for mounting and positioning the semiconductor wafer 11 supplied to the polishing section 6.

The wafer loading section 9 is adjacent to the pre-center section 5.
A is provided. As shown in FIG. 5, the wafer carrying-in section 9A is configured by attaching a suction head 25A to a distal end of a transfer arm 24A that is turned and moved up and down by an arm driving mechanism 23. When the suction head 25A is moved over the semiconductor wafer 11 in the pre-center section 5 and lowered, the suction head 25A suction-holds the semiconductor wafer 11. Thereafter, the semiconductor wafer 11 is carried into the polishing unit 6 by moving the transfer arm 24A upward and turning in the direction of the polishing unit 6, and moves to a wafer delivery station (described later).

Next, the polishing section 6 will be described with reference to FIGS. The polishing section 6 will be described with reference to FIGS. As shown in FIGS. 2 and 6, a turntable 7 is provided on the upper surface of the base 1. The turntable 7 can be rotated around the center axis by an index.
Three chuck tables 7a are provided at equally spaced positions at 120 degrees as index positions.

Each chuck table 7a receives the semiconductor wafer 11 from the transfer arm 24A of the wafer loading section 9A at the wafer transfer station (the index position on the left side in FIG. 6). Chuck table 7a
The semiconductor wafer 11 adsorbs and holds the semiconductor wafer 11 on its upper surface, and is rotatable about the axis.

A first polishing unit 8A and a second polishing unit 8B are provided on the side surface of the wall 6a erected at the right end of the upper surface of the base unit 1. First polishing unit 8
A, the horizontal arrangement of the second polishing unit 8B corresponds to the index position of the turntable 7, respectively, and the lower index position of the first polishing unit 8A and the second polishing unit 8B is Each has a rough polishing station and a finish polishing station.

Each of the first polishing unit 8A and the second polishing unit 8B has a rotation drive unit 30 at the lower part. On the lower surface of the rotation drive unit 30, grindstones 31A and 31B for rough polishing or finish polishing for polishing the semiconductor wafer 11 are mounted. A grindstone of about # 500 is used for rough polishing, and generally # 3000 to # 4000 for finish polishing.
Is used. These first polishing units 8
A, the second polishing unit 8B is moved up and down by a built-in vertical movement mechanism.

As shown in FIG. 6, the chuck table 7a holding the semiconductor wafer 11 is moved to the first polishing unit 8A.
The grinding wheel 31A is moved to the index position (polishing position) below the (or second polishing unit 8B).
(Or 31B) is lowered and brought into contact with the upper surface of the semiconductor wafer 11, and the grindstone 31A (or 31B) is rotated by the rotation drive unit 30, whereby the semiconductor wafer 11 is rotated.
Is polished.

When the chuck table 7a is located at a polishing position below the first polishing unit 8A and the second polishing unit 8B, the chuck table 7a is rotated by a driving mechanism (not shown). I have. The rotation of the chuck table 7a and the grinding wheel 31
By combining the rotations of A and 31B, the upper surface of the semiconductor wafer 11 is uniformly polished without bias during polishing.

During this polishing, a polishing liquid is supplied to the polishing surface of the semiconductor wafer 11 by a polishing liquid supply means (not shown). The polishing liquid is accumulated in the combing 6b provided on the upper surface of the base 1 and surrounding the turntable 7, and is led out. The polished semiconductor wafer 11 moves to the wafer delivery position by moving the chuck table 7a by the index rotation of the turntable 7, and then moves the transfer arm 2 of the wafer unloading section 9B.
It is carried out by 4B.

Next, the structure of the wafer cleaning section 10 will be described with reference to FIG. In FIG. 7 showing a cross section taken along the line BB in FIG. 2, an opening 35a is formed in the upper part of the box-shaped cleaning frame 35 by partially cutting out the front surface and two side surfaces.
Is provided. The opening 35a is provided in the semiconductor wafer 11
Is large enough to allow the wafer carry-out section 9B holding the same to enter and exit. An opening 35c for drainage and a bearing boss 3 having a shape projecting upward are provided on the bottom 35b of the cleaning frame 35.
5d is provided. A bearing 38 is fitted in the bearing boss 35d, and a rotation support portion 40 is coupled to an upper portion of a vertical shaft portion 39 supported by the bearing 38.

A plurality of suction holes 40a are provided on the horizontal upper surface of the rotation support portion 40, and the suction holes 40a
It communicates with the suction hole 39a provided in the inside. When the semiconductor wafer 11 is placed on the upper surface of the rotary support part 40, the suction control part 46 connected to the suction hole 39a is driven to perform vacuum suction from the suction hole 39a, so that the semiconductor wafer 11
Is sucked and held on the upper surface of the rotation support section 40.

A pulley 41 is connected to a lower portion of the shaft portion 39, and a pulley 43 connected to a rotating shaft 44a of a motor 44 and a belt 42 are tuned to the pulley 41. The motor 44 is driven by a motor drive unit 45.
By driving the motor 44, the shaft 39 rotates, and therefore the semiconductor wafer 11 held by the rotation support 40 is rotated.
Spins.

A cylindrical cover 36 surrounding the semiconductor wafer 11 is mounted inside the cleaning frame 35 so as to be vertically movable. A flange 36 a provided on the top of the cover 36 has a flange 36 a. , The rod 37a of the cylinder 37 is connected. By driving the cylinder 37,
The cover 36 moves up and down. In a state where the cover 36 is raised, the flange 36 a is at a position in contact with the ceiling surface of the cleaning frame 35, and the opening 35 a is closed by the cover 36.

A cleaning liquid nozzle 47 and an air nozzle 49 are disposed on the ceiling surface of the cleaning frame 35 with the jetting direction directed downward. The cleaning liquid nozzle 47 is connected to a cleaning liquid supply unit 48 that supplies a cleaning liquid such as pure water. By driving the cleaning liquid supply unit 48, the cleaning liquid nozzle 47 is provided on the upper surface of the semiconductor wafer 11 supported by the rotation support unit 40 from the cleaning liquid nozzle 47. On the other hand, a cleaning liquid is sprayed.

At this time, by driving the motor 44, the semiconductor wafer 11 is in a spin rotation state, and the cleaning liquid jetted to the center of the semiconductor wafer 11 flows toward the outer edge of the semiconductor wafer 11 by centrifugal force. As a result, foreign matters adhering to the upper surface of the semiconductor wafer 11 are removed together with the cleaning liquid, and accumulate on the bottom surface of the cleaning frame 35. Then, the liquid is guided from the opening 35c to a wastewater treatment device (not shown) through the drainpipe 35e together with the cleaning liquid.

The air nozzle 49 is provided with an air supply unit 50.
When the air supply unit 50 is driven, air is jetted downward from the air hole 49 a of the air nozzle 49. Thereby, the semiconductor wafer 11 after cleaning
The cleaning droplets remaining on the upper surface are removed, and draining and drying are performed. The above operations are performed by the cylinder 37, the motor drive unit 45, the suction control unit 46, the cleaning liquid supply unit 48, and the air supply unit 50 by the control unit (not shown) of the apparatus main body.
It is performed by controlling by.

Next, the first and second plasma processing units 4A and 4B will be described with reference to FIG. These two plasma processing units have the same function, and only one or both of them are used depending on the work load. In FIG. 8 showing an AA cross section in FIG. 2, an opening 51a is provided on a side surface of the vacuum chamber 51.
The opening 51a is for carrying in and out the semiconductor wafer 11, and has a size that allows the wafer holding unit 17 holding the semiconductor wafer 11 to enter and exit. The opening 51a has a vertically movable gate 56, and the gate 56 is connected to a rod 57a of a cylinder 57. By driving the cylinder 57, the gate 56 moves up and down, and the opening 51a is opened and closed.

Openings 51b and 51c are provided on the ceiling surface and the bottom surface of the vacuum chamber 51, respectively. The upper electrode 5 is connected to the opening 51b via a vacuum-tight bearing 51e.
The second support portion 52a is inserted so as to be vertically movable. The support portion 52a is connected to the electrode lifting / lowering driving portion 55, and the upper electrode 52 is raised / lowered by driving the electrode lifting / lowering driving portion 55.

A gas outlet 52b is provided on the lower surface of the upper electrode 52.
Are opened, and the gas ejection port 52b is
Gas supply unit 54 through an inner hole 52c provided inside
Is connected to The gas supply unit 54 supplies a mixed gas mainly composed of oxygen and a fluorine-based gas such as CF ₄ for generating plasma.

A support portion 58a of the lower electrode 58 is inserted through an opening 51c on the bottom surface of the vacuum chamber 51 via an insulator 53 in a vacuum-tight manner. The upper surface of the lower electrode 58 is provided with a suction hole 5.
8b are provided, and the suction holes 58b are
a through the inner hole 58c provided inside the suction control unit 6
0 is connected. By driving the suction control unit 60 and performing vacuum suction through the suction holes 58 b, the semiconductor wafer 11 is suction-held on the upper surface of the lower electrode 58 and held. By driving the suction control unit 60 to apply a positive pressure to the suction holes 58b, the suction-held semiconductor wafer 11 is released from the suction state.

A cooling hole 58d is provided inside the lower electrode 58, and the cooling hole 58d is formed in the inner hole 5 in the support portion 58a.
8e, it is connected to the electrode cooling unit 61. By driving the electrode cooling unit 61 to circulate the coolant in the cooling holes 58d, the heat generated during the plasma processing is reduced by the lower electrode 5
8 to the refrigerant. Thereby, abnormal temperature rise of the lower electrode 58 is prevented, and damage to the protective film 11a of the semiconductor wafer 11 mounted on the lower electrode 58 due to heat can be prevented.

The vacuum chamber 51 is provided with an exhaust hole 51d, and the exhaust hole 51d is connected to a gas exhaust portion 59 via a pipe joint 51f. By driving the gas exhaust unit 59, the space in the vacuum chamber 51 is evacuated. The lower electrode 58 is electrically connected to the high-frequency power supply 62 via a support 58a. The upper electrode 52 is connected to the ground part 52d via the support part 52a, and by driving the high frequency power supply part 62, a high frequency voltage is applied between the opposed upper electrode 52 and lower electrode 58.

In the plasma processing, with the semiconductor wafer 11 placed and held on the lower electrode 58, the vacuum chamber 51 is first closed and the inside is evacuated. Then, the upper electrode 52 and the lower electrode 5 are supplied to the vacuum chamber 51 while the mixed gas for plasma generation is supplied from the gas supply unit 54.
8, a high frequency voltage is applied to the upper electrode 5
A plasma discharge occurs between the second electrode 58 and the lower electrode 58.
Due to the plasma etching effect generated by this,
The upper surface of the semiconductor wafer 11 is etched and thinned.

By controlling the gas supply unit 54, the electrode elevation drive unit 55, the gas exhaust unit 59, the suction control unit 60, the electrode cooling unit 61, and the high frequency power supply unit 62 by a control unit (not shown) of the main unit, The above-described plasma processing operation is performed. At this time, data of the gas flow rate is transmitted from the gas supply unit 54, data of the chamber internal pressure is transmitted from the gas exhaust unit 59, and data of the refrigerant temperature (that is, the electrode temperature) is transmitted from the suction control unit 60 to the control unit. The control unit controls the plasma processing operation based on these data.

The processing apparatus for the semiconductor wafer 11 is configured as described above. Hereinafter, the thinning processing of the semiconductor wafer 11 will be described. This thinning is performed after forming the protective film 11a on the circuit formation surface of the semiconductor wafer 11 in which a plurality of semiconductor elements are formed. The semiconductor wafer 11 is supplied in a state where it is stored in the magazine 2A (or 2B) with the protective film 11a facing upward as shown in FIG. 3, and the semiconductor wafer 11 is held by the wafer holding unit 17 as shown in FIG. Is taken out by vacuum suction. Then, the wafer holding unit 17 holding the semiconductor wafer 11 on the lower surface by suction is
The pre-center unit 5 is operated by the robot mechanism of the wafer transfer unit 3.
Move up to.

Here, the wafer holder 17 is rotated about an axis, and the semiconductor wafer 1 held by the wafer holder 17 by suction is rotated.
1 is turned upside down. As a result, the semiconductor wafer 11 is suction-held on the upper surface of the wafer holding unit 17 with the protective film 11a facing downward as shown in FIG. By lowering the wafer holder 17, the semiconductor wafer 11 is mounted on the mounting table 20 with the protective film 11a side facing down. Thereafter, when the wafer holding unit 17 is retracted from the inside of the groove 21, the positioning claw 22a presses the outer peripheral portion of the semiconductor wafer 11 toward the center from three directions. Thereby, the alignment of the semiconductor wafer 11, that is, the pre-center operation is performed.

Next, the semiconductor wafer 11 aligned by the pre-center operation is picked up by the suction head 25A of the wafer loading section 9A and transferred to the polishing section 6 as shown in FIG. That is, the suction head 25A is moved to the wafer transfer position, where the semiconductor wafer 11 is transferred onto the chuck table 7a.

Thereafter, mechanical polishing by the polishing section 6 is performed. First, the chuck table 7a holding the semiconductor wafer 11 moves to the rough polishing station below the first polishing unit 8A, where the rough polishing using the grindstone 31A is performed. Next, the chuck table 7a moves to the finishing polishing station, and the second polishing unit 8B performs the final polishing using the finer grindstone 31B.
At this time, the semiconductor wafer 11 is thinned to a size thicker by a predetermined thickness than a predetermined target thickness, that is, a size larger by a dry etching allowance set in a range of 3 μm to 50 μm.

When the finish polishing is completed, the chuck table 7a holding the semiconductor wafer 11 moves to the wafer transfer station again by the turn rotation of the turntable 7 by the index. The semiconductor wafer 11 is picked up by the suction head 25B of the wafer unloading section 9B and moved to the wafer cleaning section 10 by rotating the transfer arm 24B. Therefore, the wafer unloading section 9B serves as a pre-cleaning transfer means for taking out the polished semiconductor wafer 11 from the polishing section 6 and passing it to the wafer cleaning section 10.

In the unloading operation of the semiconductor wafer 11, in the present embodiment, the protective film 11
Since a is formed, the bending strength is reinforced even in the state where the microcrack-introduced layer is generated by the mechanical polishing, and the semiconductor wafer 11 during transportation can be prevented from being damaged.

Next, the cleaning operation in the wafer cleaning section 10 will be described with reference to the flowchart of FIG. First, in FIG. 7, with the cover part 36 lowered, the wafer unloading part 9B
Is rotated, the semiconductor wafer 11 held by the suction head 25B is carried into the cleaning frame unit 35, and is transferred onto the rotary support unit 40 (ST1).

Next, the semiconductor wafer 11 is sucked and held by vacuum suction from the suction hole 40a of the rotary support portion 40 (ST2), and the suction of the semiconductor wafer 11 by the suction head 25B is released (ST3). Then, when the transfer arm 24B has retracted to the outside, the cover unit 36 is raised (ST4). As a result, the semiconductor wafer 11 is in a state in which the periphery is enclosed in the cleaning frame portion 35, and a state in which the cleaning liquid can be jetted.

Thereafter, the motor 44 is driven to rotate the rotation supporting portion 4.
0, and the semiconductor wafer 11 is spin-rotated (ST5). In this state, the cleaning liquid is jetted from the cleaning liquid nozzle 47 (ST6), and after a predetermined cleaning time has elapsed, the jetting of the cleaning liquid is stopped (ST7). Thereafter, air is blown from the air nozzle 49 (ST8), and the semiconductor wafer 1
1. Drain and dry the top surface. After a predetermined time, the air blowing is stopped (ST9).
Is stopped (ST10). Thus, the washing, draining and drying are completed.

When the cover 36 is lowered (ST11), the robot mechanism of the wafer transfer unit 3 is driven to move the wafer holder 17 into the cleaning frame 35 (ST12). Then, the suction hole 17 of the wafer holding unit 17
The upper surface of the semiconductor wafer 11 is sucked by a, and the suction by the suction hole 40a of the rotation support unit 40 is released (ST13). Then, the wafer holding unit 17 picking up the semiconductor wafer 11 is lifted and carried out of the cleaning frame unit 35 (ST14).

Next, the semiconductor wafer 11 from which foreign substances on the surface have been removed by cleaning is removed from the first plasma processing section 4A or the second plasma processing section 4A.
The plasma etching (dry etching) is performed here. In this plasma etching, the surface of the semiconductor wafer 11 thinned to a size larger by a dry etching allowance set in a range of 3 μm to 50 μm than a target thickness by mechanical polishing is further plasma etched to remove the dry etching allowance. Thereby, the semiconductor wafer 11 is thinned to the target thickness.

When performing final polishing with a grindstone of # 3000 to # 4000, the dry etching allowance is 5 μm to 6 μm.
It is desirable to set it to about m. As a result, the application rate of mechanical polishing with excellent polishing efficiency is increased as much as possible to improve the work efficiency, and the microcrack-introduced layer (generally 3 μm to 5 μm) generated by the finish polishing can be completely removed. And removal quality can be compatible.

This plasma etching will be described with reference to FIG.
This will be described with reference to FIG. As shown in FIG.
The wafer cleaning unit 10 is operated by the robot mechanism of the wafer transfer unit 3.
Then, the wafer holding unit 17 holding the semiconductor wafer 11 after cleaning on the lower surface by suction is moved to the side of the opening 51 a of the vacuum chamber 51. At this time, the gate 56 is lowered, the opening 51a is in an open state, and the upper electrode 52 is in a state of being raised by the electrode lifting drive unit 55. The wafer transfer unit 3 cleans the semiconductor wafer 1 after cleaning from the wafer cleaning unit 10.
1 is taken out and transferred to the plasma etching units 4A and 4B to serve as a conveying means after cleaning.

Next, as shown in FIG. 9B, the wafer holder 17 is moved into the vacuum chamber 51 through the opening 51a, and the wafer holder 17 is lowered.
The semiconductor wafer 11 held on the lower surface is placed on the upper surface of the lower electrode 58. Then, the suction by the wafer holding unit 17 is released, and the protective film 11 a of the semiconductor wafer 11 is sucked and held by the suction hole 58 b of the lower electrode 58.

Thereafter, when the wafer holding unit 17 is raised and retracted to the outside, the cylinder 57 is driven to raise the gate 56 and close the vacuum chamber 1 as shown in FIG. The upper electrode 52 is lowered by driving the electrode raising / lowering drive unit 55, and the distance between the lower surface of the upper electrode 52 and the upper surface of the lower electrode 58 is set to a predetermined value suitable for plasma etching as shown in FIG. The distance D between the electrodes is set.

Then, the above-described plasma etching process is performed in this state. That is, after the inside of the vacuum chamber 51 is evacuated, a mixed gas of a fluorine-based gas and an oxygen gas is ejected from the gas ejection port 52b on the lower surface of the upper electrode 52 as a plasma generating gas to maintain the inside of the vacuum chamber 51 at a predetermined gas pressure. I do. In this state, a high-frequency voltage is applied between the upper electrode 52 and the lower electrode 58. As a result, a plasma discharge is generated in the space between the upper electrode 52 and the lower electrode 58, and silicon on the surface of the semiconductor wafer 11 is removed by the action of an active substance generated by the plasma discharge.

This plasma etching process is continuously performed until the semiconductor wafer 11 reaches the target thickness. Thereby, in the mechanical polishing process, the semiconductor wafer 1
The micro-crack-introduced layer formed on the surface of No. 1 is removed. This microcrack-introduced layer is usually 3 μm to 5 μm
As described above, the target thickness is mechanically polished to a dimension larger than the target thickness by a dry etching allowance exceeding the microcrack introduction layer, and then removed by plasma etching for the dry etch allowance. In the state where it has been processed, the microcrack-introduced layer is completely removed.

The semiconductor wafer 11 after the completion of the plasma etching is taken out by the wafer holding unit 17 of the wafer transfer unit 3 and stored in the wafer storage unit 2 at the same position of the magazine 2A (or 2B) from which the semiconductor wafer 11 is taken out. Is done. Then, the above operation is continuously repeated for the other semiconductor wafers 11. In the transfer of the semiconductor wafer 11 after the thinning, the microcrack-introduced layer is completely removed as described above, so that the bending strength of the semiconductor wafer 11 is improved and the semiconductor wafer 11 is not damaged. As described above, according to the present embodiment, it is possible to prevent breakage that occurs during a manufacturing process such as when the semiconductor wafer 11 is transported due to microcracks, and to improve the processing yield.

In addition, dry etching using plasma etching does not require a chemical solution such as hydrofluoric acid or nitric acid used in conventional wet etching, so that harmful environmental pollutants such as nitrogen oxides are generated. There is no need for waste liquid treatment of the used etching solution, and the environmental load can be greatly reduced.

Further, semiconductor wafer 1 shown in the present embodiment
In the first processing apparatus, the regions of the polishing unit 6 and the other units are separately arranged on the common base unit 1, and the semiconductor wafer 11 is transferred between the units by individual transport means. I have to. That is, the transfer and processing of the semiconductor wafer 11 in a state where the contaminants adhere to the work area (see the second half 1b shown in FIGS. 1 and 2) in which the adherence of contaminants such as polishing powder is inevitable using the polishing liquid. The transfer of the semiconductor wafer 11 in a clean state in a clean room area (see the first half 1a shown in FIGS. 1 and 2) such as a plasma etching process that requires a high degree of cleanliness of an object is separated by separate transfer means. I'm trying to do it.

Thus, the transporting means in the clean room area is not contaminated by the adhesion of the contaminants. Therefore, in the plasma etching process performed for the purpose of removing the microcrack-introduced layer, there is no adhesion of foreign matter that inhibits the etching effect on the surface of the semiconductor wafer 11, and the microcrack-introduced layer on the surface of the semiconductor wafer 11 is completely removed. Therefore, the bending strength can be improved. Further, as compared with a method of transferring the semiconductor wafer 11 between a plurality of individual devices using a transfer means such as a robot, the number of times of transfer for transferring the semiconductor wafer 11 during transfer can be suppressed to the minimum number. Therefore, the probability of breakage of the semiconductor wafer 11 during handling can be reduced, and the above-mentioned processing yield can be further improved.

The present invention is not limited to the above-described embodiment, but may be implemented with various changes. For example, in the present embodiment, mechanical polishing is performed in two stages of the rough polishing process and the finish polishing process, but the finish polishing process may be omitted. In this case, since the surface is polished with a coarse grindstone, the depth of the microcrack introduction layer on the upper surface of the wafer becomes 10 μm or more.

Therefore, if the dry etching allowance is left as about 50 μm and the remaining is dry-etched and processed to a target thickness, the microcrack-introduced layer can be completely removed. By making the mechanical polishing only one step of the rough polishing process, the size of the polishing portion can be reduced, and a processing apparatus for the semiconductor wafer 11 having a small occupied floor area can be realized.

[0073]

According to the present invention, there are provided polishing means for polishing a semiconductor wafer, cleaning means for cleaning the polished semiconductor wafer, and dry etching means for dry-etching the cleaned semiconductor wafer. Transport means for individually transporting the semiconductor wafer and transporting the semiconductor wafer after cleaning can be performed, so that foreign substances can be prevented from adhering to the semiconductor wafer after cleaning and dry etching can be performed in a good state. In addition, the bending strength of the semiconductor wafer can be improved.

[Brief description of the drawings]

FIG. 1 is a perspective view of a semiconductor wafer processing apparatus according to an embodiment of the present invention.

FIG. 2 is a plan view of a semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 3 is a perspective view of a wafer storage unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 4 is a perspective view of a wafer storage unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 5 is a partial plan view of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 6 is a side view of a polishing unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 7 is a sectional view of a wafer cleaning unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 8 is a sectional view of a plasma processing unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 9 is a process explanatory view of a semiconductor wafer processing method according to one embodiment of the present invention;

FIG. 10 is a process explanatory view of a method for processing a semiconductor wafer according to one embodiment of the present invention;

FIG. 11 is a flowchart of semiconductor wafer cleaning in the semiconductor wafer processing method according to one embodiment of the present invention;

[Explanation of symbols]

 Reference Signs List 2 wafer storage unit 3 wafer transfer unit 4A first plasma processing unit 4B second plasma processing unit 5 pre-center unit 6 polishing unit 8A first polishing unit 8B second polishing unit 9A wafer loading unit 9B wafer unloading unit 10 wafer Cleaning unit 11 Semiconductor wafer

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Kiyoshi Arita 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Hiroshi Hashi 1006 Kazuma Kazuma Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. ( 72) Inventor Tetsuhiro Iwai 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term (reference) 5F004 AA16 BB11 BB18 BB21 BB25 DA00 DA01 DA26 DB01 5F031 CA02 DA17 FA01 FA07 FA11 FA12 FA20 GA08 GA24 GA45 GA47 GA34 HA34 HA38 HA59 HA60 KA03 MA04 MA22 MA23 MA32 NA05 PA25

Claims (2)

[Claims] 1. A semiconductor wafer processing apparatus for polishing a surface of a semiconductor wafer by mechanical polishing and then dry-etching the polished surface to thin the semiconductor wafer to a target thickness. Polishing means for mechanically polishing the wafer; cleaning means for cleaning the polished semiconductor wafer; dry etching means for dry-etching the cleaned semiconductor wafer; and removing the polished semiconductor wafer from the polishing means to the cleaning means. An apparatus for processing a semiconductor wafer, comprising: a pre-cleaning transfer unit to be transferred; and a post-cleaning transfer unit that takes out the semiconductor wafer after cleaning from the cleaning unit and transfers the semiconductor wafer to the dry etching unit. 2. A semiconductor wafer processing method for thinning a semiconductor wafer to a target thickness, the method comprising: mechanically polishing a side opposite to a circuit forming surface of the semiconductor wafer;
A step of taking out the polished semiconductor wafer by the pre-cleaning transfer means and transferring it to the cleaning means; a step of cleaning the transferred semiconductor wafer by the cleaning means; And a step of dry-etching the transferred semiconductor wafer by dry etching means.