JP2001244758A5 - - Google Patents
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- Publication number
- JP2001244758A5 JP2001244758A5 JP2000051186A JP2000051186A JP2001244758A5 JP 2001244758 A5 JP2001244758 A5 JP 2001244758A5 JP 2000051186 A JP2000051186 A JP 2000051186A JP 2000051186 A JP2000051186 A JP 2000051186A JP 2001244758 A5 JP2001244758 A5 JP 2001244758A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000051186A JP4087544B2 (ja) | 2000-02-28 | 2000-02-28 | バッファ回路およびホールド回路 |
| US09/629,874 US6255868B1 (en) | 2000-02-28 | 2000-08-01 | Buffer circuit and hold circuit |
| KR10-2000-0064798A KR100386060B1 (ko) | 2000-02-28 | 2000-11-02 | 버퍼회로 |
| DE10054971A DE10054971B4 (de) | 2000-02-28 | 2000-11-06 | Pufferschaltung und Halteschaltung |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000051186A JP4087544B2 (ja) | 2000-02-28 | 2000-02-28 | バッファ回路およびホールド回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001244758A JP2001244758A (ja) | 2001-09-07 |
| JP2001244758A5 true JP2001244758A5 (ja) | 2005-10-27 |
| JP4087544B2 JP4087544B2 (ja) | 2008-05-21 |
Family
ID=18572859
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000051186A Expired - Lifetime JP4087544B2 (ja) | 2000-02-28 | 2000-02-28 | バッファ回路およびホールド回路 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6255868B1 (ja) |
| JP (1) | JP4087544B2 (ja) |
| KR (1) | KR100386060B1 (ja) |
| DE (1) | DE10054971B4 (ja) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200504662A (en) * | 2003-07-17 | 2005-02-01 | Analog Integrations Corp | Method of using current mirror to drive LED |
| CN100352068C (zh) * | 2003-08-20 | 2007-11-28 | 沛亨半导体股份有限公司 | 以电流镜驱动发光二极管的方法 |
| US7906995B2 (en) * | 2009-02-26 | 2011-03-15 | Texas Instruments Incorporated | Clock buffer |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4639685A (en) * | 1985-07-18 | 1987-01-27 | Comlinear Corporation | Offset reduction in unity gain buffer amplifiers |
| JPH09306193A (ja) * | 1996-05-17 | 1997-11-28 | Nec Corp | サンプルホールド回路 |
| KR970078012A (ko) * | 1996-05-28 | 1997-12-12 | 김광호 | 오프셋이 제거된 버퍼 회로 |
| KR100197998B1 (ko) * | 1996-10-22 | 1999-06-15 | 김영환 | 반도체 장치의 저소비 전력 입력 버퍼 |
| JP3050289B2 (ja) * | 1997-02-26 | 2000-06-12 | 日本電気株式会社 | 出力バッファ回路の出力インピーダンス調整回路 |
| KR100273210B1 (ko) * | 1997-04-22 | 2000-12-15 | 김영환 | 데이터 입출력 감지형 기판전압 발생회로 |
| KR100488584B1 (ko) * | 1998-10-19 | 2005-08-02 | 삼성전자주식회사 | 파워 온 리셋회로 |
-
2000
- 2000-02-28 JP JP2000051186A patent/JP4087544B2/ja not_active Expired - Lifetime
- 2000-08-01 US US09/629,874 patent/US6255868B1/en not_active Expired - Lifetime
- 2000-11-02 KR KR10-2000-0064798A patent/KR100386060B1/ko active IP Right Grant
- 2000-11-06 DE DE10054971A patent/DE10054971B4/de not_active Expired - Lifetime