JP2001242846A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device doing without a large amount of data to be transmitted when a video image is transmitted to the display device from a computer body. SOLUTION: The display device 2F receives video data and control data compressed by a digital I/F 21 and passes them over to an extension circuit 83. The extension circuit 83 performs extension processing of the compressed video image data, and reproduces them as the original video data, and thereafter writes them in VRAM 23. The extension circuit 83 creates horizontal and vertical synchronizing signals (Hs, Vs) necessary for driving a deflection circuit 27 of the display 2F from control data, and rewrites a setting value of a LUT 24 for varying display colors and video image signal levels of the display video according to the control data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device for displaying an image transmitted from a digital data output device such as a computer.

[0002]

2. Description of the Related Art At present, most display devices used in computer terminals and the like use analog RGB video signals as an interface for input video signals, and display resolution tends to be high in recent high definition displays. , The horizontal deflection frequency is 90 kHz, and the video signal band is about 150 MHz. For this reason, there are problems such as a loss when transmitting a video signal to a display device distant from the computer main body and generation of unnecessary radiation noise.

[0003] In order to solve the above-mentioned problem, the computer main body transmits the low-frequency digital video data to a display device without converting the video signal into an analog signal.

[0004] As a prior art of this type of display device, for example, the one described in JP-A-61-233779 can be mentioned. Here, the digital video data read from the image memory of the computer main body is output to the display device as a parallel signal as it is, and the display device performs digital-to-analog conversion and returns to an analog video signal to display the video. .

[0005]

In the above conventional example, for example, one screen is 640 × 480 (horizontal 6 pixels) at a standard display resolution used in a normal personal computer class.
When each of the RGB video signals has 8-bit gradation (that is, 16.67 million colors can be displayed per one dot of the above resolution) in the case of 40 dots and 480 vertical dots, the digital video data is The amount of data transfer required for transfer to the display device side reaches about 55 Mbytes / sec.

Further, one screen is 1280 × 1024 with a high definition display resolution used in a workstation class.
It is about a dot, and a transfer amount of about 80 Mbytes / sec is required even if the display color per dot is 256 colors. At present, this resolution is in the direction of further improvement, and the display color is also approaching 16.67 million colors that enable natural images to be displayed on a display device.

As described above, when an image to be displayed on a display device is transmitted as digital image data from the computer main body, the amount of data to be transmitted is enormous. Therefore, in the above conventional example, when digital video data is transmitted in 8-bit parallel, a transfer clock frequency of about 55 MHz is simply required for the standard display resolution and about 80 MHz for a high definition display resolution. As a result, as a result, the effect of reducing the unnecessary radiation is not so obtained.

Further, it is practically difficult to realize such high-speed data transfer while maintaining reliability without being affected by bit omission or noise. Further, if the data width to be transmitted is increased from 8 bits to 16 times and doubled to 32 bits, the frequency of the transfer clock can be lowered, but the number of lines of the cable for transferring digital video data increases and the number of lines can be increased. Is extremely inconvenient, and it is not practical to increase the distance between the computer body and the display device.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a display device which can transmit a small amount of data when transmitting an image from a computer or the like to the display device. Another object of the present invention is to further improve the functions of the display device by digital signal processing.

[0010]

According to the present invention, there is provided a display apparatus for displaying an image based on an input video signal.
Compressed digital video data including control data is input, and a decompression circuit for decompressing the compressed digital video data; and a digital video data decompressed by the decompression circuit, A signal processing means for performing predetermined signal processing based on the signal, and a D / A conversion circuit for converting an output signal from the signal processing means into an analog signal, and displaying an image based on an output from the D / A conversion circuit. I did it.

[0011]

In the display device according to the present invention, information which can realize digital video data for displaying a high-resolution video from the computer side to the display device side using the digital interface generally used based on the standard is provided. Transmission can be performed at a transmission ratio, and it is possible to reduce line loss, influence of noise, and the like, as compared with the case of transmission using a conventional analog video signal.

Further, since the digital signal is transmitted, the audio signal and the display control information can be transmitted from the computer to the display device in addition to the video signal on the same line. Conversely, the internal information of the display can be recognized from the display device side to the computer main body side.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below. Prior to this, reference examples useful for understanding the present invention will be described.

FIG. 3 is a block diagram showing a reference example useful for understanding the present invention. In the figure, a portion 1A surrounded by a dashed line is a computer main body.
Is a bus for data, address, and control signals;
1 is an arithmetic control circuit (hereinafter referred to as a CPU), 12 is a main memory, 13 is an input / output port for connecting a computer external device such as a printer or a modem to the computer main unit 1A, and 14 is an external storage device 3 to be described later. An external storage device interface for transferring data, 15 is an input device interface for inputting a control command from an input device 4 described later, and 16 is a video drawing command transmitted as digital data through the bus 10 A digital data interface (hereinafter, referred to as a digital I / F) for transmission to a display device.

A portion 2A surrounded by another dashed line is a display device, in which 21 is a digital I / F for receiving a video drawing command transmitted as digital data from the computer main body 1A. 22
Is a drawing processing circuit for creating digital image data for displaying an image from the image drawing command received by the digital I / F 21, and 23 is an image memory (hereinafter, referred to as an image memory for holding the digital image data created by the drawing processing circuit 22). , VRAM), 24 is a look-up table (hereinafter, LUT), 25 is a digital-to-analog converter (hereinafter, DAC), 26 is a video circuit, 27 is a deflection circuit, and 28 is a color display tube (hereinafter, CDT). ).

Reference numeral 3 denotes an external storage device using a storage medium other than the main memory 12, such as a floppy (registered trademark) disk, hard disk, magneto-optical disk, or magnetic tape, and 4 denotes a keyboard, a mouse, and a pen input tablet. ,
Or, an input device such as a touch panel, 5 is a digital I /
A CD-ROM for handling digital video data, a magneto-optical disk recording / reproducing device,
Scanners, electronic still cameras, digital VT
R, a digital video media device such as a camera-integrated VTR (generally called a movie) that can handle digital video data.

The circuit operation of FIG. 3 is as follows. The computer main body 1A is a computer main body having the same configuration as a general personal computer or workstation, but is usually connected to the bus 10 and
A digital I / F 16 is connected instead of a video graphic circuit for creating a GB video signal. And
When a control command is read from an input device 4 such as a keyboard or an external storage device 3 such as a floppy disk drive,
The control command is taken into the CPU 11 via the external storage device interface 14 and the input device interface 15, and a video drawing command is issued from the CPU 11 in response to the control command. The image drawing command is transmitted as digital data to the display device 2A via the digital I / F 16.

On the other hand, the display device 2A receives the transmitted image drawing command via the digital I / F 21, and the drawing processing circuit 22 interprets the received image drawing command to create digital image data. , A synchronization signal (Hs,
Vs) also occurs. The created digital video data is sequentially stored in the VRAM 23 and then read out for video display.

Therefore, the VRAM 23 used here is of a two-port memory type having separate input / output ports. The LUT 24 stores a conversion table for converting digital video data read from the VRAM 23 into digital video data having color signal amplitude information to be actually displayed. Digital video data with signal amplitude information is
Sent to The DAC 25 converts the digital video data into an analog RGB video signal and converts the digital video data into an input video signal form of a general display device.

The contents of the conversion table stored in the LUT 24 can be rewritten by a rewriting signal from the drawing processing circuit 22, and the color displayed on the screen of the CDT 28 can be freely changed. Further, the LUT 24 can be omitted. In this case, the content of the VRAM 23 is RG
One-to-one correspondence with signal amplitude information of each B color. , And the converted analog RGB video signal
The synchronization signal generated by the DT 28 and the synchronization signal generated by the drawing processing circuit 22 are also input to the CDT 28 via the deflection circuit 27, and the same video display as that of a general display device is performed.

As described above, in this embodiment, the image to be displayed from the computer main unit 1A is transmitted to the display device 2A as an analog image signal or digital image data obtained by digitally converting the analog image signal, as in the related art. Instead, the data is transmitted to the display device 2A as a video rendering command, which is digital data, to reduce the amount of data to be transmitted.

Here, referring to FIG. 4, how the amount of data to be transmitted differs between the case where a video to be displayed is transmitted as a video rendering command and the case where it is transmitted as digital video data will be described.

FIG. 4 is an explanatory diagram showing a comparison between a case where a video to be displayed is transmitted as a video rendering command and a case where the video is transmitted as digital video data.

For example, the display resolution of the display device 2A is 640 × 480 per screen (640 dots horizontally, 4 dots vertically).
(80 lines) dots,
Consider the case where a line is displayed on the first line.
As shown in FIG. 4A, when this video is transmitted as a video rendering command, "LINE (0,0)-(0,640)" which is a command (command) for displaying a line on the first line. Is transmitted from the computer main body 1A to the display device 2A as digital data, and digital video data for displaying a video is created inside the display device 2A and displayed on the screen. Therefore, basically, it is only necessary to transmit a simple video drawing command “LINE (0,0)-(0,640)” in the form of digital data from the computer main body 1A to the display device 2A. The data volume is small.

On the other hand, as shown in FIG.
When transmitting as digital video data, data “11111... 11111” representing a line on the first line, that is, “1” as data for one line corresponding to the first line (indicating that screen display is performed) Data) to 640
After the data is transmitted from the computer main body 1A to the display device 2A, data for the remaining number of lines (479 lines) is transmitted and displayed on the screen in the display device 2A as it is.

That is, when transmitting as digital video data, since the data to be transmitted has a one-to-one correspondence with the display screen, basically, 640 × 480 data are transmitted from the computer main body 1A to the display device 2A. Data must be transmitted, and the amount of data to be transmitted is very large.

As described above, in the present embodiment, when an image to be displayed on the display device is transmitted from the computer main body, the amount of data to be transmitted can be reduced by transmitting the image as an image drawing command. Therefore, the signal frequency in the transmission path is reduced, unnecessary radiation can be reduced, and there is no need to worry about the effects of bit omission and noise, and it is not necessary to increase the number of cables.

Although the digital I / Fs 16 and 21 can use their own interfaces,
By using a general-purpose parallel interface such as a CSI interface or a printer interface, or a general-purpose serial interface such as a network interface, applications can be expanded. That is, for example, SCS
When the I interface is used, a multimedia image device such as a CD-ROM or an image capturing device such as a scanner is connected as the digital image media device 5 to the interface portion, and the digital image data sent from the device 5 is displayed. It can also be taken into the device 2A and directly displayed on the display device 2A.

In this case, the drawing processing circuit 22 inside the display device 2A communicates with the digital video media device 5 via the digital I / F 21 to determine what kind of digital video media device 5 is connected. If it is determined, it has an intelligent processing function capable of performing a drawing process according to the form of the digital video data.

Therefore, in this embodiment, the video can be displayed on the screen of the display device 2A without the help of the computer main unit 1A by directly connecting the digital video media device 5 capable of reproducing various video media. .

In this embodiment, the digital I / F 1
6 and 21 are connected by a bidirectional bus, so that the drawing processing circuit 22 and the VR
The operating states of the AM 23, the LUT 24, and the like are detected, and the detection results can be transmitted as commands to the computer main unit 1A via the digital I / Fs 16 and 21.
When such transmission is performed, the operation can be checked when the power is turned on or at the time of factory adjustment.

FIG. 5 is a block diagram showing another embodiment of the present invention. In the figure, a portion 2B surrounded by a dashed line is a display device, in which 29 is an audio processing circuit, 210 is an audio memory circuit, 211 is a DAC for converting digital audio data into analog audio, 21
Reference numeral 2 denotes a speaker, 213 denotes an analog / digital converter (hereinafter, referred to as ADC), and 214 denotes a microphone. Further, the same reference numerals as those in FIG. 3 denote the same components as those in FIG.

The operation of the circuit shown in FIG. 5 will be described below.
In this reference example, as shown in FIG.
B, a video rendering command and an audio processing command are transmitted as digital data from the computer main unit 1A or the digital video media device 5 shown in FIG.

The transmitted digital data is received via the digital I / F 21, and from the image rendering command, the rendering processing circuit 22, the VRAM 23, the LUT 24, and the DAC 25 as in the display apparatus 2A of FIG.
An analog video signal can be obtained by a circuit including the above. Also,
The voice processing command is demodulated by a voice processing circuit 29 with an actual voice image, and converted into digital voice data in the voice memory 2.
After being held at 10, it is converted to an analog audio signal by the D / A converter 211. This audio signal is transmitted to the speaker 212
Through to the audio output.

As described above, in the present embodiment, video and audio can be transmitted as the video rendering command and the audio processing command using the same interface, and the need for additional lines is eliminated. Furthermore, when application software that handles video and audio is operated on the computer main unit 1A side, by connecting the display device 2B of this embodiment, video display and audio can be easily performed without the need for other additional circuits. The output is obtained.

In this embodiment, the voice is taken in from the microphone 214, converted into digital voice data by the A / D converter 213, modulated by the voice processing circuit 29, and then transmitted via the digital I / F 21 to the computer main body. 1A and can be utilized as audio data. Note that a speaker 2 is used instead of the microphone 214 as a voice input device.
12 can also be used. In this case, as shown by the dotted line in FIG.
It is input to a transform 213 and processed as described above.

FIG. 6 is a block diagram showing another embodiment of the present invention. In the figure, a portion 2C surrounded by a chain line
Is a display device, in which 33 is a drawing processing circuit different from the drawing processing circuit 22 in FIGS. 3 and 5, 34 is a preprocessing circuit, 35 is an ADC, 36 is a buffer circuit, and 37 is a display device.
Is a PLL circuit, 38 is a signal switching circuit, and the same reference numerals as those in FIGS. 3 and 5 denote the same components.

The operation of the circuit shown in FIG. 6 will be described below.
In the present reference example, as shown in FIG.
C, a video rendering command is transmitted as digital data from the computer main unit 1A shown in FIG.
An analog video signal (hereinafter, referred to as a video signal) is transmitted from a general computer main unit or a video output device such as a VTR or an LD player. The video drawing command transmitted as digital data is received via the digital I / F 21, and the drawing processing circuit 22 creates digital video data based on the video drawing command.

On the other hand, the transmitted video signal is input to the pre-processing circuit 34, where the video signal is subjected to a video clamping process and, if the video signal is a composite type, a process of extracting a synchronization signal from the video signal. The video signal subjected to these processes is converted by the ADC 35 into digital video data.

Here, the sampling clock used for the ADC 35 is created by a PLL circuit 37 composed of a general phase lock circuit in order to synchronize with a synchronization signal output from the preprocessing circuit 34. The digital video data obtained by the conversion is sequentially read into the drawing processing circuit 33 via the buffer circuit 36.

The switching control circuit 38 is given an instruction by the user from the outside of the display device 2C as to what kind of video processing is to be performed, and the digital I / F 21 and the drawing processing circuit 33 from the computer main unit 1A. , A switching control command is given. The switching control circuit 38 interprets the given instructions and commands and gives predetermined instructions to the drawing processing circuit 33. In accordance with an instruction from the switching control circuit 38, the drawing processing circuit 33 switches and outputs digital video data created based on a video drawing command and digital video data obtained by converting a video signal, and Image processing.

As a form of display obtained by these switching and image processing, an image based on an image drawing command,
When one of the images based on the video signal is displayed on the CDT 28, one of them is displayed on the screen of the CDT 28, and the other is displayed on an appropriate place in the window, and the other is displayed on one of the displayed images. There is a case where the other is superimposed, or a case where the image is enlarged / reduced or scrolled in each of the above cases. Thus,
The digital video data that has been switched or subjected to video processing by the drawing processing circuit 33 is then written to the VRAM 23. Subsequent circuit operations are the same as in FIG.

Accordingly, in the present embodiment, not only the video signal is transmitted to the display device 2C but also a normal video signal, so that not only one of the video signals can be displayed on the screen, but also the video signal can be displayed on the screen. Different types of images can be displayed simultaneously in various display modes.

FIG. 7 is a block diagram showing another embodiment of the present invention. In this figure, a portion 2D surrounded by a dashed line is a display device, in which 41 is a drawing processing circuit different from the drawing processing circuit 22 of FIGS. 3 and 6, and 42 is an analog signal switching circuit (hereinafter, referred to as a switching circuit). SW)
The same reference numerals as those in FIGS. 3, 5, and 6 denote the same components.

The circuit operation of FIG. 7 is as follows. In the present reference example, as shown in FIG. 7, a video rendering command is transmitted as digital data from the computer main unit 1A shown in FIG. A video signal is transmitted from a video output device such as a TV, a VTR, and an LD player. In the processing inside the display device 2D, the video signal is directly input to the SW 42, and no digital processing is performed. On the other hand, the video drawing command is a drawing processing circuit 41,
Each circuit of the VRAM 23, LUT 24, and DAC 25 converts the signal into an analog video signal and inputs the analog video signal to the SW 42.

Here, the drawing processing circuit 41 responds to an instruction from the switching control circuit 38 similar to that shown in FIG.
And determining whether to select the image based on the image drawing command or the image based on the video signal as the image to be displayed in step S8.
W42 is controlled. The control method is as follows.

In the first display control mode, one of the video based on the video drawing command transmitted to the display device 2D and the video based on the video signal is displayed on the CDT 28. At this time, if an image based on the video signal is selected, the synchronizing signals Hs and Vs input to the display device 2D accompanying the video signal are once input to the drawing processing circuit 41 and directly provided to the deflection circuit 27. .

Therefore, the synchronizing signals Hs and Vs are equal to the synchronizing signals Hs 'and Vs' output from the drawing processing circuit 41. Conversely, when an image based on the image drawing command is selected, the synchronization signals Hs ′ and Vs ′ are generated asynchronously with the synchronization signals Hs and Vs at a period suitable for display.

Next, in the second display control mode, while displaying an image based on a video signal, an image based on an image drawing command is displayed in a window. At this time, the input / output synchronization signal of the drawing processing circuit 41 is the same. Here, if the display resolution of the video based on the video signal is sufficiently higher than the display resolution of the video based on the video rendering command, the rendering control circuit 4
In step 1, digital video data is created based on a video rendering command in synchronization with the synchronization signals Hs and Vs. Thereafter, all digital video data is read from the VRAM 23 at a predetermined timing, and is converted into an analog signal by the LUT 24 and the DAC 25. The analog video signal is switched with the video signal at a predetermined timing in the SW 42, and the video based on the video drawing command is window-displayed in the display area of the video based on the video signal.

This situation is shown in the timing chart of FIG. The display period of the video signal is the T1 period in FIG. 8 with respect to the horizontal synchronization signal Hs of the video signal, and the drawing processing circuit 41
Selects the analog video signal output from the DAC 25 in the T2 period shorter than the T1 period, and selects the video signal in other periods.

As a result, the output from the SW 42 is switched as shown in FIG. 8, and a window can be displayed in the horizontal direction. When the read start time of the digital video data read from the VRAM 23 with respect to the horizontal synchronizing signal Hs is shifted in accordance with the instruction from the switching control circuit 38, the control signal S1 issued from the drawing processing circuit 41 also becomes the window display position as indicated by the dotted line in FIG. And the window display position can be changed. The same can be done in the vertical direction.

Next, when the display resolution of the video based on the video signal is equal to or lower than the display resolution of the video based on the video rendering command, the following processing is performed. FIG. 9 shows a timing chart in this case. Drawing processing circuit 41
If the digital video data held in the VRAM 23 is read in accordance with the synchronization signal Hs as it is, the video signal exceeds one horizontal period of the synchronization signal Hs as in the output of the non-processed DAC 25 shown in FIG. Will be.

Therefore, the video data held in the VRAM 23 is thinned out and read out, and the rendering processing circuit 41 converts the control signal S1 so that the video signal can be sufficiently contained within the horizontal period as in the post-processing DAC output shown in FIG. Occurs and controls SW42. Similarly, processing is performed in the vertical direction.

In this way, the display device 2 shown in FIG.
In D, two video signals can be switched and a window can be freely displayed on the screen of the CDT 28.

FIG. 10 is a block diagram showing another embodiment of the present invention. In the figure, a portion 2 surrounded by a dashed line
E denotes a display device, in which 71 is a drawing processing circuit different from the drawing processing circuit in each of the above drawings, 72 is a writable read memory (hereinafter referred to as ROM),
Reference numeral 73 denotes a CPU, 74 denotes an ADC, 75 denotes a light receiving device such as a sensor or a camera, and the same reference numerals as those in FIG. 3 denote the same components.

The operation of the circuit shown in FIG. 10 will be described below. 10, the drawing process is performed in exactly the same way as in the reference example of FIG. 3, and a video drawing command is transmitted to the display device 2E from the computer main unit 1A shown in FIG.
The image data is received via the digital I / F 21, and the drawing processing circuit 71, VRAM 23, LUT 2
4. An analog video signal can be obtained by a circuit including the DAC 25 and the like.

On the other hand, the ROM 72, the CPU 73, the ADC 7
4. The portion composed of the light receiving device 75 measures and processes various characteristics related to the display of the display device 2E, and holds the obtained data. Here, the characteristics to be measured include:
The so-called gamma characteristics, the highest luminance, the lowest luminance, the color temperature, and the like of the CDT 28 are listed. As a method of measuring characteristics,
The CPU 73 controls the drawing processing circuit 71 to cause the CDT 28 to display an all-white screen, a single-color RGB screen, an intermediate luminance screen, a low luminance screen, and the like. At this time, the light receiving device 75 measures the state of the CDT 28 on the tube surface. .

The measurement result is digitized by the ADC 74 and input to the CPU 73. In the CPU 73, DAC2
A predetermined operation is performed on the basis of the level of the analog video signal output from 5 and the measurement result, and the result is written to the ROM 72 as display characteristic data of the display device 2E. The data written in this way is transmitted to the computer main unit 1A via the digital I / F 21 when there is a request from the computer main unit 1A or when the power of the display device 2E is turned on.

The transmitted characteristic data is read into the computer main body 1A, and is used for so-called color matching, for example, to match the color of an image displayed on the display device 2E with the color of a printed matter when the color is output to a printer or the like. Is done. Correction instruction data for correcting the deviation from the printed matter at this time by the display device 2E is sent from the computer main body 1A to the display device 2E, and the drawing processing circuit 71 and the CPU 73 correct the analog video signal to be output to the DAC 25. Thus, it is possible to display an image in a color matching the printed matter.

FIG. 1 is a block diagram showing one embodiment of the present invention based on the above. In the figure, a portion 1B surrounded by a dashed line is a computer main body, in which 81 is a drawing processing circuit, 82 is a compression circuit, and a portion 2F surrounded by another dashed line is a display device (the present invention). , In which 83 is a decompression circuit. Other Figure 3
The same reference numerals are the same components.

The circuit operation of FIG. 1 is as follows. CPU 11, main memory 12, I / O in computer body 1B
Port 13, external storage device I / F 14, input device I / F
15 operate in the same manner as a general computer, and various control commands and digital video data input to the CPU 11 from the external storage device 3 or the input device 15 via the bus 10 are transmitted to the CPU 11. Processed in
A control command relating to video generation is sent to the drawing processing circuit 81.
The drawing processing circuit 81 develops this control command into digital video data for actually displaying a video.

Here, the amount of information of the digital video data is a huge amount of information of about several hundred megabytes per second. The data is compressed to the digital I / F 16
To a level that can be transferred. The compressed digital video data is output from the digital I / F 16 to the display device 2F. In addition to the digital video data, the drawing processing circuit 81 also generates synchronizing signal information of the display device 2F and display control data for controlling the display state, and is output from the digital I / F 16 to the display device 2F together with the digital video data. You.

In the display device 2F, the digital I
The digital video data and the display control data compressed by / F21 are received and passed to the decompression circuit 83 at the next stage. The decompression circuit 83 decompresses the compressed digital video data, reproduces it as the original digital video data, and writes it into the VRAM 23. The expansion circuit 8
3 is the display device 2 from the display control data.
The horizontal and vertical synchronizing signals (Hs, Vs) necessary for driving the F deflection circuit 27 are generated, and the setting value of the LUT 24 is rewritten to change the display color of the display image and the image signal level. .

As described above, after storing the digital video data in the VRAM 23, the digital video data is extracted as an analog video signal by the respective processes of the LUT 24 and the DAC 25, passes through the video circuit 26, and drives the CDT 28 so that the CDT 28
Displayed above. In the present embodiment, digital video data is compressed on the transmission side and decompressed on the reception side, so that digital video data can be transmitted in a system based on general interface specifications.

In this embodiment, the switching control circuit 38, the analog signal switching circuit 42 and the like are provided as in the case shown in FIG. By controlling the analog signal switching circuit 42, the same effect as in the reference example of FIG. 7 can be obtained.

FIG. 2 is a block diagram showing another embodiment of the present invention. In the figure, a portion 1C surrounded by a dashed line is a computer main body, in which 91 is a VRAM for storing digital video data, 92 is a compression circuit, and the other portions are the same as those in FIGS. The reference numerals are the same components. Also, a portion 2G surrounded by a dashed line
Is a display device (embodiment of the present invention), in which 93 is a decompression circuit, and the same reference numerals as those in FIG. 3 denote the same components.

In this embodiment, as shown in FIG.
The control command relating to the video generation created by the PU 11 is sent to the drawing processing circuit 81 to create digital video data. The digital video data created by the drawing processing circuit 81 is temporarily stored in the VRAM 91, and is stored in the compression circuit 9 in the next stage.
2 reads the stored digital video data. The compression circuit 92 compresses the read digital video data and sets the data amount to an information amount that can be transmitted by the digital I / F 16.

Further, from the drawing processing circuit 81, control data relating to display on the display device 2G, such as synchronization signal information and display colors, is output and sent to the digital I / F 16. Accordingly, the digital I / F 16 outputs digital video data and control data of the display device 2G after compression processing.

In the display device 2G, the digital I
The data is sequentially sent to the decompression circuit 93 via / F21. The decompression circuit 93 expands the compressed digital video data, sequentially returns to the original digital video data format, and outputs the analog video signal to the video circuit 26 by the LUT 24 and the DAC 25. The expansion circuit 93
Is a synchronizing signal (Hs, Vs) to be given to the deflection circuit 27 from the control data of the display device, and the LUT 24
Create the set value change data for. As above,
A large amount of digital video data can be transmitted on a line based on a general interface specification, so that image quality deterioration and unnecessary radiation on the transmission line can be suppressed.

In this embodiment, as in the case shown in FIG. 7, a switching control circuit 38, an analog signal switching circuit 42, and the like are provided. By controlling the analog signal switching circuit 42, the same effect as in the reference example of FIG. 7 can be obtained.

FIG. 11 is a block diagram showing another reference example of the present invention. In the figure, a portion 2 surrounded by a dashed line
H denotes a display device, in which 101 denotes an input device interface circuit (hereinafter, input device I / I).
F) and 102 are input devices, and the same reference numerals as those in FIG. 3 have the same functions.

The operation of the circuit shown in FIG. 11 will be described below. In this reference example, a computer main unit 1A as shown in FIG. 3 and a display device 2H are connected, and digital digital video data sent from the computer main unit 1A is digital I / F 21, drawing processing circuit 22, VR
An analog video signal is generated by the AM 23, the LUT 24, and the DAC 25 in the same manner as in FIG. 3, and an image is displayed on the CDT 28 by the video circuit 26 and the deflection circuit 27.

Further, the display device 2H shown in FIG.
Then, input devices such as a keyboard, a mouse, a touch panel, and a pen tablet are connected, and the input device I / F 101 captures information from the input device 102. Input device I / F1
01 converts the fetched information into a predetermined format and sends it as a control command to the computer main unit 1A via the digital I / F 21. The computer main unit 1A processes the control command and creates information to be displayed on the display device 2H. The information created in this way is transmitted as digital video data from the digital I / F 16 of the computer main unit 1A, and the display device 2H performs new video display.

As described above, in this embodiment, the display device 2H
By adding input means 102 to the computer main body 1
Even if the installation distance to A is long, information can be input immediately in the vicinity of the display device 2H, and a high-quality video can be displayed without loss of a video signal due to transmission.

FIG. 12 is a block diagram showing another embodiment of the present invention. In the figure, 1A is the computer main body, 2a, 2a
b and 2c are display devices, and IF is a digital interface. The computer main body 1A is the same as that shown in FIG. 3, and each display device has the same configuration as that shown in FIG. 3, FIG. 5, FIG. 6, FIG. 7, FIG. 10, or FIG.

In this embodiment, an image drawing command output from the computer main unit 1A to the digital interface IF is input to each of the display devices 2a, 2b, 2c connected to the digital interface IF, and an image is displayed individually. . Here, prior to the image rendering command,
When a selection command indicating which display device is to be output is output, the interface circuit of each display device determines this, and the corresponding display device receives the next image rendering command.

In this way, the selection command is transmitted to the display devices 2a, 2a,
When all of b and 2c are selected, the same image is displayed at the same time. When the selection command selects the display device 2a, only the image display on the display device 2a is switched to a new one.

As described above, it is possible to connect a plurality of display devices to the digital interface IF and display images individually or all of them at the same time with the same display content, thereby increasing the usability. .

[0079]

According to the present invention, information capable of realizing digital video data for displaying a high-resolution video from a computer to a display device using a digital interface generally used based on a standard is provided. Transmission can be performed at a transmission ratio, and it is possible to reduce line loss, influence of noise, and the like, as compared with the case of transmission using a conventional analog video signal.

Further, since the signals are transmitted in the form of digital signals, audio signals and display control information can be transmitted from the computer to the display device side in addition to the video signals on the same line. On the contrary, there is an advantage that the internal information of the display can be recognized from the display device side to the computer main body side.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a block diagram showing another embodiment of the present invention.

FIG. 3 is a block diagram showing a reference example useful for understanding the present invention.

FIG. 4 is an explanatory diagram showing a comparison between a case where a video to be displayed is transmitted as a video rendering command and a case where the video is transmitted as digital video data.

FIG. 5 is a block diagram showing another reference example of the present invention.

FIG. 6 is a block diagram showing another reference example of the present invention.

FIG. 7 is a block diagram showing another reference example of the present invention.

FIG. 8 is a timing chart illustrating the operation of FIG.

FIG. 9 is a timing chart illustrating the operation of FIG.

FIG. 10 is a block diagram showing another reference example of the present invention.

FIG. 11 is a block diagram showing another reference example of the present invention.

FIG. 12 is a block diagram showing another reference example of the present invention.

[Explanation of symbols]

1A, 1B, 1C: computer body, 11: CPU,
16, 21 ... Digital interface circuit, 2A, 2
B, 2C, 2D, 2E, 2F, 2G, 2H ... display device, 22, 41, 71, 81 ... drawing processing circuit, 2
3, 91 ... Digital video data holding memory circuit, 2
4 Look-up table, 25 Digital-to-analog conversion circuit, 29 Audio processing circuit, 210 Audio memory circuit, 101 Second input device interface circuit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference)

Claims (3)

[Claims] 1. A display device for performing display based on an input video signal, a decompression circuit which receives compressed digital video data including control data as the video signal, and decompresses the compressed digital video data. Signal processing means for performing predetermined signal processing on the digital video data expanded by the expansion circuit based on control data included in the compressed digital video data;
A display device, comprising: a D / A conversion circuit for converting an output signal from the signal processing means into an analog signal; and displaying an image based on an output from the D / A conversion circuit. 2. The signal processing means according to claim 1, wherein the look-up table stores a conversion table for converting digital video data output from the decompression circuit into digital video data having predetermined color signal amplitude information. Yes,
2. The display device according to claim 1, wherein the conversion table of the look-up table is changed by the control data. 3. An image memory for temporarily storing an output signal of the decompression circuit, wherein data stored in the image memory is sequentially read and supplied to the signal processing means. The display device according to claim 1, wherein