JP2001242832A - Display driving device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display driving device which eliminates the need for arranging an invertible amplifier for a video signal outside of a signal side driver, and can also correspond to various driving systems by controlling the inversion function. SOLUTION: When a sampling pulse SP is supplied to an output circuit to which R.G.B signals are supplied, switches 21, 25 or switches 27, 31 are flipped on according to a system selection signal HCNT, and the R.G.B signals are applied to 1st electrodes of each system capacitors 34, 36, and electric charges are stored. Then, when an output-enable signal OE is at a high level and an inversion control signal PCNT is at a low level, switches 22, 24, 26 or switches 28, 30, 32 are flipped on according to the system selection signal HCNT, and the 1st electrodes of the capacitors are connected with a power source Va, and the voltages generated at the 2nd electrodes are supplied to amplifiers. By making the voltage value of the power source Va twice as high as the inversion center voltage Vc of the R.G.B inversion signals to be supplied to the signal line DL, the voltage to be supplied to the amplifiers is inverted against the inversion center voltage Vc, and thus inverted R.G.B signals are generated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a display driving device for driving a display panel, and more particularly to a display driving device having a signal driver for supplying an inverted display signal to a signal line of the display panel.

[0002]

2. Description of the Related Art First, the structure of a conventional display driving device will be briefly described. FIG. 9 shows a conventional display driving device 10 for driving the LCD panel 106.
FIG. 3 is a block diagram showing a configuration of a 0. In the figure, LCD
The panel 106 is generally connected to pixel electrodes arranged in a matrix, a thin film transistor TFT having a source connected to the pixel electrode, a scanning line GL connected to the gates of the plurality of TFTs, and a drain connected to the plurality of TFTs. Signal line DL, a counter electrode (common electrode) disposed opposite the pixel electrode, and liquid crystal filled between the pixel electrode and the counter electrode. Further, a video signal supplied from a video reproducing unit or the like is supplied to the RGB decoder 101,
The color signal and the composite synchronization signal are separated, an RGB signal is generated from the separated color signal, and a horizontal synchronization signal H and a vertical synchronization signal V are generated from the composite synchronization signal. The horizontal synchronization signal H and the vertical synchronization signal V are supplied to the controller 102.

Here, since the LCD panel 106 needs to be driven by an alternating current, the RGB signals generated by the RGB decoder 101 are supplied to the inverting amplifier 103, and the frame pulse signal FR supplied from the controller 102 is supplied.
An RGB inversion signal in which the polarity of the RGB signal is inverted for each frame or for each line by P is generated and supplied to the signal side driver 104. The signal side driver 104 samples and holds the RGB inversion signal according to the horizontal control signal supplied from the controller 102, and
06 to the signal line DL. Scanning driver 10
5 sequentially selects the scanning lines GL of the LCD panel 106 according to the vertical control signal supplied from the controller 102, and applies a scanning pulse to the selected scanning lines GL. The amplifier 107 controls the LCD panel 10 according to the frame pulse FRP signal supplied from the controller 102.
The polarity of the common electrode VCOM 6 is inverted every frame.
Thus, an image is displayed by controlling the orientation of the liquid crystal for each pixel of the LCD panel 106.

FIG. 10A shows a configuration of an output circuit corresponding to each signal line DL of the LCD panel 106 in the signal side driver 104, and FIG. 10B shows a state of each switch in this output circuit. The correspondence with the control signal supplied from the controller 102 to the signal side driver 104 is shown, and a state where each switch is turned on is shown. FIG. 11 is a timing chart showing the operation of the signal-side driver 104 including the operation of each switch of the output circuit. That is, this output circuit includes two systems of sample-and-hold circuits including switches 201 to 204 and capacitors 211 and 212, and amplifiers 221 and 22.
2, one of which includes switches 201 and 202, a capacitor 211, and an amplifier 2
21 and the other system is composed of switches 203 and 2
04, a capacitor 212, and an amplifier 222.

[0005] The signal driver 104 includes a horizontal synchronizing signal H shown in FIG.
An RGB inversion signal shown in FIG. 1B and a horizontal control signal shown in FIG. 11C are input. The signal driver 104 includes a shift register (not shown), and includes a dot clock signal DCK and a sampling start signal S in the horizontal control signal.
RT is input, the sampling start signal SRT is taken into the shift register, and the dot clock signal D
The sampling pulse SP shown in FIG. 11D is supplied to the sample and hold circuit corresponding to the signal line DL sequentially shifted by CK.

Next, as shown in FIG. 11 (e), when the sampling pulse SP is supplied to the sample-and-hold circuit, according to the level of the system selection signal HCNT in the horizontal control signal shown in FIG. 11 (c). , Switch 201 or 203 is turned on, and capacitors 211 or 2 of each system are turned on.
12 stores the RGB signals. Further, the switches 202 or 204 are alternately turned on in response to the system selection signal HCNT and the output enable signal OE in the horizontal control signal, and the RGB stored in the capacitor 211 or 212 is turned on as shown in FIG. The signal is sent to the signal line DL of the LCD panel 106 via the amplifier 221 or 222.
Output to The clear signal CLR in the horizontal control signal
Is a signal used for precharging the signal line DL (not shown).

[0007]

As described above, the LCD
Since the panel 106 needs to be driven by an alternating current, the RGB signal is input to the inverting amplifier 103 to generate an inverted RGB signal for each frame or each line, and supplies the generated inverted RGB signal to the signal driver 104. Then, the RGB inverted signal is sampled and held, and the signal line D
The LCD panel 106 is configured to be driven by an alternating current by outputting to L. For this reason, it is necessary to provide the inverting amplifier 103 for inverting the video signal outside the signal-side driver 104, which causes a problem that the number of components increases and the mounting area increases. For example, when the video signal is an NTSC interlace image signal, various driving methods such as a pair line driving method and a full line driving method using interpolation data are used to prevent flicker. On the other hand, since one signal-side driver circuit can support only one driving method, every time the driving method changes, a driving circuit having a dedicated control function corresponding to each driving method must be designed. Without
In addition, there is a problem that the drive control becomes complicated.

In view of the above-mentioned problems, the present invention provides a signal-side driver circuit having an inversion function of a video signal, thereby eliminating the need for an external inversion amplifier and making the inversion function easily controllable. It is an object of the present invention to provide a display drive device that can respond.

[0009]

According to a first aspect of the present invention, there is provided a display driving apparatus comprising: a driving unit for supplying a driving signal based on an image signal to a plurality of signal lines connected to a plurality of display pixels constituting a display panel. The output circuit of the driving unit, for each of the plurality of signal lines, alternately applies the image signal to a charge storage unit provided in a first and a second path at a predetermined cycle. Store and output 2
A sample and hold circuit of a system, and an amplifier circuit for supplying a signal voltage alternately output from the first and second paths of the sample and hold circuit to the signal line,
At least one of the two systems of sample and hold circuits has a polarity inverting means for inverting and outputting the polarity of the image signal stored in the charge storage section.

The display driving device according to the second aspect is the first aspect.
In the display driving device described in the above, the charge storage unit in the sample and hold circuit includes a charge holding capacitor having a first electrode and a second electrode facing the first electrode, and the first electrode has a charge holding capacitor. A voltage of the image signal is applied,
The second electrode is connected to a ground potential, stores charge corresponding to the voltage of the image signal in the charge holding capacitor, and the polarity inverting means includes a charge holding capacitor that stores the charge. A charge holding capacitor connection switching means for connecting the first electrode to a predetermined power supply and outputting a polarity inversion voltage generated at the second electrode of the charge holding capacitor is provided. According to a third aspect of the present invention, in the display driving apparatus according to the second aspect, a voltage of the predetermined power supply in the polarity inversion means is twice an average voltage of the driving signal supplied to the signal line. Voltage. A display driving device according to a fourth aspect is the display driving device according to the second aspect, wherein the charge holding capacitor connection switching means connects each electrode of the charge holding capacitor based on a connection switching control signal. The state is set.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the display driving device according to the present invention will be described with reference to the drawings.
First, an overall configuration of a display driving device according to the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of a display driving device according to the present invention. In addition,
Parts corresponding to those in FIG. 9 are denoted by the same reference numerals, and description thereof is omitted. In the figure, a video signal supplied from a video reproduction unit or the like is supplied to an RGB decoder 101, where an RGB signal is generated and supplied to a signal driver 2, and a horizontal synchronization signal H and a vertical synchronization signal V are generated. Is supplied to the controller 3. The signal side driver 2 performs the RGB control according to the horizontal control signal supplied from the controller 3.
The signal is sampled and held, and the inversion / non-inversion of the sampled and held RGB signal is controlled based on an inversion control signal included in a horizontal control signal to be described later.
The signal is supplied to the signal line DL of the panel 106.

<First Embodiment> FIG. 2A shows a configuration of an output circuit of a signal driver 2 in a first embodiment of a display driving apparatus according to the present invention. Also,
FIG. 2B shows the correspondence between the state of each switch in the output circuit and the control signal supplied from the controller 3 to the signal-side driver 2, and shows a state where each switch is turned on. FIG. 3 shows the configuration of the output circuit,
FIG. 4 is a diagram for explaining an inversion / non-inversion operation of a sampled and held RGB signal in the output circuit;
5 is a timing chart showing the operation of the signal side driver 2 including the operation of each switch of the output circuit. In the figure, the output circuit according to the first embodiment includes switches 21 to 32, capacitors 34 and 36, and an amplifier 3
3 and 35, two systems of sampling circuits and two systems of amplifiers.
The second system includes switches 27 to 32, a capacitor 36, and an amplifier 35.

The signal driver 2 includes a horizontal synchronizing signal H shown in FIG. 4A and a horizontal synchronizing signal H shown in FIG.
And a horizontal control signal shown in FIG. 4C. This horizontal control signal is obtained by adding an inversion control signal PCNT described later to the horizontal control signal in the conventional display driving device shown in FIG. 9C. The signal driver 2 includes a shift register (not shown).
The dot clock signal DC in the horizontal control signal shown in FIG.
K and the sampling start signal SRT are input, the sampling start signal SRT is taken into the shift register, and is sequentially shifted by the dot clock signal DCK. The sampling pulse SP shown in FIG. Is supplied.

Next, as shown in FIG. 4 (e), when the sampling pulse SP is supplied to the sample hold circuit, the system is controlled according to the system selection signal HCNT in the horizontal control signal shown in FIG. 4 (c). When the selection signal HCNT is at a high level, the switches 21 and 25 are turned on, and when the system selection signal HCNT is at a low level, the switches 27 and 31 are turned on. Thereby, the RGB signals are accumulated in the capacitors 34 or 36 of each system. This system selection signal H
CNT is the same signal as the system selection signal HCNT in the horizontal control signal in the conventional configuration shown in FIG. 9C. Then, while the output enable signal OE in the horizontal control signal shown in FIG. 4C is at a high level, the on / off of each switch is controlled according to the system selection signal HCNT and the inversion control signal PCNT, and the sampling is performed. Whether the RGB signals stored in the capacitors 34 and 36 of each system of the hold circuit are inverted in polarity and output to the amplifiers 33 and 35 or output to the amplifiers 33 and 35 without inverting the polarity is controlled. . The inversion control signal PCNT is a signal that acts so that the polarity inversion operation is performed when it is at a high level and the polarity inversion operation is not performed when it is at a low level, as described below. High level / low level is set accordingly.

That is, the output enable signal O
When E is at a high level and the system selection signal HCNT is at a low level, the inversion control signal PCNT in the horizontal control signal
When PCNT is at a high level, switch 2
When PCNT is at a low level, switches 23, 25, and 26 are turned on. When the output enable signal OE is at a high level,
Further, when the system selection signal HCNT is at a high level, the switches 28 and 3 are switched according to the inversion control signal PCNT in the horizontal control signal, and when the inversion control signal PCNT is at a high level.
When the inversion control signal PCNT is at a low level, the switches 29, 31, and 32 are turned on. Here, when the inversion control signal PCNT is at a low level, that is, when the switches 23, 25, 26, or 2
When the signals 9, 31, and 32 are on, the RGB signals are output without inverting the polarities. When the inversion control signal PCNT is at a high level, that is, when the switches 22, 24, 26 or 28, 30, 32 are turned on. In the case of ON, the RGB signals are inverted and output. This polarity inversion / non-inversion operation will be described with reference to FIG.

FIG. 3A shows a sampling pulse SP and a system selection signal H in a first system of the output circuit.
This indicates a state in which the CNT goes high, the switches 21 and 25 are turned on, and the RGB signals are accumulated in the capacitor 34. FIG. 3B shows the inversion control signal PCNT.
Is a low level, and the RGB signal is output without inverting the polarity. FIG. 3C shows an inversion control signal PC.
A configuration in a case where NT is at a high level and RGB signals are output with their polarities inverted is shown. Although only the first system is shown here, it goes without saying that the same applies to the second system. In the state of FIG. 3A, when the switches 21 and 25 are turned on, an RGB signal is supplied to an electrode (referred to as a first electrode) on the switch 22 side of the capacitor 34 and the switch 2 is turned on.
The electrode on the fifth side (referred to as a second electrode) is connected to the ground potential via the switch 25. Therefore, the RGB signal supplied via the switch 21 is stored in the capacitor 34. Then, in the state of FIG.
5 and 26 are turned on, the RGB signals accumulated in the capacitor 34 are output to the amplifier 33 via the switch 23 as they are, and
The RGB signal is supplied to the signal line DL via the line 6.
That is, the configuration shown in FIGS. 3A and 3B is the same as the operation of accumulating and outputting the RGB signals in the conventional output circuit shown in FIGS. 8A and 8B.

On the other hand, in the state shown in FIG. 3C, when the switches 22, 24 and 26 are turned on, the first electrode of the capacitor 34 is connected to the power supply Va via the switch 22. The second electrode of the capacitor 34 is connected to the amplifier 33 via the switch 24. Here, R supplied to the signal line DL shown in FIG.
When the inversion center voltage of the GB inversion signal is Vc, FIG.
The voltage value V1 of the RGB signal shown in (b) is represented by Expression (1), where the amplitude of the signal is Vp. V1 = Vp + Vc (1) Then, the voltage value of the power supply Va to which the first electrode of the capacitor 34 is connected via the switch 22 is set such that the inverted center voltage is twice the value of Vc.

In the state shown in FIG. 3C, the voltage supplied to the amplifier 33, that is, the voltage V2 generated at the second electrode of the capacitor 34, is supplied to the power source Va at the first electrode and to the capacitor 34. Is accumulated in the direction from the second electrode to the first electrode, and has a potential difference of V1. Therefore, the voltage is obtained by subtracting the voltage V1 from the voltage of the power supply Va, as shown in Expression (2). V2 = Va−V1 (2) Here, since the voltage of the power supply Va has a value (2Vc) that is twice the inversion center voltage of Vc, the voltage V2 is equal to the value represented by the equation (3). Become. V2 = 2Vc− (Vp + Vc) = Vc−Vp (3) This voltage V2 is supplied to the signal line DL. Comparing V1 in equation (1) with V2 in equation (3), V1
And V2 have an amplitude of Vp about the inversion center voltage Vc.
Are inverted from each other. In this manner, the inversion / non-inversion of the RGB signals in the sample and hold circuit is controlled by the inversion control signal PCNT, and the generated RGB signals can be supplied to the signal line DL.

Further, the inversion control signal P shown in FIG.
Although the CNT changes at a different timing from the system selection signal HCNT and has a different high / low level timing, these signals may be the same depending on the driving method. In that case, the system selection signal HCNT also serves as the inversion control signal PCNT,
The horizontal control signal is the same as the horizontal control signal in the conventional display driving device. That is, in the display driving device including the output circuit according to the first embodiment, the inverted RG
By eliminating the need for an inverting amplifier for generating the B signal, the number of components can be reduced to facilitate mounting, the mounting area can be reduced, and the timing of inverting the RGB signal by appropriately setting the inverting control signal PCNT. Can be controlled, and one signal-side driver can cope with various driving methods, and the control can be facilitated. This will be described below.

TV based on NTSC interlaced image signal
When displaying an image signal on an LCD panel, a conventional display driving device uses, for example, a pair line driving method. As is well known, this pair line driving method uses the NTS
An RGB signal based on the C interlace image signal is supplied by an inverting amplifier as a signal which is inverted every horizontal scanning period (1H), and two scanning lines are scanned during one horizontal scanning period, and every two scanning lines are scanned. , A signal voltage of the same polarity is applied, and all lines are sequentially scanned. Then, by shifting the display position by one scanning line for each field, the combination of scanning lines having signal voltages of the same polarity is changed for each field, and driving is performed so that flicker is inconspicuous. But,
Since a signal voltage of the same polarity is applied to every two scanning lines during one field period, generation of flicker cannot be sufficiently reduced, and deterioration of liquid crystal cannot be sufficiently reduced. Further, since control is required to shift the display position by one scanning line for each field, the control is complicated.

On the other hand, when a TV image signal based on an NTSC interlace image signal is similarly displayed on an LCD panel, timing charts in the case where the display driving device according to the above-described first embodiment is used are shown in FIGS. Shown in
FIG. 5 is a view similar to the prior art, as shown in FIG.
The case where the B signal is supplied as a signal that is inverted every horizontal scanning period (1H) is shown. That is, this corresponds to a case where the signal-side driver in the existing configuration is replaced with the signal-side driver according to the present embodiment. In this case, FIG.
As shown in (b), as in the conventional case, the scanning signals GL1 and GL are set so that two scanning lines are scanned during one horizontal scanning period.
L2,... Are applied. Further, as shown in FIG. 5C, the system selection signal HCNT in the control signal is applied corresponding to the scanning line, and the inversion control signal PCNT is applied so as to be inverted every two scanning lines, and Are applied so as to be inverted in the even field and the odd field.
As a result, the polarity of the signal applied to the pixel is inverted for each scanning line as shown in the output signal of FIG.
It can be a signal whose polarity is inverted for each field. As a result, flicker is sufficiently reduced, and deterioration of the liquid crystal is also sufficiently reduced.

FIG. 6 shows, as shown in FIG.
This shows a case where the inverting amplifier for the RGB signals is eliminated and the RGB signals are always supplied with the same polarity. In this case, the scanning signals GL1, GL2,...
Is the same as Then, as shown in FIG. 6C, the system selection signal HCNT in the control signal is applied corresponding to the scanning line, the inversion control signal PCNT is applied so as to be inverted for each scanning line, and the even number It is applied so that it is inverted between the field and the odd field. This allows
The signal applied to the pixel is shown in FIG.
As shown in the output signal of (d), the polarity can be inverted for each scanning line and the signal can be inverted for each field. As a result, flicker is sufficiently reduced, and deterioration of the liquid crystal is also sufficiently reduced. As described above, when the display driving device according to the first embodiment is used, it is possible to eliminate the inverting amplifier,
Only by controlling the inversion control signal PCNT, it is possible to cope with various driving methods, and it is also possible to improve display quality and reliability.

<Second Embodiment> FIG. 7A shows a configuration of an output circuit of a signal driver 2 in a second embodiment of the display driving apparatus according to the present invention. Also,
FIG. 7B shows the correspondence between the state of each switch in the output circuit and the control signal supplied from the controller 3 to the signal-side driver 2, and shows the state where each switch is turned on. FIG. 8 is a timing chart showing the operation of the signal driver 2 including the operation of each switch of the output circuit. In the figure, the output circuit according to the second embodiment includes switches 41 to 46, capacitors 34 and 36, and amplifiers 33 and 35, and includes two sampling circuits and two amplifiers.
The system includes switches 41 and 42, a capacitor 34,
And a second system including a switch 43.
46, a capacitor 36, and an amplifier 35.

The signal driver 2 includes a horizontal synchronizing signal H shown in FIG. 8A and a horizontal synchronizing signal H shown in FIG.
8 and a horizontal control signal shown in FIG. This horizontal control signal is the same as the horizontal control signal in the conventional display driving device shown in FIG. The signal driver 2 has a shift register (not shown), receives the dot clock signal DCK and the sampling start signal SRT in the horizontal synchronizing signal shown in FIG. 8C, takes in the sampling start signal SRT into the shift register, and outputs the dot clock signal. The sampling pulse SP shown in FIG. 8D is supplied to the sample and hold circuit corresponding to the signal line DL sequentially shifted by the signal DCK.

Next, as shown in FIG. 8 (e), when the sampling pulse SP is supplied to the sample hold circuit, the system is controlled according to the system selection signal HCNT in the horizontal control signal shown in FIG. 8 (c). When the selection signal HCNT is at a high level, the switch 41 is turned on, and the system selection signal HC
When NT is at the low level, the switches 43 and 45 are turned on. Thereby, the condenser 34 or 36 of each system
To store the RGB signals. During the period when the output enable signal OE in the horizontal control signal shown in FIG. 8C is at a high level, the on / off of each switch is controlled in accordance with the system selection signal HCNT. , 36 are applied. That is, when the output enable signal OE is at a high level and the system selection signal HCNT is at a low level, the switch 42 is turned on. Also,
When the output enable signal OE is at a high level and the system selection signal HCNT is at a high level, the switches 44 and 46 are turned on.

Here, the configuration of each switch, capacitor and amplifier in the first system is the same as that of the first or second system in the conventional output circuit of FIG. Pulse SP is supplied,
When the system selection signal HCNT goes high, the switch 4
1 is turned on and the RGB signal is stored in the capacitor 34.
This is the same configuration as the storage of the GB signal. Further, in the second system, the sampling pulse SP is supplied, and the system selection signal HCNT becomes low level, and the switches 43, 45
Is turned on, and the RGB signal is stored in the capacitor 36 in the first embodiment.
This is the same configuration as the storage of the GB signal.

Next, the output enable signal OE is at the high level, the system selection signal HCNT is at the low level, the switch 42 is turned on, and the RGB signal stored in the capacitor 34 is supplied to the amplifier 33. In the conventional output circuit of FIG. 10A, the configuration is the same as that in the case where the RGB signals stored in the capacitor are output via the amplifier. In this case, the stored RGB signals are output as they are, and the polarity inversion is performed. Not done.

On the other hand, in the second system, the output enable signal OE is at the high level, the system selection signal HCNT is at the high level, and the switches 44 and 46 are turned on. This corresponds to a configuration in which the RGB signals stored in the capacitors are output with their polarities inverted. That is, in the state shown in FIG.
Electrode on switch 44 side of capacitor 36 (first electrode)
Is connected to the power supply Va via the switch 44, and the electrode (second electrode) on the switch 45 side of the capacitor 36 is connected to the amplifier 35. Here, as in the case of the first embodiment, assuming that the voltage value of the power supply Va is twice the inversion center voltage Vc of the RGB inversion signal supplied to the signal line DL, the voltage supplied to the amplifier 35 is Is the value shown in the above equation (3). Therefore, the RG output from the first system
The B signal and the RGB signal output from the second system are mutually inverted signals. In this way, the generated inverted RGB signals can be supplied to the signal line DL.

That is, in the display driving apparatus having the output circuit according to the second embodiment, the inversion amplifier for generating the inversion RGB signal is not required, so that the number of components is the same as in the first embodiment. By reducing the size, mounting can be facilitated, the mounting area can be reduced, and the same control signal as before can be used without increasing the number of control signals.
A signal can be supplied to the signal line DL. However,
In the case of the second embodiment, the RGB signals are alternately inverted and the order of the inversion is fixed, so that one signal-side driver cannot cope with various driving methods. In each of the embodiments described above, the LCD panel is used as the display panel. However, the present invention is not limited to this. For example, an inversion drive is required as in an electroluminescent panel. It goes without saying that the present invention can be favorably applied to a display driving device for a display panel.

[0030]

According to the first aspect of the present invention, for each of the plurality of signal lines of the display panel, an image is alternately stored at a predetermined cycle in a charge storage section provided in the first and second paths. A display panel comprising: a two-system sample-hold circuit that accumulates and outputs a signal; and an amplification circuit that supplies a signal voltage alternately output from the first and second paths of the sample-hold circuit to the signal line. In the output circuit of the signal side driver, at least one of the two sample and hold circuits has a polarity inversion means for inverting and outputting the polarity of the image signal accumulated in the charge accumulation unit. Accordingly, there is an advantage that an inversion circuit for converting an image signal supplied to the signal-side driver into an inverted image signal becomes unnecessary.

According to a second aspect of the present invention, in the sample and hold circuit, the image signal voltage is applied to the first electrode, and the second electrode is connected to the ground potential. A charge holding capacitor that accumulates the electric charge corresponding to the charge, and connects the first electrode of the charge holding capacitor that accumulates the electric charge to a predetermined power supply to generate the image signal with the inverted polarity. Output by outputting a polarity inversion voltage generated at the second electrode of the storage capacitor, a connection switch for connecting a charge holding capacitor is added, and an inverted image signal can be generated by controlling each switch. Can be obtained. According to the fourth aspect of the present invention, the connection state of the charge holding capacitor is switched based on the connection switching control signal. The advantage is obtained that the side driver can cope with various driving methods.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a display driving device according to the present invention.

FIG. 2 is a circuit diagram showing a part of an output circuit of a signal driver in the first embodiment of the display driving device according to the present invention.

FIG. 3 is a conceptual diagram illustrating an inversion / non-inversion operation of a sampled and held RGB signal in a configuration of an output circuit of a signal side driver in the first embodiment of the display driving device according to the present invention.

FIG. 4 is a timing chart showing the operation of the signal driver in the first embodiment of the display driving device according to the present invention.

FIG. 5 is a timing chart showing an operation in a case where the signal driver in the first embodiment of the display driving apparatus according to the present invention performs line inversion driving by an RGB inversion signal based on an NTSC interlace image signal.

FIG. 6 is a timing chart illustrating an operation when the signal driver in the first embodiment of the display driving apparatus according to the present invention performs line inversion driving by an RGB non-inversion signal based on an NTSC interlaced image signal.

FIG. 7 is a circuit diagram showing a part of an output circuit of a signal driver in a second embodiment of the display driving device according to the present invention.

FIG. 8 is a timing chart showing an operation of a signal driver in a second embodiment of the display driving device according to the present invention.

FIG. 9 is a block diagram illustrating a configuration of a display driving device according to the related art.

FIG. 10 is a circuit diagram showing a part of an output circuit of a signal-side driver of a display driving device according to the related art.

FIG. 11 is a timing chart showing an operation of a signal driver of a display driving device according to the related art.

[Explanation of symbols]

 Reference Signs List 2 signal side driver 3 controller switch 21 to switch 32 switch 33, 35 amplifier 34, 36 capacitor switch 41 to switch 46 switch 101 RGB decoder 102 controller 103 inverting amplifier 104 signal driver 106 LCD panel switch 201 to switch 204 switch 221,222 Amplifier 211,212 Capacitor

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 623 G09G 3/20 623U F term (Reference) 2H093 NA16 NA32 NA33 NC13 NC16 NC22 NC23 NC26 NC34 NC58 ND49 ND50 NE07 5C006 AA01 AA22 AC02 AC21 AC27 AC28 AF51 BB16 BC02 BC06 BC13 BF11 FA04 FA43 5C080 AA10 BB05 CC03 DD13 DD21 DD22 FF09 GG08 JJ02 JJ03 JJ04 KK43 5C094 AA45 BA03 BA43 CA19 CA24

Claims (4)

[Claims] 1. A display driving device having a driving unit for supplying a driving signal based on an image signal to a plurality of signal lines connected to a plurality of display pixels constituting a display panel, wherein the output circuit of the driving unit comprises: Two-system sample-and-hold circuits for alternately storing and outputting the image signals at predetermined intervals in a charge storage unit provided in first and second paths for each of the plurality of signal lines; An amplifier circuit for supplying a signal voltage alternately output from the first and second paths of the sample and hold circuit to the signal line, and at least one of the two systems of sample and hold circuits includes A display driving device, comprising: a polarity inverting unit for inverting and outputting the polarity of the image signal stored in the charge storage unit. 2. The charge storage section of the sample and hold circuit includes a charge holding capacitor having a first electrode and a second electrode facing the first electrode, wherein the first electrode has the image signal. Is applied, the second electrode is connected to the ground potential, and charges corresponding to the voltage of the image signal are stored in the charge holding capacitor, and the polarity inversion means stores the charges. A charge holding capacitor connection switching unit that connects the first electrode of the charge holding capacitor to a predetermined power supply and outputs a polarity inversion voltage generated at the second electrode of the charge holding capacitor. The display driving device according to claim 1. 3. The device according to claim 2, wherein the voltage of the predetermined power supply in the polarity inverting unit is twice the average voltage of the drive signal supplied to the signal line. Display drive. 4. The charge holding capacitor connection switching unit according to claim 2, wherein the connection state of each electrode of the charge holding capacitor is set based on a connection switching control signal. Display drive.