JP2001223361A - Method for manufacturing field-effect transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a high grade MOS interface at low process temperatures. SOLUTION: A MOS interface at a low interface order density is formed by an oxygen radical processing, and further a formation of an insulation film by a SiO deposition with lower damages is continued during an oxygen radical ambience.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field effect transistor formed on a single crystal semiconductor substrate, a thin film transistor formed on an insulator, and a logic circuit, a memory circuit, a display pixel or a liquid crystal of a liquid crystal display formed by the same. The present invention relates to a method for manufacturing a thin film transistor used as a component of a drive circuit.

[0002]

2. Description of the Related Art Semiconductor films such as polycrystalline silicon are widely used in thin film transistors (hereinafter referred to as TFTs) and solar cells. In particular, polycrystalline silicon (poly-Si) TFTs can be formed on a transparent and insulating substrate such as a glass substrate while being able to have a high mobility, and are used for a liquid crystal display (LCD).
It is widely used as a light modulation element for LCDs and liquid crystal projectors, or as a component of a built-in driver for driving liquid crystals, and has successfully created a new market.

As a method of forming a high-performance TFT on a glass substrate, a manufacturing method called a high-temperature process has already been put to practical use. As a method of manufacturing a TFT, a process using a high temperature of about 1000 ° C. is generally called a high-temperature process. The features of the high-temperature process are that relatively high-quality poly-Si can be formed by solid-phase growth of silicon, and that a high-quality gate insulating film (generally silicon dioxide) and a clean poly-
That is, an interface between Si and the gate insulating film can be formed. Due to these characteristics in a high-temperature process, a high-performance TFT with high mobility and high reliability can be stably manufactured. However, in order to use a high-temperature process, a substrate on which a TFT is formed must be able to withstand a high-temperature heat process of 1000 ° C. or higher. Currently, the only transparent substrate that meets this condition is quartz glass. For this reason, the recent poly-S
All iTFTs are formed on a small and expensive quartz glass substrate, and are not suitable for a large size due to cost issues. In addition, the solid phase growth method requires a heat treatment for a long time of about ten hours, and there is a problem that productivity is extremely low. In addition, in this method, since the entire substrate is heated for a long time, thermal deformation of the substrate becomes a big problem, and there is a problem that it is not possible to use a substantially inexpensive large glass substrate. Also hinder cost reduction.

On the other hand, a technique called a low-temperature process is intended to solve the above-mentioned disadvantages of the high-temperature process and to realize a poly-Si TFT with high mobility. In order to use a relatively inexpensive heat-resistant glass substrate, poly-Si with a process maximum temperature of approximately 600 ° C or less
The TFT manufacturing process is generally called a low temperature process. In a low-temperature process, a laser crystallization technique for crystallizing a silicon film using a pulse laser having an extremely short oscillation time is widely used. Laser crystallization is a technique that utilizes the property that an amorphous silicon film on a glass substrate is instantaneously melted by irradiating it with a high-power pulsed laser beam and then crystallized in the process of solidification. Recently, a technique of forming a large-area poly-Si film by scanning while repeatedly irradiating an amorphous silicon film on a glass substrate with an excimer laser beam has been widely used. Further, as a gate insulating film, a silicon dioxide (SiO 2) film of relatively high quality can be formed by a film forming method using plasma CVD, and the prospect of practical use can be obtained. With these techniques, a poly-Si TFT can now be formed on a large-sized glass substrate having a side of about several tens of centimeters.

However, the problem with this low-temperature process is that the laser-crystallized poly-Si film has a high defect density, which greatly affects the mobility and threshold voltage of the TFT. . After a detailed investigation,
10 ¹⁸ to 10 ¹⁹ is contained in the laser-crystallized poly-Si film.
It was found that defects were present at a high density of (cm ⁻³ ). This is a 50nm poly-S which is currently used
Assuming an i film, the surface density is 5 × 10 ^{11 to} 5 × 1
It will be a value of 0 ¹² (cm ^-2 ). As a more serious task, T
The FT MOS interface also has a high-density interface order. Its value is about 10 ¹² (cm ⁻² ). As can be seen, defects exist at the same high density both in the MOS interface and in the poly-Si film. In the case of a field effect transistor, when a voltage is applied to the gate electrode, M
Carriers determined by the OS capacitor capacitance are induced on the semiconductor side. However, the semiconductor side, that is, poly-S
If there are defects at the i film and the MOS interface, the induced carriers are trapped by these defects and cannot contribute to conduction. As a result, a drain current cannot be obtained unless a higher gate voltage is applied to induce more carriers than defects. This is the reason why the threshold voltage of the TFT is increased. At present, there is no effective means for actively controlling the above defects, which results in a high threshold voltage of the TFT or a large variation between lots, which is the biggest problem in the current manufacturing process. I have.
At present, the threshold voltage of a TFT manufactured using a laser-crystallized poly-Si film is about 3 to 4 V. If the threshold voltage can be reduced to, for example, about 1 V, the driving voltage of a circuit made of a TFT can be reduced to one third or less of the current level. The power consumption of the circuit is 2 of the drive voltage.
Since it is proportional to the power, if the driving voltage can be reduced to one third or less, the power consumption can be drastically reduced to about one tenth. By doing so, for example, an ultra-low power consumption liquid crystal display suitable for a display for a portable information device can be realized.
In order to achieve such an object, it is required to reduce both the defect surface densities at the poly-Si and MOS interfaces to about 10 ¹⁰ (cm ⁻² ).

[0006]

SUMMARY OF THE INVENTION In view of the above-mentioned problems, the present invention reduces both defects in a laser-crystallized poly-Si film and defects at a MOS interface.
An object of the present invention is to provide a method for manufacturing a field-effect transistor that realizes improvement in characteristics of an poly-Si TFT and a circuit.

[0007]

According to a first aspect of the present invention, there is provided a method of manufacturing a field-effect transistor, comprising the steps of: subjecting a semiconductor surface as an active layer to oxygen radical treatment to form a semiconductor and a gate insulating film; Characterized by forming an interface. Here, the oxygen radical treatment means that the semiconductor surface is exposed to a gas containing an oxygen atom or an oxygen molecule which is excited from a ground state and is in an energetically active state.

According to a second aspect of the present invention, there is provided a method of manufacturing a field-effect transistor, wherein a semiconductor surface as an active layer is subjected to oxygen radical treatment, and then SiO deposition is performed in an oxygen radical atmosphere. By doing so, an interface between the semiconductor and the gate insulating film is formed. Here, the oxygen radical atmosphere refers to a gas containing oxygen atoms or oxygen molecules which is excited from a ground state and is in an energetically active state. Further, SiO deposition means a method of forming a film by diffusing an SiO molecular beam having a vapor pressure higher than the atmospheric pressure in a vacuum direction in a vacuum.

According to a third aspect of the present invention, there is provided a method of manufacturing a field effect transistor according to the first or second aspect, wherein the semiconductor is a thin film semiconductor. Here, the thin film semiconductor is generally about 5 μm thick.
m means a film semiconductor.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a field effect transistor according to the first, second or third aspect, wherein the semiconductor is formed by crystal growth or recrystallization by light irradiation. It is characterized by the following.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a field effect transistor according to the first, second, third or fourth aspect, wherein the semiconductor is grown or recrystallized by light irradiation. After that, it is formed by performing a hydrogen plasma treatment continuously in a vacuum.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a field effect transistor, comprising the steps of:
6. The method for manufacturing a field-effect transistor according to 4 or 5, wherein the step of performing oxygen radical treatment on the semiconductor surface and depositing SiO in an oxygen radical atmosphere includes the steps of: It is characterized by being performed continuously. Here, semiconductor formation includes crystal growth or recrystallization by light irradiation and hydrogen plasma treatment.

In order to solve the above-mentioned problem, a method of manufacturing a field-effect transistor according to claim 7 is based on claims 1, 2, 3, and 4.
7. The method for producing a field-effect transistor according to 4, 5, or 6, wherein the semiconductor forming step, the oxygen radical treatment of the semiconductor surface, and the step of performing SiO deposition in an oxygen radical atmosphere are performed at the same substrate temperature. I do. Here, the semiconductor forming step includes crystal growth or recrystallization by light irradiation and a hydrogen plasma treatment. In the method of manufacturing a field-effect transistor according to 4, 5, 6, or 7, the step of performing oxygen radical treatment on the semiconductor surface and depositing SiO in an oxygen radical atmosphere includes generating oxygen radicals using inductively coupled plasma as a radical supply source. It is characterized by performing.

In order to solve the above-mentioned problem, a method of manufacturing a field-effect transistor according to claim 9 is based on claims 1, 2, 3,
In the method of manufacturing a field-effect transistor described in 4, 5, 6, 7 or 8, the step of performing oxygen radical treatment on the semiconductor surface and depositing SiO in an oxygen radical atmosphere includes generating oxygen radicals using ECR plasma as a radical supply source. It is characterized by performing. Here, the ECR plasma means a plasma generated by an electron cyclotron resonance (ECR) method.

In order to solve the above-mentioned problems, a method of manufacturing a field-effect transistor according to claim 10 is based on claims 1, 2, and 3.
In the method of manufacturing a field-effect transistor described in 3, 4, 5, 6, 7, 8, or 9, the step of performing oxygen radical treatment on the semiconductor surface and depositing SiO in an oxygen radical atmosphere includes supplying helicon wave plasma by radical supply. It is characterized by generating oxygen radicals as a source.

In order to solve the above-mentioned problems, a method of manufacturing a field-effect transistor according to claim 11 is based on claims 1, 2, and 3.
The method for producing a field-effect transistor according to 3, 4, 5, 6, 7, 8, 9 or 10, wherein the semiconductor surface is treated with an oxygen radical and the SiO 2 is treated in an oxygen radical atmosphere.
In the step of performing vapor deposition, the pressure during vapor deposition is 1 × 10 ⁻² (to
rr) The following is a characteristic feature.

According to a twelfth aspect of the present invention, there is provided a method of manufacturing a field effect transistor.
13. The method of manufacturing a field-effect transistor according to 3, 4, 5, 6, 7, 8, 9, 10 or 11, wherein the oxygen radical treatment and the oxygen radical atmosphere on the semiconductor surface are 100% oxygen gas or inert with oxygen gas. A gas mixture is formed as a source gas.

In order to solve the above-mentioned problems, a method for manufacturing a field-effect transistor according to claim 13 is based on claims 1, 2, and 3.
In the method for producing a field effect transistor according to 3, 4, 5, 6, 7, 8, 9, 10, 11, or 12, the step of performing SiO vapor deposition in the oxygen radical atmosphere includes:
The method is characterized in that the semiconductor surface is started after performing oxygen radical treatment for at least 10 seconds or more.

In order to solve the above problem, a method for manufacturing a field effect transistor according to claim 14 is based on claims 1, 2, and 3.
3. The method for manufacturing a field-effect transistor according to 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, or 13,
After the surface of the semiconductor, which is the active layer, is subjected to oxygen radical treatment, subsequently, SiO is deposited in an oxygen radical atmosphere to form an interface between the semiconductor and the gate insulating film, and then a semiconductor element isolation process is performed. I do. Here, the semiconductor element isolation step is to form the semiconductor into an electrically isolated island pattern or to form an insulator region so that the finally formed elements are electrically insulated from each other. Means the step of performing

According to a fifteenth aspect of the present invention, there is provided a method of manufacturing a field effect transistor according to the fifteenth aspect, wherein the semiconductor element isolation step is performed and then the entire surface of the substrate is re-formed. A gate insulating film is formed.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows that p
The structure of the poly-Si TFT is illustrated.

(1. Formation of Semiconductor Thin Film) In order to carry out the present invention, a base protective film (1) is usually formed on a substrate (101).
02) and a semiconductor thin film (103) are formed thereon. A series of forming methods will be described.

As the substrate (101) to which the present invention can be applied, a conductive substance such as metal, silicon carbide (Si)
C), alumina (Al ₂ O ₃ ), aluminum nitride (Al
Ceramic materials such as N), transparent or non-transparent insulating materials such as fused quartz and glass, semiconductor materials such as silicon wafers, and LSI substrates processed therefrom are possible. The semiconductor film is deposited directly on the substrate or via a lower protective film, a lower electrode, and the like.

As the underlying protective film (102), a silicon oxide film (SiO _x : 0 <x ≦ 2) or a silicon nitride film (Si ₃ N _x : 0)
<X ≦ 4). When it is important to control impurities in a semiconductor film, such as when a thin-film semiconductor device such as a TFT is formed on a normal glass substrate, mobile ions such as sodium (Na) contained in the glass substrate are removed from the semiconductor film. It is preferable to deposit a semiconductor film after forming a base protective film so as not to mix in the semiconductor film. The same situation applies when various ceramic materials are used as the substrate. The underlayer protective film prevents impurities such as a sintering aid material added to the ceramic from diffusing and mixing into the semiconductor portion. When a conductive material such as a metal material is used as a substrate and the semiconductor film must be electrically insulated from the metal substrate, a base protective film is indispensable to ensure insulation. In addition, semiconductor substrates and LSI
When a semiconductor film is formed on an element, an interlayer insulating film between transistors and between wirings is also a base protective film.

The undercoat protective film is firstly washed with an organic solvent such as pure water or alcohol, and then is deposited on the substrate by atmospheric pressure chemical vapor deposition (APCVD) or low pressure chemical vapor deposition (LPCV).
D method), a CVD method such as a plasma enhanced chemical vapor deposition method (PECVD method), or a sputtering method. When a silicon oxide film is used as the base protective film, the atmospheric pressure chemical vapor deposition method can deposit the substrate using monosilane (SiH ₄ ) or oxygen as a raw material at a substrate temperature of about 250 ° C. to about 450 ° C. In the plasma chemical vapor deposition method and the sputtering method, the substrate temperature is from room temperature to about 400 ° C. The thickness of the base protective film must be sufficient to prevent diffusion and mixing of the impurity element from the substrate, and the value is at least about 100 nm or more. Considering the variation between lots and substrates, the thickness is preferably about 200 nm or more, and if it is about 300 nm, it can sufficiently function as a protective film. When the underlayer protective film also serves as an interlayer insulating film between IC elements or wiring connecting these, usually 4
The thickness is about 00 to 600 nm. If the insulating film is too thick, cracks occur due to stress in the insulating film. Therefore, the maximum thickness is preferably about 2 μm. When it is strongly necessary to consider productivity, the upper limit of the insulating film thickness is about 1 μm.

Next, the semiconductor thin film (103) will be described. As a semiconductor film to which the present invention is applied, silicon (S
i) or a semiconductor film of a simple substance of Group 4 such as germanium (Ge), as well as silicon germanium (Si _x Ge ₁ -x: 0 <
x <1) or silicon carbide (Si _x C _1-x : 0 <
x <1) or germanium carbide (Ge _X C _1-X :
Semiconductor film of a group 4 element complex such as 0 <x <1), gallium arsenide (GaAs), indium antimony (InS
b) or a composite compound semiconductor film of a Group III element and a Group V element, or a composite compound semiconductor film of a Group II element and a Group 6 element such as cadmium selenium (CdSe). Alternatively, silicon, germanium, gallium, arsenic (Si _X G
_{e Y Ga Z As Z: x} + y + z = 1) and the further complex compound semiconductor film say and phosphorus in these semiconductor films (P), arsenic (As), N-type semiconductor obtained by adding a donor element such as antimony (Sb) The present invention is applicable to a film or a P-type semiconductor film to which an acceptor element such as boron (B), aluminum (Al), gallium (Ga), or indium (In) is added. These semiconductor films are formed by a CVD method such as an APCVD method, an LPCVD method, or a PECVD method, or a PVD method such as a sputtering method or an evaporation method. When a silicon film is used as a semiconductor film, disilane (Si ₂ H ₆ ) or the like can be deposited at a substrate temperature of about 400 ° C. to about 700 ° C. by LPCVD. PECVD
In this method, deposition can be performed at a substrate temperature of about 100 ° C. to about 500 ° C. using monosilane (SiH ₄ ) as a raw material.
When using the sputter method, the substrate temperature is set to 400 from room temperature.
It is about ° C. The initial state (as-deposited state) of the semiconductor film thus deposited is amorphous, mixed crystal,
There are various states such as microcrystalline or polycrystalline, but in the present invention, the initial state may be any state. Incidentally, in the present specification, not only amorphous crystallization,
The term “crystallization” includes recrystallization of polycrystalline and microcrystalline materials. The thickness of the semiconductor film is 2 when it is used for a TFT.
About 0 nm to about 100 nm is suitable.

(2. Laser Crystallization of Semiconductor Thin Film) After forming a base insulating film and a semiconductor film on a substrate, the semiconductor film is crystallized by laser irradiation. Usually LPCVD
The surface of a silicon film deposited by a CVD method such as the PECVD method or the PECVD method is often covered with a natural oxide film. Therefore,
It is necessary to remove this natural oxide film before irradiating the laser beam. For this purpose, there are a method of immersing in a hydrofluoric acid solution for wet etching, a method of dry etching in plasma containing fluorine gas, and the like.

Next, the substrate provided with the semiconductor film is set in a laser irradiation chamber. A part of the laser irradiation chamber is made of a quartz window, and after evacuating the chamber to vacuum, a laser beam is irradiated from the quartz window.

Here, the laser beam will be described. It is desired that the laser light is strongly absorbed on the surface of the semiconductor thin film (103) and hardly absorbed by the insulating film (102) and the substrate (101) directly below. Therefore, as the laser light, an excimer laser, an argon ion laser, a YAG laser harmonic, or the like having a wavelength in or near the ultraviolet region is preferable. Further, in order to heat the semiconductor thin film to a high temperature and to prevent damage to the substrate at the same time, it is necessary to have a large output and an extremely short pulse oscillation. Accordingly, among the above laser beams, an excimer laser such as a xenon chloride (XeCl) laser (wavelength 308 nm) or a krypton fluoride (KrF) laser (wavelength 248 nm) is most suitable. Next, a method for irradiating these laser beams will be described with reference to FIG. Laser pulse intensity half width is about 10 ns to 500 ns
Very short time. Laser irradiation on substrate (200)
At room temperature (about 25 ° C.) to about 400 ° C. in a vacuum with a background vacuum degree of about 10 ⁻⁴ Torr to about 10 ⁻⁹ Torr. One irradiation area of the laser irradiation has a square or rectangular shape with a diagonal of about 5 mm to about 60 mm. A case will be described in which a beam that can crystallize a square area of, for example, 8 mm by one irradiation of laser is used. After one laser irradiation (201) is performed in one place, the position of the laser is slightly shifted relative to the substrate in the horizontal direction (203). Thereafter, one laser irradiation (202) is performed again. By continuously repeating the shot and scan, it is possible to cope with a substrate having a large area. More specifically, the irradiation area is shifted from about 1% to about 99% for each irradiation (for example, 50%:
4 mm in the previous example). After scanning in the horizontal direction (X direction) first, then it is shifted in the vertical direction (Y direction) by an appropriate amount (204), and is again shifted in the horizontal direction by a predetermined amount (203), and thereafter, this scanning is repeated. First laser irradiation is performed on the entire surface of the substrate. The first laser irradiation energy density ranges from about 50 mJ / cm ² to 600 mJ / cm ^2.
It is preferably between about cm ² . After the first laser irradiation is completed, a second laser irradiation is performed on the entire surface as necessary. When performing the second laser irradiation, the energy density thereof is preferably higher than that of the first laser irradiation.
It may be between about J / cm ^{2 and} about 1000 mJ / cm ² . The scanning method is the same as that of the first laser irradiation, and scans the square irradiation area by shifting it by an appropriate amount in the Y direction and the X direction. Further, if necessary, the third or fourth laser irradiation with a higher energy density can be performed. When such a multi-step laser irradiation method is used, it is possible to completely eliminate the variation caused by the end portion of the laser irradiation area. The laser irradiation is performed not only at each irradiation of the multi-stage laser irradiation but also at an ordinary one-step irradiation at an energy density that does not damage the semiconductor film. In addition to this, as shown in FIG.
A line with a length of several tens of cm or more (301)
The crystallization may be advanced by scanning the linear laser light. In this case, the overlap in the width direction of the beam for each irradiation is about 5% to about 95% of the beam width. If the beam width is 100 μm and the overlap amount per beam is 90%,
Since the beam advances 10 μm for each irradiation, the same point is 10
Laser irradiation will be performed twice. Normally, at least about five times of laser irradiation is desired to uniformly crystallize the semiconductor film over the entire substrate, so that the beam overlap amount for each irradiation needs to be about 80% or more. In order to surely obtain a polycrystalline film with high crystallinity, the overlap amount is set to about 90% to 9 so that the same point is irradiated about 10 to 30 times.
It is preferable to adjust to about 7%.

(3. Plasma Treatment of Semiconductor Thin Film) In the poly-Si film immediately after laser crystallization, 10 ¹⁸ (c
Defects are present at a density as high as m ⁻³ ). This is because laser crystallization is an extremely high-speed crystal growth, and particularly, many defects are localized at crystal grain boundaries. The nature of these defects is dangling bonds of silicon, which are usually neutral but have the property of capturing carriers and being charged. If these defects are present in the poly-Si film at a high density, all the carriers induced by the field effect are trapped by the defects when trying to operate the TFT, so that no current flows between the source and drain electrodes. It will be. As a result, it becomes necessary to apply a higher gate voltage, which causes an increase in the threshold voltage. In order to prevent this, after the entire crystallization is completed by the above-mentioned laser crystallization step, hydrogen, oxygen, and nitrogen gas are introduced into the laser crystallization chamber, which was in a vacuum atmosphere, through a mass flow controller, and the entire sample is scattered by a parallel plate RF electrode. To perform plasma discharge. Here, the gas is, for example, 1
The flow rate is adjusted so that the pressure becomes about Torr. Plasma can also be generated by inductively coupled RF discharge, DC discharge, or ionization using thermoelectrons by a hot filament. Po immediately after laser crystallization
By subjecting the ly-Si film to hydrogen plasma treatment for 5 seconds to 300 seconds, the defects in the film are dramatically reduced to a density of about 10 ¹⁶ (cm ⁻³ ), and an electrically excellent poly-Si film is obtained. I can do it.

Since hydrogen has a very high diffusion rate in the silicon film, for example, poly-S having a thickness of about 50 nm is used.
For i, a processing time of about 160 seconds is sufficient. Hydrogen has a small atomic radius and can efficiently passivate defects to a deep position of the poly-Si film, that is, an interface with the underlayer. The hydrogen plasma has the effect of the silicon etching mode depending on the substrate temperature. In order to avoid this, it is necessary to keep the substrate temperature at approximately 100 ° C. to 400 ° C. In order to shorten the tact time of the process, it is effective to move the substrate to another vacuum chamber by a vacuum robot arm after performing the laser crystallization and perform the hydrogen, oxygen and nitrogen plasma treatment.

As a process for reducing defects, hydrogen plasma is suitable for the above-described reason, but it is also possible to reduce defects by plasma treatment such as oxygen plasma, nitrogen plasma, and fluorine plasma.

(4. Formation of MOS interface)
Although it is possible to achieve high quality of the y-Si film,
A more important process is a step of forming a high-quality poly-Si film-gate insulating film interface. It is necessary to reduce the interface order density by successfully bonding oxygen atoms to silicon atoms existing on the poly-Si surface. There are approximately 10 ¹⁵ (cm ⁻² ) bonds on the surface of the silicon film. T
In order to improve the transistor characteristics of the FT, it is necessary to suppress the interface order density to about 10 ¹⁰ (cm ⁻² ).
That is, only about one defect is allowed for 100,000 silicon bonds, and the other bonds must be bonded to oxygen atoms in an orderly manner, which is very severe. In the conventional process, the poly-Si surface is exposed to a photoresist or a chemical solution and is not actively controlled, so that the interface order density is at most 10 ¹² (c).
m ⁻² ). However, in the oxygen radical atmosphere disclosed in the present invention, S
An extremely good interface is formed even in a low-temperature process of 400 ° C. or less by the technique of performing iO vapor deposition. p
A considerable amount of carbon atoms are present on the surface of the poly-Si film, which hinders formation of a clean MOS interface. The oxygen radical treatment is extremely effective in removing the carbon atoms from the surface and forming a good silicon-oxygen bond with the silicon atoms. This is because oxygen radicals play a role both in reacting with and separating carbon on the surface, and in forming a bond by bonding with a silicon atom that subsequently appears on the surface. Oxygen radicals are formed even by simple oxygen plasma treatment, but high-energy ions present in the plasma can easily break good bonds between silicon and oxygen atoms, resulting in lower interface order density. You can't. After a high-quality MOS interface is formed by oxygen radicals, the SiO molecular beam coming to the surface reacts with the oxygen radicals, so that a good insulating film with low damage can be continuously formed. Since the MOS interface formed by oxygen radicals is limited to the very surface, the first-layer gate insulating film (10
5) When the formation is performed by a method such as plasma CVD, a favorable MOS interface is disturbed. Therefore, MO deposition with low interface order density can be performed by depositing SiO in an oxygen radical atmosphere.
The S interface is maintained. Thus, the presence of oxygen radicals is essential in forming a good silicon-oxygen bond. Although the MOS interface can be formed by simply depositing SiO in an oxygen atmosphere, the interface order density is inferior to that formed in an oxygen radical atmosphere. FIG. 5 shows a MOS capacitor (500) manufactured by the MOS interface forming method of the present invention and a MOS capacitor (50) manufactured by vacuum-depositing SiO without using oxygen radicals and oxidizing an insulating film by oxygen plasma.
It shows the difference in the high frequency CV characteristic (1 MHz) of 1). Although the insulating film thickness is 50 to 60 nm in both cases, the MOS capacitor formed by depositing SiO in oxygen radicals has a small interface order and shows a very steep rise of the curve (500). As can be seen, the interface treatment with oxygen radicals is extremely important for reducing the interface order density.

As a specific process, the poly-Si film formed by laser crystallization is subjected to a hydrogen plasma treatment continuously in a vacuum, and then the MO-film is processed without breaking the vacuum.
It is vacuum transferred to the S interface forming chamber. In order to reduce the tact time of the process, it is desirable that the substrate be processed while constantly maintaining a constant temperature during the processes of laser crystallization, plasma processing, and MOS interface formation process. An appropriate substrate temperature at this time is approximately 100 ° C. to 350 ° C. The substrate is kept at 100 ° C. to 350 ° C. in a vacuum chamber, and the chamber is evacuated until the background vacuum degree reaches the order of 10 ⁻⁷ (torr). To deposit SiO, put the powder in a crucible,
There are a method using a K cell having a mechanism for heating the surroundings to a temperature of 1000 ° C. to 1200 ° C. by a heater, and a method of electron beam evaporation. Since the saturated vapor pressure of SiO reaches 10 ^-4 to 10 ^-3 (torr) at the above heating temperature, when the shutter is opened, the SiO molecular beam is irradiated toward the substrate. Here, silicon may be used in addition to SiO as the evaporation source, but in this case, a sufficient vapor pressure cannot be obtained unless heating is performed at a higher temperature. In such a state, oxygen gas or nitrogen gas or inert gas and oxygen,
A gas mixture with nitrogen gas is introduced and the pressure is increased to 10 ^-5 to 10 ^-2.
(Torr). The gas pressure is determined in consideration of the vapor pressure of the substance to be deposited by the K cell and the discharge conditions of the radical source that generates radicals. That is, the pressure must be lower than the vapor pressure of the evaporation source, and the pressure must be sufficient to generate radicals efficiently. When evaporating SiO and supplying oxygen radicals by inductively coupled plasma discharge, 1
An oxygen gas pressure of × 10 ^-4 to 1 × 10 ^-3 (torr) is appropriate. Under this pressure, oxygen radicals and nitrogen radicals are generated. Radical generation sources include a plasma discharge and a thermal excitation method using a hot wire, but a plasma discharge is simple and advantageous with good reproducibility. In order to increase radical generation efficiency, it is also effective to perform discharge using a mixed gas of an inert gas such as helium or krypton, oxygen gas, and nitrogen gas. However, in the parallel plate type RF discharge, the discharge pressure cannot be reduced to 0.1 (torr) or less, so that the above gas pressure condition cannot be satisfied, which is inappropriate. As a discharge form capable of efficiently generating radicals under a low pressure, an inductively coupled RF discharge, an ECR plasma discharge, and a helicon wave plasma discharge are suitable. This is because these can generate oxygen radicals with high efficiency while observing the gas pressure conditions. Since the MOS interface formation process of the present invention essentially uses radicals,
It is desirable that electrons and ions generated by the plasma discharge do not exist in the process region as much as possible. Alternatively, even if it is present, it must be a low electron temperature plasma that causes little damage to the MOS interface. Therefore, the plasma generation region and the region where the process is performed must be separated by a mesh or the like. As described above, since the most important first layer at the MOS interface is formed by the effect of oxygen radicals, first, the surface treatment of the poly-Si film with oxygen radicals is performed while the shutter of the SiO vapor deposition source is closed. This processing time depends on the input power to the radical source, but is generally performed for about 1 minute to 10 minutes. After a good interface is formed in this way, the shutter of the K cell is opened and SiO is continuously supplied to the substrate surface in an oxygen radical atmosphere. In this way, a well-formed MOS
Since a good quality insulating film is deposited following the interface,
By the above method, an extremely excellent MOS structure can be formed. The insulating film (10
5) The film thickness of high quality MO
The thickness must be such that the S interface is not affected. Therefore, an insulating film having a thickness of at least about 10 nm is formed. As described above, the MOS interface forming process according to the present invention provides a very high quality MOS interface while being a low temperature process of 400 ° C. or less.

(5. Element Isolation Step) An extremely high-quality MOS structure was formed by a continuous process in a vacuum of laser crystallization, plasma treatment, and MOS interface formation. Next, TFT
An element isolation step is performed to electrically insulate the elements. Here, as shown in FIG. 1, the insulating film and the poly-S
The i film is continuously etched. After a pattern is formed on the insulating film (105) by photolithography, SiO ₂ is etched by wet or dry etching. Subsequently, the poly-Si film is etched by dry etching. Here, SiO ₂ and poly-
Since two layers of the Si film are etched, care must be taken so that the shape of the edge after the etching does not become an eaves shape.

(6. Formation of Gate Insulating Film) After forming an island-shaped SiO ₂ and poly-Si film, a gate insulating film (106) is further formed on the entire surface of the substrate. Examples of a method for forming the gate insulating film include an ECR plasma CVD method and a parallel plate RF discharge plasma CVD method. Alternatively, the insulating film may be formed again by vapor deposition of SiO in oxygen radicals.

(7. Subsequent Steps) Subsequently, a thin film to be the gate electrode (107) is deposited by a PVD method or a CVD method. This material is desired to have a low electric resistance and to be stable to a heat process at about 350 ° C., for example, a high melting point metal such as tantalum, tungsten, and chromium is suitable. When the source and the drain are formed by ion doping, the gate electrode needs to have a thickness of about 700 nm in order to prevent channeling of hydrogen. Tantalum is the most suitable as the material which does not cause cracks due to film stress even when formed into a film having a thickness of 700 nm among the refractory metals. After depositing a thin film to be a gate electrode, patterning is performed, and then impurity ions are implanted into the semiconductor film to form source / drain regions (10
8, 109) are formed. At this time, since the gate electrode serves as a mask for ion implantation, the channel has a self-aligned structure formed only under the gate electrode. Impurity ion implantation is an ion doping method in which hydride and hydrogen of an impurity element are implanted using a mass non-separable ion implanter, and an ion implantation method in which only a desired impurity element is implanted using a mass separable ion implanter. Two types of law can be applied. As a source gas for the ion doping method, a hydride of an implanted impurity element such as phosphine (PH ₃ ) or diborane (B ₂ H ₆ ) diluted in hydrogen and having a concentration of about 0.1% to about 10% is used. In the ion implantation method, only a desired impurity element is implanted, and then hydrogen ions (protons or hydrogen molecular ions) are implanted. MO as described above
In order to keep the S interface and the gate insulating film stable, it is preferable that the substrate temperature at the time of ion implantation be 350 ° C. or lower regardless of the ion doping method or the ion implantation method. On the other hand, in order to constantly and stably activate the implanted impurities at a low temperature of 350 ° C. or less (this is referred to as low-temperature activation in this application), it is desirable that the substrate temperature at the time of ion implantation be 200 ° C. or more. In order to reliably activate low-concentration impurity ions implanted at a low temperature, such as performing channel doping to adjust the threshold voltage of a transistor or forming an LDD structure, it is necessary to perform ion doping at the time of ion implantation. Substrate temperature is 250
It is necessary that the temperature be at least ℃. When the ion implantation is performed in such a state where the substrate temperature is high, recrystallization occurs at the same time as the crystal breakage accompanying the ion implantation of the semiconductor film, and as a result, it is possible to prevent the ion implantation portion from becoming amorphous. It is. That is, the ion-implanted region remains crystalline after the implantation, and the implanted ions can be activated even if the subsequent activation temperature is as low as about 350 ° C. or less.
When fabricating a CMOS TFT, one of an NMOS and a PMOS is alternately covered with a mask using an appropriate mask material such as a polyimide resin, and the respective ions are implanted by the above-described method.

Laser activation by irradiating an excimer laser or the like is an efficient method for activating impurities.
This is a method in which the doped poly-Si in the source and drain portions is melted and solidified by laser irradiation through an insulating film to activate the impurities.

Next, a contact hole is formed on the source / drain, and a source / drain extraction electrode (110,
111) and wiring are formed by a PVD method, a CVD method, or the like to complete a thin film transistor.

[0040]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIG. The substrate and the underlying protective film used in the present invention conform to the above description, but here, as an example of the substrate, 300 mm
× 300 mm square general-purpose alkali-free glass (10
Use 1). First, a base protective film (102), which is an insulating material, is formed on a substrate 101. Here, the substrate temperature is set to 1
A silicon oxide film having a thickness of about 200 nm is deposited by ECR-PECVD at 50 ° C. Next, a semiconductor film (103), such as an intrinsic silicon film, which will be an active layer of the thin film transistor later, is deposited. The thickness of the semiconductor film is about 50 nm. In this example, using a high vacuum LPCVD apparatus,
Disilane (Si ₂ H ₆ ) as a raw material gas was converted to 200 SCCM.
The amorphous silicon film 103 is deposited at a deposition temperature of 425 ° C. First, the reaction chamber of the high vacuum LPCVD apparatus is 25
At a temperature of 0 ° C., a plurality of sheets (for example, 17
Are placed with their front sides facing downward. After this, the operation of the turbo-molecular pump is started. After the turbo-molecular pump reaches steady rotation, the temperature in the reaction chamber is raised from 250 ° C. to a deposition temperature of 425 ° C. over about one hour.
During the first 10 minutes after the start of the temperature rise, the temperature was raised in a vacuum without introducing any gas into the reaction chamber, and then the purity was 99.99.
The nitrogen gas of 99% or more is kept flowing at 300 SCCM. The equilibrium pressure in the reaction chamber at this time is 3.0 × 10 ⁻³ T
orr. After reaching the deposition temperature, disilane (Si ₂ H ₆ ) as a source gas is flowed at 200 SCCM, and helium (He) for dilution having a purity of 99.9999% or more is flowed at 1000 SCCM. The pressure in the reaction chamber immediately after the start of the deposition is about 0.85 Torr. As the deposition proceeds, the pressure in the reaction chamber gradually increases, and the pressure immediately before the end of the deposition becomes approximately 1.25 Torr. The silicon film (103) thus deposited has a thickness of 286 mm except for about 7 mm at the periphery of the substrate.
In the corner region, the variation in the film thickness is within 5%.

Next, prior to the laser crystallization, the amorphous silicon film is immersed in a hydrofluoric acid solution to etch the natural oxide film on the semiconductor film (103). Generally, the surface where the silicon film is exposed is very unstable, and easily reacts with the atmospheric substance holding the silicon thin film. Therefore, it is necessary to not only remove the natural oxide film but also to stabilize the exposed surface of the silicon film in the pretreatment for performing the laser irradiation. For this purpose, treatment with a hydrofluoric acid solution is desirable. Hydrofluoric acid has a mixing ratio of 1: 3 with pure water.
Set to 0. About 20 to 30 in this hydrofluoric acid solution
Immediately after soaking for 2 seconds, pure water washing is performed for 10 to 20 minutes. Thereafter, pure water is removed with a spinner. As a result, the silicon film surface becomes a stabilized surface terminated with hydrogen atoms.

Next, laser light irradiation is performed. In the present embodiment, an excimer laser (wavelength: 308 nm) of xenon chloride (XeCl) is applied. The half width of the laser pulse intensity (half width with respect to time) is 25 ns. After setting the substrate in the laser crystallization chamber,
Evacuate. After evacuation, set the substrate temperature to 250 ° C
Up to One laser irradiation area is a square shape of 10 mm square, and the energy density on the irradiation surface is 160 mJ.
/ Cm ² . Irradiation is repeated while overlapping the laser beams by 90% (that is, 1 mm each time they are irradiated) and relatively displaced (see FIG. 2). Thus, one side is 300
Crystallize amorphous silicon over the entire substrate of mm.
A second laser irradiation is performed using a similar irradiation method.
The second energy density is 180 mJ / cm ² .
Repeat this for the third and fourth times and about 20 mJ / cm ²
The irradiation with an energy density of 440 mJ / cm ² is finally performed while increasing the irradiation energy density, and the laser irradiation is terminated. Here, when high energy exceeding the irradiation laser energy density of 450 mJ / cm ² was applied, p-Si grains caused microcrystallization, so that further energy irradiation was avoided.

Next, hydrogen gas is introduced into the laser crystallization chamber. In this example, 99.999% hydrogen gas was introduced from a mass flow controller, and the pressure in the chamber was adjusted to 1 (torr). In this state, a parallel plate electrode movable in a vacuum is moved to a position above the substrate, and RF is applied to the substrate at 13.56 MHz to perform discharge, thereby terminating defects in the laser-crystallized poly-Si film with hydrogen. Was. The substrate temperature was 250 ° C., and the input RF power was 3 W / cm ² . Since hydrogen can diffuse into the film in a sufficiently short time, the po
Defects existing at a deep position in the ly-Si film and at the interface with the underlying layer are efficiently terminated.

Next, the substrate (100) is transferred to the MOS interface formation chamber (400) while maintaining the vacuum. After the substrate transfer, the inside of the chamber is evacuated to a degree of vacuum of the order of 10 ⁻⁷ (torr). On the other hand, the K cell is a shutter (401)
Is closed, a crucible (403) containing 200 mesh, 99.99% pure SiO powder is heated from 1000 ° C. to 1200 ° C. using a tantalum wire (404). In this state, oxygen gas is supplied into the chamber under the control of the mass flow controller (405) for 1 sc.
cm and the pressure is maintained at 1 × 10 ⁻⁴ (torr).
Oxygen gas was also supplied to the radical generating source, and oxygen radicals were generated under the same pressure by inductively coupled discharge (power 300 W) in the perforated ceramic (407) discharge chamber (410). The plasma is confined in the discharge chamber (407), but is diffused by neutral oxygen radicals.
In order to form the MOS interface of the poly-Si film, oxygen radical treatment was performed for 5 minutes. Thereafter, the shutter (401) of the K cell was opened, and the substrate was irradiated with an SiO molecular beam to form a first gate insulating film (105) of 30 nm.

Next, the substrate is taken out of the vacuum chamber, and p
Continuous etching of the poly-Si film and the first-layer insulating film was performed. Subsequently, in this example, the substrate temperature was set to 350 ° C. by the parallel plate type rf discharge PECVD method in this example.
As 70 nm. TEOS as source gas
Employing a mixed gas _{(Si- (O-CH 2 -CH} 3) 4) and oxygen (O _2). Subsequently, a thin film serving as a gate electrode (107) is deposited by a PVD method or a CVD method. Normally, the gate electrode and the gate wiring are made of the same material in the same process. Therefore, it is desired that this material has low electric resistance and is stable to a heat process at about 350 ° C. In this example, a tantalum thin film having a thickness of 600 nm is formed by a sputtering method. The substrate temperature for forming the tantalum thin film is 180 ° C., and an argon gas containing 6.7% of a nitrogen gas is used as a sputtering gas. The thus formed tantalum thin film has an α-structure crystal structure, and its specific resistance is approximately 40 μΩ.
cm. After depositing a thin film to be a gate electrode, patterning is performed, and then impurity ions are implanted into the semiconductor film to form source / drain regions (108, 109) and a channel region. At this time, since the gate electrode serves as a mask for ion implantation, the channel has a self-aligned structure formed only under the gate electrode. As a source gas for the ion doping method, a concentration of 0.1 diluted in hydrogen is used.
About 1% to about 10% of a hydride of an implantation impurity element such as phosphine (PH ₃ ) or diborane (B ₂ H ₆ ) is used. In this example, phosphine (PH ₃ ) having a concentration of 5% diluted in hydrogen is injected at an acceleration voltage of 100 keV by using an ion doping apparatus in order to form an NMOS. P
The total ion implantation amount including H ₃ ⁺ and H ₂ ⁺ ions is 1 × 10
¹⁶ cm ^-2 .

Next, a contact hole is formed on the source / drain, and a source / drain extraction electrode (110,
111) and wiring are formed by a PVD method, a CVD method, or the like to complete a thin film transistor.

In the prior art, an effective process for forming a high quality MOS interface has not been clarified. However, as described above, the use of the method for manufacturing a field-effect transistor of the present invention makes it possible to form an extremely high-quality MOS interface. As a result, a field effect transistor having a high mobility and a low threshold voltage can be manufactured, and an ultra-low power consumption circuit can be realized.

[Brief description of the drawings]

FIG. 1 is a process sectional view showing a method for manufacturing a field effect transistor of the present invention.

FIG. 2 shows a laser beam irradiation method during laser crystallization.

FIG. 3 shows a laser beam irradiation method during laser crystallization.

FIG. 4 is a diagram showing a MOS interface forming step of the present invention.

FIG. 5 shows CV characteristics of a MOS structure manufactured by a MOS interface forming step of the present invention.

[Explanation of symbols]

 101. . . Substrate 102. . . Base insulating film 103. . . Semiconductor film 104. . . Laser light 105. . . First layer gate insulating film 106. . . Second layer gate insulating film 107. . . Gate electrode 108. . . Source 109. . . Drain 110. . . Source electrode 111. . . Drain electrode 201. . . Laser irradiation area 203. . . x direction movement 204. . . Movement in y direction 301. . . Line-shaped laser beam 401. . . Shutter 403. . . Crucible 404. . . Heaters 405, 408. . . Matching unit 406. . . Gas cylinder 409. . . High frequency power supply

 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) GG45 GG47 HJ12 HJ13 HJ22 HJ23 NN02 PP03 PP38 QQ04 QQ05 QQ09

Claims (15)

[Claims] 1. A method for manufacturing a field-effect transistor, comprising forming an interface between a semiconductor and a gate insulating film by subjecting a semiconductor surface as an active layer to oxygen radical treatment. 2. A method for manufacturing a field-effect transistor, wherein an interface between a semiconductor and a gate insulating film is formed by subjecting a semiconductor surface as an active layer to oxygen radical treatment and subsequently performing SiO vapor deposition in an oxygen radical atmosphere. A method for manufacturing a field effect transistor, comprising: 3. The method according to claim 1, wherein the semiconductor is a thin film semiconductor. 4. The semiconductor device according to claim 1, wherein said semiconductor is formed by crystal growth or recrystallization by light irradiation.
4. A method for manufacturing a field-effect transistor according to item 3. 5. The electric field according to claim 1, wherein the semiconductor is formed by subjecting the semiconductor to crystal growth or recrystallization by light irradiation, and then performing a hydrogen plasma treatment continuously in a vacuum. Method for manufacturing effect transistor. 6. The step of performing oxygen radical treatment on the semiconductor surface and depositing SiO in an oxygen radical atmosphere is performed after the semiconductor formation is performed in a vacuum and further in a vacuum. Claim 1,
6. The method for producing a field effect transistor according to 2, 3, 4, or 5. 7. The method according to claim 1, wherein the semiconductor forming step, the oxygen radical treatment of the semiconductor surface, and the step of depositing SiO in an oxygen radical atmosphere are performed at the same substrate temperature. 7. The method for manufacturing a field effect transistor according to item 5 or 6. 8. The method according to claim 1, wherein the step of performing oxygen radical treatment on the semiconductor surface and depositing SiO in an oxygen radical atmosphere comprises generating oxygen radicals using inductively coupled plasma as a radical supply source. ,
8. The method for producing a field-effect transistor according to 3, 4, 5, 6, or 7. 9. The method according to claim 1, wherein the step of performing the oxygen radical treatment on the semiconductor surface and the step of depositing SiO in an oxygen radical atmosphere include generating oxygen radicals using ECR plasma as a radical supply source. ,
9. The method for producing a field-effect transistor according to 4, 5, 6, 7, or 8. 10. The method according to claim 1, wherein the step of performing oxygen radical treatment on the semiconductor surface and depositing SiO in an oxygen radical atmosphere includes generating oxygen radicals using helicon wave plasma as a radical supply source.
10. The method for producing a field-effect transistor according to 3, 4, 5, 6, 7, 8, or 9. 11. The method according to claim 1, wherein the oxygen radical treatment of the semiconductor surface and the step of depositing SiO in an oxygen radical atmosphere are performed at a deposition pressure of 1 × 10 ⁻² (torr) or less. 2, 3, 4, 5, 6,
11. The method for producing a field-effect transistor according to 7, 8, 9 or 10. 12. An oxygen radical treatment and an oxygen radical atmosphere on the semiconductor surface are formed by using 100% oxygen gas or a mixed gas of oxygen gas and inert gas as a source gas. 4, 5, 6,
12. The method for producing a field-effect transistor according to 7, 8, 9, 10 or 11. 13. The method according to claim 1, wherein the step of depositing SiO in an oxygen radical atmosphere is started after performing an oxygen radical treatment on the semiconductor surface for at least 10 seconds or more. 5, 6, 7, 8, 9,
13. The method for manufacturing a field-effect transistor according to 10, 11, or 12. 14. A method of manufacturing a field-effect transistor, wherein an interface between a semiconductor and a gate insulating film is formed by subjecting a semiconductor surface as an active layer to oxygen radical treatment, and subsequently performing SiO vapor deposition in an oxygen radical atmosphere. And performing a semiconductor element separation step after the step (c).
14. The method for producing a field effect transistor according to 9, 10, 11, 12 or 13. 15. The method for manufacturing a field effect transistor according to claim 14, wherein after performing the semiconductor element isolation step, a gate insulating film is formed again on the entire surface of the substrate.