JP2001203325A5 - - Google Patents
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- JP2001203325A5 JP2001203325A5 JP2000009914A JP2000009914A JP2001203325A5 JP 2001203325 A5 JP2001203325 A5 JP 2001203325A5 JP 2000009914 A JP2000009914 A JP 2000009914A JP 2000009914 A JP2000009914 A JP 2000009914A JP 2001203325 A5 JP2001203325 A5 JP 2001203325A5
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- JP
- Japan
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000009914A JP2001203325A (ja) | 2000-01-19 | 2000-01-19 | 半導体集積回路装置とデジタル集積回路の設計方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000009914A JP2001203325A (ja) | 2000-01-19 | 2000-01-19 | 半導体集積回路装置とデジタル集積回路の設計方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001203325A JP2001203325A (ja) | 2001-07-27 |
| JP2001203325A5 true JP2001203325A5 (ja) | 2007-03-01 |
Family
ID=18537996
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000009914A Pending JP2001203325A (ja) | 2000-01-19 | 2000-01-19 | 半導体集積回路装置とデジタル集積回路の設計方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001203325A (ja) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4492837B2 (ja) * | 2001-07-31 | 2010-06-30 | 株式会社日立製作所 | 半導体集積回路装置 |
| US6621325B2 (en) * | 2001-09-18 | 2003-09-16 | Xilinx, Inc. | Structures and methods for selectively applying a well bias to portions of a programmable device |
| JP4562456B2 (ja) * | 2004-08-20 | 2010-10-13 | パナソニック株式会社 | 半導体集積回路 |
| US7893712B1 (en) | 2009-09-10 | 2011-02-22 | Xilinx, Inc. | Integrated circuit with a selectable interconnect circuit for low power or high performance operation |
| CN116108797B (zh) * | 2023-04-06 | 2023-06-16 | 中国人民解放军国防科技大学 | 基于触发器扇出数量的触发器替换方法、装置和存储介质 |
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2000
- 2000-01-19 JP JP2000009914A patent/JP2001203325A/ja active Pending