JP2001196453A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method thereof, by which it is possible to suppress the occurrence of a void in a connecting hole and the occurrence of whisker on the surface of an Al alloy film when the Al alloy film is embedded into the connecting hole having a relatively high aspect ratio. SOLUTION: The method of manufacturing the semiconductor device of the present invention comprises the steps of providing a via hole 9a in an interlayer insulating film 9, forming a first Al alloy film 12 in the via hole and on the interlayer insulating film 9, embedding a silicon oxide film 13 into the via hole 9a by CVD of SiH4 and H2O2, forming a second Al alloy film 14 on the silicon oxide film 13 and the first Al alloy film 12 by sputtering at a low temperature of 350 deg.C or lower, and forming wiring 16 by patterning the first and second Al alloy films 12 and 14.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a wiring formed by embedding a wiring material in a connection hole having a relatively high aspect ratio, and a method of manufacturing the same.

[0002]

2. Description of the Related Art FIG. 5 is a cross-sectional view for explaining a conventional method for manufacturing a semiconductor device.

First, a Ti film 101 is deposited on an insulating film (not shown) by a sputtering method, and a TiN film 103 is deposited on the Ti film 101 by a sputtering method. Next, Ti
An Al alloy film 105 is deposited on the N film 103 by a sputtering method, and Ti is deposited on the Al alloy film 105 by a sputtering method.
A cap film 107 made of N is deposited.

Thereafter, the cap film 107, the Al alloy film 1
05, by patterning the TiN film 103 and the Ti film 101, the first layer Al alloy wiring 1 is formed on the insulating film.
08 is formed. Next, the first layer Al alloy wiring 10
8, an interlayer insulating film 109 is deposited by a CVD (Chemical Vapor Deposition) method, and a via hole (connection hole) 109a having a relatively high aspect ratio is formed in the interlayer insulating film 109.
To form

After that, a Ti layer 111 as a wet layer for improving wettability is deposited by sputtering in the via hole 109a and on the interlayer insulating film 109. next,
After depositing an Al alloy film on the Ti layer 111 and in the via hole 109a by cold sputtering (sputtering at room temperature), an Al alloy film is deposited at a high temperature by hot sputtering (sputtering at a temperature of 400 ° C. or higher). After this,
A cap film 115 made of TiN is deposited on the Al alloy film 113 by a sputtering method. Next, this cap film 1
15. By patterning the Al alloy film 113 and the Ti layer 111, the second layer A is formed on the interlayer insulating film 109.
1 alloy wiring 116 is formed.

[0006]

In the above-mentioned conventional method for manufacturing a semiconductor device, when the aspect ratio of the connection hole 109a is increased, as shown in FIG.
3 may not be sufficiently embedded in the connection hole 109a, and a void 118 may be generated in the connection hole.

When an Al alloy film is formed in the connection hole 109a at a high temperature of 450 ° C. or more by hot sputtering,
Al alloy film 113 without voids in connection holes
Can be embedded. However, at such a high temperature, A
When the 1 alloy film 113 is sputtered, whiskers as whiskers are easily generated from the surface of the Al alloy film, and the whiskers may cause a short circuit between wirings. In other words, the generation of voids and the generation of whiskers are in a trade-off relationship, and Al sputtering is performed at a high temperature of 450 ° C. or higher.
When an alloy film is deposited, the generation of voids can be suppressed, but whiskers are easily generated. On the other hand, when the temperature of hot sputtering is lowered, the generation of whiskers can be suppressed, but voids are easily generated.

The present invention has been made in view of the above circumstances, and has as its object to reduce the occurrence of voids in connection holes when embedding an Al alloy film in connection holes having a relatively high aspect ratio. It is an object of the present invention to provide a semiconductor device capable of suppressing the generation of whiskers on the surface of an Al alloy film and a method of manufacturing the same.

[0009]

According to a method of manufacturing a semiconductor device according to the present invention, a step of providing a connection hole in an insulating film and a step of forming a first Al alloy film in the connection hole and on the insulating film are provided. A step of embedding a silicon oxide film in the connection hole by CVD of SiH ₄ and H ₂ O ₂ , and a _second step of sputtering at a temperature of 350 ° C. or less on the silicon oxide film and the first Al alloy film. Forming an Al alloy film, and forming a wiring by patterning the first and second Al alloy films.

According to the method of manufacturing a semiconductor device described above, Si
A silicon oxide film having excellent fluidity is formed by CVD of H ₄ and H ₂ O ₂ to bury the silicon oxide film in the connection hole. For this reason, even if the aspect ratio of the connection hole is high, it is possible to suppress generation of voids in the connection hole. Further, since the second Al alloy film is formed on the silicon oxide film and the first Al alloy film by sputtering at a temperature of 350 ° C. or less, whiskers are generated from the surface of the second Al alloy film. Can be suppressed.

In the method of manufacturing a semiconductor device according to the present invention, a step of providing a connection hole in an insulating film; a step of forming a Ti layer in the connection hole and on the insulating film; Forming a first Al alloy film therein, burying a silicon oxide film in the connection hole by CVD of SiH ₄ and H ₂ O ₂ , and forming a silicon oxide film on the silicon oxide film and the first Al alloy film. Forming a second Al alloy film by sputtering at a temperature of 350 ° C. or less;
forming a wiring by patterning the l-alloy film and the Ti layer.

In the method of manufacturing a semiconductor device according to the present invention, the step of burying the silicon oxide film may include the step of burying silicon oxide by CVD of SiH ₄ and H ₂ O _{2 in} the connection hole and on the first Al alloy film. After depositing the film, it is preferable to bury the silicon oxide film in the connection hole by polishing and removing the silicon oxide film other than in the connection hole by CMP.

In the method of manufacturing a semiconductor device according to the present invention, the step of burying the silicon oxide film may include the step of burying the silicon oxide film in the connection hole and on the first Al alloy film by CVD of SiH ₄ and H ₂ O _2. After depositing the film, it is preferable to remove the silicon oxide film by etching back the portion other than the connection hole, thereby embedding the silicon oxide film in the connection hole.

In the method of manufacturing a semiconductor device according to the present invention, a step of providing a connection hole in an insulating film; a step of forming a first Al alloy film in the connection hole and on the insulating film; Embedding a silicon oxide film by high-density plasma chemical vapor deposition, and forming a second Al alloy film on the silicon oxide film and the first Al alloy film by sputtering at a temperature of 350 ° C. or less. And a step of forming a wiring by patterning the first and second Al alloy films.

According to the method of manufacturing a semiconductor device described above, a silicon oxide film having excellent fluidity is buried in a connection hole by a high-density plasma enhanced chemical vapor deposition method. Therefore, even if the aspect ratio of the connection hole is high,
Generation of voids in the connection holes can be suppressed. Further, 350 nm is formed on the silicon oxide film and the first Al alloy film.
Since the second Al alloy film is formed by sputtering at a temperature equal to or lower than ° C., generation of whiskers from the surface of the second Al alloy film can be suppressed.

In the method of manufacturing a semiconductor device according to the present invention, the step of embedding the silicon oxide film may include forming the silicon oxide film in the connection hole and on the first Al alloy film by high-density plasma chemical vapor deposition. After depositing the silicon oxide film, the silicon oxide film other than in the connection hole is preferably polished and removed by CMP to bury the silicon oxide film in the connection hole.

In the method of manufacturing a semiconductor device according to the present invention, the step of embedding the silicon oxide film may include forming the silicon oxide film in the connection hole and on the first Al alloy film by high-density plasma chemical vapor deposition. After depositing the silicon oxide film, the silicon oxide film other than in the connection hole is preferably removed by etch back to bury the silicon oxide film in the connection hole.

The semiconductor device according to the present invention comprises first and second
A connection hole provided in an insulation film, a first Al alloy film formed in the connection hole and on the insulation film, and a connection hole provided in the insulation film. A silicon oxide film buried therein, and a second Al film formed on the silicon oxide film and the first Al alloy film.
And the second Al alloy film is formed by sputtering at a temperature of 350 ° C. or lower.

Further, in the semiconductor device according to the present invention, the silicon oxide film is preferably formed by CVD of SiH ₄ and H ₂ O ₂ .

Further, in the semiconductor device according to the present invention,
The silicon oxide film is preferably formed by a high-density plasma chemical vapor deposition method.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1 to 4 are sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

First, as shown in FIG. 1, a semiconductor element is formed on a silicon substrate (not shown), and an insulating film (not shown) is provided on the silicon substrate. Next, a contact hole (connection hole) (not shown) is provided in the insulating film. Thereafter, a Ti film 1 is formed in the contact hole and on the insulating film by a sputtering method, and a TiN film 3 is formed on the Ti film 1 by a sputtering method. Note that the TiN film 3 and T
The i film 1 functions as a barrier metal.

Thereafter, an Al alloy film 5 is deposited on the TiN film 3 and in the contact holes by a sputtering method.
A cap film 7 made of TiN is formed on the l-alloy film 5. Next, by patterning the cap film 7, the Al alloy film 5, the TiN film 3 and the Ti film 1, a first layer Al alloy wiring 8 is formed on the insulating film, and the first layer Al alloy wiring 8 is formed. The wiring 8 is electrically connected to the silicon substrate via the contact hole.

Thereafter, BPSG (Boron-doped Phosphor-Silicate G) is formed on the first layer Al alloy wiring 8 and the insulating film.
An interlayer insulating film 9 of several hundred nm to 1.0 μm thick is deposited. Next, a first resist pattern (not shown) is formed on the interlayer insulating film 9 by applying a resist film (not shown) on the interlayer insulating film 9 and exposing and developing the resist film. It is formed. Thereafter, a via hole (connection hole) 9a having a relatively high aspect ratio is formed in the interlayer insulating film 9 by etching using the first resist pattern as a mask. The aspect ratio of the via hole 9a is, for example, about 2.0 or more, and the hole diameter is about 0.5 to 0.15 μm.

Next, heat treatment A for removing moisture adhering to the interlayer insulating film 9 is performed. The processing conditions at this time are as follows: base pressure is 10 ⁻⁶ Torr or less, and temperature is 150 ° C. to 2 ° C.
Lamp heating at 50 ° C. for a treatment time of 30 to 60 seconds is used.

Thereafter, heat treatment B is performed on the interlayer insulating film 9.
The processing conditions at this time are as follows: temperature is about 350 ° C. to 550 ° C .;
A sputtering chamber with a processing time of 30 to 180 seconds, a pressure of 1 to 10 mTorr, and an atmosphere of Ar gas is used. Thus, the gas is released from the interlayer insulating film (BPSG) 9 in advance, and the gas is not released from the interlayer insulating film 9 when a Ti film is formed in a later step or when an Al alloy film is formed. You can do so.

Thereafter, as shown in FIG.
a and a thickness of 0.0 mm as a wet layer in the interlayer insulating film 9.
A Ti layer 11 of about 03 to 0.08 μm is deposited by a sputtering method. The deposition conditions at this time are as follows:
A pressure of several mTorr is used in an Ar atmosphere at ℃. The reason why sputtering is performed at such a low temperature is to suppress outgassing from the base. Note that the Ti layer 11 is formed to improve wettability.

Thereafter, a step of cooling the wafer is performed. Specifically, after the Ti layer 11 is sputtered, the wafer is placed on a stage having a water cooling function in another chamber, and a normal temperature Ar gas is blown from the back surface of the wafer for about 120 seconds to reduce the wafer temperature to about 100 ° C. Cool to below. This is because when the above-mentioned Ti layer 11 is sputtered at a low temperature, the temperature of the wafer becomes close to 150 ° C. due to radiant heat, so that it is cooled.

Next, as shown in FIG. 3, a first Al alloy film having a thickness of about 0.15 to 0.3 μm is formed on the Ti layer 11 and in the via hole 9a by cold sputtering (sputtering at 100 ° C. or less). 12 is formed at a high speed. The film formation conditions at this time are as follows: the temperature is 200 ° C. or lower, more preferably 30 to
00 ° C., sputtering rate about 10 nm / sec or more (DC power: about 9 KW), Ar gas atmosphere, pressure several m
Use Torr.

Thereafter, SiH is deposited on the first Al alloy film 12.
_A silicon oxide film 13 is deposited by CVD of H ₄ and H ₂ O ₂ , and the silicon oxide film 13 is embedded in the via hole 9a.

Here, CVD of SiH ₄ and H ₂ O ₂ will be described.

This CVD uses SiH_FourAnd H_TwoO_TwoAnd the shira
Nolation reaction (SiH_Four+ 3H_TwoO_Two→ Si (OH)_Four+ 2H
_TwoO + H_Two) To cause Si (OH) on the wafer surface_Four
(Silanol). At this time, Silano
The tool is very fluid and has a self-planarizing action.
This means that it can be buried flat at intervals of 0.15 μm.
Fluid enough to come. Silanol is
By vacuum heating to 350 ° C in the oven, the following formula
As shown in (1), the polycondensation reaction proceeds and SiO _Two
Become a membrane.

Si (OH) ₄ → SiO ₂ + 2H ₂ O (1)

In order to sufficiently secure the adhesiveness and fluidity of the oxide film formed by such a reaction, it is preferable to use a plasma SiO ₂ film (base film) as an underlayer. After film formation, a porous plasma SiO ₂ film (Ca) is used to alleviate stress and remove moisture from the film.
p) is preferred. Therefore, the silicon oxide film 13 preferably has a three-layer structure of a base film, a SiO ₂ film, and a Cap film. However, it is not limited to a three-layer structure. These membranes uses two chambers of the same device, after the formation of a continuous while maintaining the vacuum, atmospheric pressure, by N ₂ annealed at 450 ° C., to form a very homogeneous and dense oxide film it can.

Next, the silicon oxide film 13 is formed by CMP (Chem
ical Mechanical Polishing)
As shown in FIG. 4, the silicon oxide film 13 other than the inside of the via hole 9a is removed. At this time, the CMP polishing conditions are such that the table rotation speed is 50 to 100 rpm and the wafer rotation speed is 3
0-60 rpm, top pressing pressure is 100-300
It is preferable to use a slurry of hPa, silica / ammonium, a polishing cloth of polyurethane, and a polishing rate of 1000 angstroms / min to 3000 angstroms / min.

Thereafter, the silicon oxide film 13 and the first A
A second Al alloy film 14 having a thickness of about 0.3 to 1.0 μm is formed at a high speed on the 1 alloy film 12 by sputtering at a relatively low temperature of 350 ° C. or less. The film forming conditions at this time were Ar
In a gas atmosphere, the pressure is several mTorr.

Next, an antireflection film 15 made of TiN is deposited on the second Al alloy film 14 by a sputtering method. Thereafter, the antireflection film 15, the first and second Al alloy films 1 are formed.
By patterning the layers 2, 14 and the Ti layer 11, a second-layer Al alloy wiring 16 is formed on the interlayer insulating film 9. The second layer Al alloy wiring 16 is connected to the via hole 9.
a is electrically connected to the Al alloy wiring 8 of the first layer.

According to the above embodiment, SiH ₄ and H ₂ O
_The silicon oxide film 13 having excellent fluidity is deposited by the CVD method ₂ , and the silicon oxide film 13 is buried in the connection hole 9a. For this reason, with the miniaturization and high density of the element,
Even if the aspect ratio of the connection hole 9a increases (for example, the hole diameter is about 0.15 μm), it is possible to suppress the generation of voids in the connection hole as shown in FIG. Further, since the second Al alloy film 14 is formed on the silicon oxide film 13 and the first Al alloy film 12 by sputtering at a low temperature of 350 ° C. or less, the surface of the second Al alloy film 14 Whisker generation can be suppressed. This can prevent a short circuit between wirings. Therefore, in the conventional method of manufacturing a semiconductor device, the generation of voids and the generation of whiskers are in a trade-off relationship, but in the present embodiment, the generation of both can be suppressed.

The present invention is not limited to the above embodiment, but can be implemented with various modifications. For example,
In the above embodiment, the silicon oxide film 13 having excellent fluidity is buried in the via hole 9a by CVD of SiH ₄ and H ₂ O ₂ , but the present invention is not limited to this.
It is also possible to bury a silicon oxide film formed by CVD of SiH ₄ and H ₂ O ₂ in another connection hole, for example, a contact hole formed on a semiconductor substrate including an element, an interlayer insulating film after a first wiring, and the like. It is also possible to apply the present invention to a via hole formed in the substrate.

In the above embodiment, the silicon oxide film 13 other than the inside of the via hole 9a is removed by polishing by CMP. However, the silicon oxide film 13 other than the inside of the via hole 9a may be removed by etch back. It is possible, and this etch back may be wet or dry.

In the above embodiment, a silicon oxide film 13 is deposited on the first Al alloy film 12 by CVD of SiH ₄ and H ₂ O ₂ , and the silicon oxide film 13 is buried in the via hole 9a. However, it is also possible to deposit a silicon oxide film on the first Al alloy film 12 by high-density plasma chemical vapor deposition (HDP-CVD) and bury the silicon oxide film in the via hole 9a. The following deposition conditions are preferably used. RF power is preferably Top 1300W and Side 3000W (10
The RF bias power is preferably 3500 W (the range may be 1000-5000 W), the Ar flow rate is 30 sccm, and the SiH ₄ flow rate is 7
0 sccm, O ₂ is 130 sccm, the temperature is about 400 ° C., the deposition rate is 3000 to 8000 Å / min, and the pressure is 1 to 5 Torr.

[0043]

As described above, according to the present invention, when an Al alloy film is buried in a connection hole having a relatively high aspect ratio, the generation of voids in the connection hole is suppressed, and the surface of the Al alloy film is reduced. And a method of manufacturing the semiconductor device, which can suppress generation of whiskers in the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 1;

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 2;

FIG. 4 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, which shows the step subsequent to FIG. 3;

FIG. 5 is a cross-sectional view for explaining a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 Ti film 3 TiN film 5 Al alloy film 7 Cap film 8 First layer Al alloy wiring 9 Interlayer insulating film 9 a Via hole (connection hole) 11 Ti layer 12 First Al alloy film 13 Silicon oxide film 14 Second Al alloy film 15 Anti-reflection film 16 Second layer Al alloy wiring 101 Ti film 103 TiN film 105 Al alloy film 107 Cap film 108 First layer Al alloy wiring 109 Interlayer insulating film 109a Via hole (connection hole) 111 Ti Layer 113 Al alloy film 115 Cap film 116 Second layer Al alloy wiring 118 Void

Continued on front page F-term (reference) 4M104 AA01 BB14 DD19 DD37 EE01 EE09 FF13 FF17 FF18 HH09 HH13 5F033 HH08 HH09 HH18 HH33 JJ08 JJ09 JJ18 JJ33 KK01 KK08 KK18 KK33 MM05 MM08 Q08 Q08 Q08 Q08 RR15 SS11 SS15 XX00 XX04 XX12 XX14 XX31 5F058 BA20 BC02 BF02 BF23 BF29 BH04 BH07 BJ05

Claims (10)

[Claims] A step of forming a connection hole in the insulating film; a step of forming a first Al alloy film in the connection hole and on the insulating film; and a step of forming SiH ₄ and H ₂ O _{2 in} the connection hole. A step of embedding a silicon oxide film by CVD, and a step of forming a silicon oxide film on the silicon oxide film and the first Al alloy film.
A semiconductor comprising: a step of forming a second Al alloy film by sputtering at a temperature of not more than ℃, and a step of forming a wiring by patterning the first and second Al alloy films. Device manufacturing method. 2. A step of providing a connection hole in the insulating film, a step of forming a Ti layer in the connection hole and on the insulating film, and a step of forming a first Al alloy film on the Ti layer and in the connection hole. Forming a silicon oxide film by CVD of SiH ₄ and H ₂ O _{2 in} the connection hole; and forming a silicon oxide film on the silicon oxide film and the first Al alloy film.
A step of forming a second Al alloy film by sputtering at a temperature of not more than ℃, and a step of forming a wiring by patterning the first and second Al alloy films and the Ti layer. Manufacturing method of a semiconductor device. 3. The step of embedding the silicon oxide film comprises:
SiH ₄ and H ₂ O are formed in the connection hole and on the first Al alloy film.
_2. The step of embedding the silicon oxide film in the connection hole by polishing and removing the silicon oxide film other than in the connection hole by CMP after depositing the silicon oxide film by CVD according to ( ₂ ). 3. The method for manufacturing a semiconductor device according to item 2. 4. The step of embedding the silicon oxide film comprises:
SiH ₄ and H ₂ O are formed in the connection hole and on the first Al alloy film.
_2. The step of embedding a silicon oxide film in a connection hole by removing a silicon oxide film other than in the connection hole by etch-back after depositing a silicon oxide film by CVD. 3. The method for manufacturing a semiconductor device according to item 2. 5. A step of providing a connection hole in the insulating film, a step of forming a first Al alloy film in the connection hole and on the insulating film, and a high-density plasma enhanced chemical vapor deposition method in the connection hole. Burying a silicon oxide film by using
A semiconductor comprising: a step of forming a second Al alloy film by sputtering at a temperature of not more than ℃, and a step of forming a wiring by patterning the first and second Al alloy films. Device manufacturing method. 6. The step of embedding the silicon oxide film comprises:
After depositing a silicon oxide film in the connection hole and on the first Al alloy film by the high-density plasma chemical vapor deposition method, the silicon oxide film other than in the connection hole is polished and removed by CMP, so that the inside of the connection hole is removed. 6. The method according to claim 5, further comprising the step of embedding a silicon oxide film in the semiconductor device. 7. The step of embedding the silicon oxide film comprises:
After depositing a silicon oxide film in the connection hole and on the first Al alloy film by a high-density plasma chemical vapor deposition method, the silicon oxide film other than in the connection hole is removed by etch back, so that the inside of the connection hole is removed. 6. The method according to claim 5, further comprising the step of embedding a silicon oxide film in the semiconductor device. 8. A semiconductor device provided with wiring made of first and second Al alloy films, comprising: a connection hole provided in an insulating film; and a second hole formed in the connection hole and on the insulating film. Al of 1
An alloy film, a silicon oxide film embedded in the connection hole, and a second Al alloy film formed on the silicon oxide film and the first Al alloy film. A semiconductor device, wherein the alloy film is formed by sputtering at a temperature of 350 ° C. or lower. 9. The silicon oxide film is made of SiH ₄ and H ₂ O _2.
9. The semiconductor device according to claim 8, wherein the semiconductor device is formed by CVD. 10. The semiconductor device according to claim 8, wherein said silicon oxide film is formed by high-density plasma chemical vapor deposition.