JP2003209169A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem of difficulties in the practical use of a porous low dielectric constant film for the multilayer wiring of a semiconductor device since the physical strength of a porous film is low and it tends to change chemically in a process. <P>SOLUTION: (a) After a silicon nitride film 102 is formed on a semiconductor substrate 101, an insulation film 103 formed of a silicon oxide film containing fluorine is formed by a CVD method. (b) A wiring groove 104 is formed in the insulation film 103. (c-1) Hydrogen fluoride is produced by exposing the insulation film 103 to water vapor 105 and reacting fluorine existing excessively in the insulation film 103 and hydrogen of the water vapor 105. (c-2) The hydrogen fluoride etches the insulation film 103 itself and the insulation film 103 becomes a porous film. (e) A metallic wiring layer 107a is formed by burying metal in the groove. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a multi-layer wiring structure in which an interwiring layer and a wiring layer are sequentially formed.

[0002]

2. Description of the Related Art In recent years, due to the higher performance of semiconductor devices and the increase in storage capacity, the density and the number of layers of wiring have been remarkably increased.

It has been pointed out that as the wiring density and the number of wiring layers increase, electric signals are delayed due to the interaction between the wirings, the operating speed of the semiconductor device cannot be improved, and the power consumption cannot be reduced. .

In order to solve this, reduction of wiring resistance and wiring capacitance has been studied, and a new technique has been developed for the material and manufacturing method of the semiconductor device. First, a technique of using Cu (electrical resistance 1.8 μΩ), which has a lower resistance than Al (electrical resistance 3 μΩ), which is a conventional wiring material, as a wiring material has been put into practical use. Further, in order to reduce the wiring capacitance, a material having a low dielectric constant is studied for the interlayer insulating film between the wirings, and fluorine-containing SiO having a lower dielectric constant than the conventional SiO ₂ film (dielectric constant 4.0 to 4.5). ₂ film (SiOF film Dielectric constant 3.
2 to 3.7) have been put to practical use.

However, it is strongly desired to reduce the dielectric constant of the interlayer insulating film as the density and the number of layers are further increased. In order to reduce such wiring capacity, a porous film (dielectric constant:
3.0 or less) is proposed.

A conventional method of manufacturing a semiconductor device using a porous film is shown in FIGS. As shown in FIG. 3A, a porous film 303 is formed on a semiconductor substrate 301 via an interlayer insulating film 302 made of SiN or the like, and an interlayer insulating film 304 serving as a hard mask is further formed. The interlayer insulating film 304 is a film of SiC, SiN, SiON, or the like. Interlayer insulating films such as SiC, SiN, and SiON are anti-reflection films in lithography processes, hard masks in etching processes, and chemical mechanical polishing (Chemical Mechanical Polish).
Hereinafter, it is used as a CMP stopper in the shing process).

Next, as shown in FIG. 3B, a wiring groove 305 is formed in the porous film 303 by a lithography process and an etching process. Further, as shown in FIG. 3C, a wiring metal 306 such as Cu is embedded in the wiring groove 305.

Finally, as shown in FIG. 3D, excess wiring metal 306 is removed by a CMP process to form a metal wiring 306a.

[0009]

If a wiring in which the porous film 303 and the Cu metal wiring 306 are combined is manufactured by using the conventional technique, the suppression of the wiring delay is very expected.

However, for the following reasons, it is very difficult to easily manufacture a semiconductor device in which the porous film 303 and the Cu metal wiring 306 are combined with each other by using conventional materials and techniques such as a conventional method. is there.

First, it is difficult to form a uniform porous film 303. The porous film 303 is formed of a precursor of a porous film containing a particulate material that is volatilized and evaporated in a later process, and then the particles are volatilized and evaporated to form pores in the film. In the conventional method, since the particles are evaporated only from the upper surface of the film, the distribution of pores in the film thickness direction tends to be non-uniform.

Secondly, the porous film has a weak chemical composition and is easily damaged, and its dielectric constant is apt to change.
In the etching step of forming the wiring groove 305 and the oxygen plasma ashing step of removing the resist after etching, the process gas easily diffuses in the film by passing through the holes, and etching and oxidation proceed inside the film. With conventional materials, the deterioration of the film, which was limited to the surface, occurs throughout the film, and the characteristics change greatly. In particular, the porous film 303 has CH3 inside the pores in order to prevent water from entering the pores.
However, these hydrophobic groups easily react with the process gas to form OH groups and the like. Since the OH group is polarized, it not only becomes a factor of increasing the dielectric constant by itself, but also the dielectric constant is further increased because water enters the pores that have become hydrophilic. As shown in FIG. 3E, the altered layer 30 is formed on the surface of the etched porous film 303.
7 occurs and the dielectric constant becomes high. As a result, it does not function as a low dielectric constant film.

Third, the physical strength of the porous film 303 is low. Due to the inclusion of voids, the physical strength is greatly reduced compared to the bulk material. It is very difficult to form an embedded wiring such as Cu as the wiring metal 306 on the porous film 303 having such a low physical strength.
That is, from the state shown in FIG. 3C in which the wiring groove 305 is formed and Cu as the wiring metal 306 is buried, the state shown in FIG.
CMP of the excess Cu film other than the wiring groove 305 as shown in FIG.
A barrier film (not shown in FIG. 3) formed between the metal such as Cu to be removed and the wiring groove 305 or the surface of the hard mask 304 and the wiring metal 306 in the step of removing the wiring to form a wiring. Porous film 3 compared to TaN, etc.
03 has very low physical strength. Therefore, the porous membrane 3
In the part where 03 exists, the polishing rate becomes very high,
A problem peculiar to CMP such that the unevenness of the final surface becomes very large occurs. In the worst case, the CMP stress causes large damage, which is scraped off and the whole disappears.

As a solution to the problems associated with the surface of the porous film, it has recently been proposed to protect the surface of the porous film by coating it with another insulating film. JP-A-10-
Japanese Patent Laid-Open No. 10-189733 proposes forming a condensation film by vapor deposition, and Japanese Patent Laid-Open No. 10-189733 proposes forming paralene of 0.1 μm by vapor deposition.

However, in these structures, a condensed film having a high dielectric constant or a high dielectric constant layer such as paralene is formed between wirings like the altered layer 307 shown in FIG. Even if a porous film is used, the overall dielectric constant is only slightly lowered, and the effect of using a porous film is lost, so it is not an essential solution.

As described above, it is very difficult to manufacture a buried wiring using a porous film. Therefore, it is an object of the present invention to provide a method for manufacturing a semiconductor device having a porous insulating film that does not deteriorate the dielectric constant or cause physical or chemical damage.

[0017]

According to a method of manufacturing a semiconductor device of the present invention, a step of forming a precursor of a porous insulating film on a substrate and forming a groove or a hole in the precursor of the porous insulating film. Since it includes a step, a step of making the precursor of the porous insulating film porous, and a step of burying a metal in the groove or hole to form a metal wiring layer, it is porous in the step of making it porous. Since it is possible to volatilize and evaporate from the side surfaces of the grooves, holes, etc. formed in the precursor of the film by etching, the holes are formed with a very uniform distribution in the thickness direction.

In addition, since the distance from the surface is small in the portion where the distance between the wirings is small, a large number of holes are formed uniformly, and a large number of holes are formed in order to suppress the signal delay to lower the dielectric constant. Is possible.

Since the distance from the surface is large in the portion where the distance between the wirings is wide, it is possible to suppress the amount of holes.
Since the density of pores is low, the strength of the film can be increased. Although the dielectric constant is high, the signal delay is not a problem because the distance between the wirings is wide.

Further, since a porous film is formed after the etching and ashing steps, chemical damage due to etching and ashing does not occur inside the pores. Preferably, the precursor of the porous insulating film is a silicon oxide film containing fluorine, and the precursor of the porous film is exposed to hydrogen plasma by supplying water vapor to the precursor of the porous film. It becomes porous.

A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a precursor of a porous insulating film on a substrate, forming grooves or holes in the precursor of the porous insulating film, A step of depositing a wiring metal on the precursor of the porous film including the inside of the pores, and removing the metal in a portion which is not a groove or a hole by a chemical mechanical polishing method to remove the outermost surface of the precursor of the porous insulating film. Since it has a step of exposing and a step of making the precursor of the porous insulating film porous, since no holes are introduced before CMP, the strength of the insulating film is similar to that of the conventional film. The cost is high, and the yield is improved without causing defects such as peeling and breakage in the CMP process.

Preferably, the precursor of the porous film is Si
It is a C film, and the precursor of the porous film is made porous by exposing it to plasma.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION A method of manufacturing a semiconductor device according to the present invention will be described below with reference to specific embodiments shown in FIGS. However, the present invention is not limited to the illustrated embodiment.

(Example 1) As shown in FIG. 1A, after forming a silicon nitride film 102 on a semiconductor substrate 101, C using a high density plasma CVD apparatus (not shown) was used.
The insulating film 103 made of a silicon oxide film containing fluorine is formed by the VD method. This insulating film 103 is processed in a later step to become the porous insulating film 103a, and is therefore referred to as a precursor of the porous insulating film in the claims.

The content of fluorine in this insulating film 103 is
11 at% or more is desirable, and the upper limit is 20
It is about at%. Next, as shown in FIG. 1B, a wiring groove 104 having the same pattern as a desired wiring pattern is formed by using known lithography and etching techniques.

Next, as shown in FIG. 1 (c-1), water vapor 105 is supplied to expose the insulating film 103 to the water vapor, and fluorine existing in excess in the film of the insulating film 103 and hydrogen in the water vapor are exposed. Are reacted with each other to generate hydrogen fluoride.

As the processing conditions of this steam treatment, the pressure of the atmosphere of steam is set to, for example, about 100 Pa to 1.3 kPa, and the temperature of the atmosphere is set to, for example, 100 ° C. to 300 ° C. Then, since the hydrogen fluoride generated by the steam treatment etches the insulating film 103 itself, the insulating film 103 becomes a very porous film 103a. After that, hydrogen fluoride and water vapor are removed from the processing chamber by evacuation.

In the steam treatment, nitrogen gas or an inert gas may be used as a carrier gas in addition to steam. Next, as shown in FIG. 1 (c-2), hydrogen plasma 106 is generated, and an ashing process of exposing the surface of the porous film 103a made of a silicon oxide film containing fluorine to the hydrogen plasma is performed. 1
The bond terminal of 03a is a silicon-hydrogen bond.

As conditions for this hydrogen plasma treatment, the pressure of the treatment atmosphere is, for example, about 100 Pa to 1.3 kPa, and the temperature of the atmosphere is set to, for example, 100 ° C. to 300 ° C. This hydrogen plasma treatment suppresses an increase in the relative dielectric constant due to moisture absorption when opening to the atmosphere.

Next, as shown in FIG. 1D, the wiring groove 1 is formed.
A barrier film (not shown) such as TaN, and Cu
The wiring metal 107 such as is embedded. Next, as shown in FIG. 1E, the excess barrier film and wiring metal 107 are subsequently removed by CMP to separate and flatten the wiring to form a metal wiring 107a.

After that, the above method is repeated a plurality of times to sequentially form the upper inter-wiring layer and the wiring layer to form a multi-layer wiring structure. In addition, in the above (Example 1), the wiring groove 104 is formed in the portion where the wiring metal is inserted to form the metal wiring, but the wiring groove 104 may be formed in the same manner even if it is not a groove.

As described above, according to the method for manufacturing a semiconductor device of the present invention, since the porosification reaction is caused from the side surface of the groove, hole, etc. formed in the insulating film, the efficiency is very high, and especially the wiring interval A uniform porosity is possible in a narrow portion.

Further, in the wide area between the wirings, it becomes possible to suppress the formation of porosity by adjusting the reaction time with water vapor,
It is possible to form an insulating film having high strength locally. The inside of the holes is not damaged by the etching because it becomes porous after the etching. Therefore, the wiring delay is improved.

(Embodiment 2) FIG. 2 shows (Embodiment 2),
It differs from (Example 1) in the step of making the precursor of the porous insulating film porous.

As shown in FIG. 2A, the semiconductor substrate 20
After the silicon nitride film 202 is formed on the Si substrate 1, a Si—C (—H) film 203 is formed by a CVD method using a high density plasma CVD device (not shown). This Si-
Since the C (-H) film 203 is processed in a later step to be a porous insulating film, it is called a precursor of the porous insulating film in the claims.

This Si-C (-H) film 203 uses TEOS (Tetra-Ethl-Ortho-Silicate) as a reaction gas, and the frequency is 13.56 MHz while maintaining the silicon substrate 201 at 100 ° C. A voltage is applied and a pressure is formed under 1 Torr.

Next, as shown in FIG. 2B, a wiring groove 204 is formed by using known lithography and etching techniques. Next, as shown in FIG.
A barrier film (not shown) such as TaN, and a wiring metal 205 such as Cu are embedded in.

Next, as shown in FIG.
By using P, the excess barrier film and wiring metal 205 are removed to separate and flatten the wiring, so that the metal wiring 20
5a is formed.

Next, as shown in FIG. 2 (e-1), Si-
O (oxygen) plasma 206 with respect to the C (-H) film 203
Ashing process. This allows Si-C
C and H contained in the (-H) film 203 are oxidized and released to the outside of the film. A void is formed in the portion where C and H are released, and a Si—O bond is formed. As a result, the Si—C (—H) film 203 becomes the porous SiO ₂ film 203a shown in FIG. 2E-2.

After that, the above method is repeated a plurality of times to sequentially form the upper inter-wiring layer and the wiring layer to form a multi-layer wiring structure. In addition, in this (Example 2), FIG.
Then, the Si—C (—H) film 203 was processed into the porous SiO ₂ film 203a by being exposed to the oxygen plasma 206, but the porous Si was exposed to the other plasma containing oxygen.
It can also be processed into the O ₂ film 203a.

According to the method of manufacturing a semiconductor device of the present invention,
In the CMP process of FIG. 2D, since there are no holes in the insulating film, the strength of the insulating film is very high and the number of defects generated in the CMP process is very small. Therefore, the yield is improved.

After the etching in FIG. 2 (b), after the CMP in FIG. 2 (d), it becomes porous in FIG. 2 (e-1), so that the inside of the void is not damaged by the etching. . Therefore, the wiring delay is improved.

In the above-described (Example 2), the wiring groove 204 was formed in the portion where the wiring metal was inserted to form the metal wiring. However, the wiring groove 204 may be formed in the same manner even if it is not a groove.

[0044]

As described above, in the method for manufacturing a semiconductor device according to the first aspect of the present invention, a groove or a hole is formed in the precursor of the porous insulating film formed on the substrate, and the porous insulating film is formed. Since the precursor of is made porous and a metal wiring layer is formed by embedding a metal in the groove or hole, it is possible to volatilize and evaporate from the side surface of the groove, hole, etc. formed by etching the precursor of the porous film. The pores are formed so as to be distributed very uniformly in the thickness direction, and it is possible to make the pores uniform in the part where the wiring interval is narrow.

Further, the inside of the hole is not damaged by the etching because it becomes porous after the etching. Therefore, the wiring delay is improved. In the method for manufacturing a semiconductor device according to claim 2 of the present invention, the groove or the hole is formed in the precursor of the porous insulating film formed on the substrate, and the porous film including the inside of the groove or the hole is formed. A wiring metal is deposited on the precursor of the porous metal film, and the metal that is not a groove or a hole is removed by a chemical mechanical polishing method to expose the outermost surface of the precursor of the porous insulation film, and the precursor of the porous insulation film. In the step of removing the metal by the chemical mechanical polishing method, since there are no holes in the insulating film, the strength of the insulating film is very high, and the number of defects is extremely small, so that the yield is improved.
After etching and after CMP, it becomes porous, so that the inside of the holes is not damaged by etching. Therefore, the wiring delay is improved.

[Brief description of drawings]

FIG. 1 shows a method for manufacturing a semiconductor device according to the present invention (Example 1).
Sectional view showing each step of

FIG. 2 shows a method for manufacturing a semiconductor device according to the present invention (Example 2).
Sectional view showing each step of

FIG. 3 is a cross-sectional view showing each step of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

101 semiconductor substrate 102 SiN 103 SiO ₂ (precursor) 104 wiring groove 105 steam 106 hydrogen plasma 107 wiring metal 107a metal wiring 203 Si—C (—H) film (precursor) 203a porous SiO ₂ film 204 wiring groove 205 wiring Metal 205a Metal wiring 206 Oxygen plasma

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5F033 HH11 HH32 JJ11 JJ32 KK11                       KK32 MM01 MM12 MM13 NN06                       NN07 QQ00 QQ09 QQ37 QQ48                       RR01 RR04 RR06 RR11 RR29                       SS04 SS15 XX01 XX03 XX24                       XX27                 5F058 BD04 BD06 BD10 BF02 BH02                       BH16

Claims (7)

[Claims] 1. A step of forming a precursor of a porous insulating film on a substrate, a step of forming a groove or a hole in the precursor of the porous insulating film, and a step of forming the precursor of the porous insulating film into a porous material. And a step of burying a metal in the groove or the hole to form a metal wiring layer. 2. A step of forming a precursor of a porous insulating film on a substrate, a step of forming a groove or a hole in the precursor of the porous insulating film, the porous material including the inside of the groove or the hole. Depositing a wiring metal on the film precursor, exposing the outermost surface of the precursor of the porous insulating film by removing the metal in a portion that is not a groove or a hole by a chemical mechanical polishing method, and the porous material And a step of making the precursor of the insulating film porous. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the precursor of the porous insulating film is a silicon oxide film containing fluorine. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the step of making the precursor of the porous film porous is performed by supplying water vapor to the precursor of the porous film. Method. 5. The step of making the precursor of the porous film porous includes a step of supplying water vapor to the precursor of the porous film, and a step of further exposing to hydrogen plasma. The method for manufacturing a semiconductor device according to claim 3, wherein 6. The method of manufacturing a semiconductor device according to claim 2, wherein the precursor of the porous film is a SiC film. 7. The semiconductor device according to claim 6, wherein the step of making the precursor of the porous film porous is performed by exposing the precursor of the porous film to plasma containing oxygen. Manufacturing method.