JP2001196400A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of realizing a small-sized thin film package suitable for mounting a fine semiconductor chip by reducing in thickness a supporting board. SOLUTION: Two conductive foils 52, 53 and a thermoplastic resin film 51 disposed between the foils 52 and 53 are thermally press bonded and integrated to form the supporting board 50. At the press bonding time, a conductive material 57 is passed through the film 51 to form the material 57 for electrically connecting the foils 52, 53 without via hole. Electrodes 54, 55, and 56 are formed of the foils 52, 53 and the chip is mounted. Thus, an extremely thin type mounting structure can be simply manufactured, and the method for manufacturing the device optimum for mounting the fine chip is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a resin-sealed semiconductor device accommodating a small chip capable of forming an ultra-compact and thin package.

[0002]

2. Description of the Related Art In a conventional semiconductor device assembling process, a semiconductor chip separated by dicing from a wafer is fixed to a lead frame, and the semiconductor chip is sealed by a transfer mold using a mold and resin injection. A process of cutting and separating each semiconductor device is performed. As shown in FIG. 10, the semiconductor device obtained by this manufacturing method covers the periphery of the semiconductor chip 1 with the resin layer 2 and leads out the lead terminals 3 for external connection from the side of the resin layer 2. (For example, Japanese Patent Laid-Open No. 05-129473).

In this mounting method, the external dimensions and the mounting area are reduced due to the fact that the lead terminals 3 protrude outside the resin layer 2, the problem of the processing accuracy of the lead frame and the problem of the positioning accuracy with the mold. Saw the limits.

In recent years, attention has been paid to a wafer-scale CSP (chip size package) capable of reducing an outer dimension to a size similar to or close to a semiconductor chip size. In this, referring to FIG. 11A, a large number of semiconductor chips 12 are formed by performing various pretreatments such as diffusion on a semiconductor wafer 11, and the upper portion of the semiconductor wafer 11 is formed as shown in FIG. Is covered with a resin layer 13, electrodes 14 for external connection are led out to the surface of the resin layer 13, and then the semiconductor chips 11 are divided along dicing lines of the semiconductor wafer 11, as shown in FIG. It is a finished product. The resin layer 13 is the semiconductor chip 1
2 only covers the front surface (which may cover the back surface) of the semiconductor chip 12, and the silicon substrate is exposed on the side wall of the semiconductor chip 12. The electrode 14 is electrically connected to an integrated circuit network formed below the resin layer 13, and the semiconductor device is mounted by bonding the electrode 14 to a conductive pattern formed on a mounting substrate. .

[0005] Such a semiconductor device has the advantage that the package size of the device is equivalent to the chip size of the semiconductor chip, and the device can be adhered to the mounting substrate by opposing, so that the area occupied by the mounting can be greatly reduced. Further, there is an advantage that the cost associated with the post-process can be significantly reduced. (For example, Japanese Patent Application Laid-Open No. 9-64049)
Although it is possible to arrange a large number of electrodes within the dimensions of an SI chip, for example, the chip size is 1 m
In a transistor chip or the like having a size smaller than the m-square, it is physically impossible to arrange a plurality of electrodes within this dimension, and even if it is realized, there is a disadvantage that mounting is difficult.

Therefore, chips having a chip size of less than 1 mm square are mounted as shown in FIGS.

First, in FIG. 12A, an insulating substrate 21 made of ceramic, glass epoxy, or the like is prepared.
It has a thickness of 350 μm that can maintain mechanical strength in the manufacturing process, and has a rectangular shape with a long side × short side of about 1.0 mm × 0.8 mm. This insulating substrate 21 is formed with a large number of semiconductor chip mounting portions of 500 or more, and FIG. 12 shows one of them.

Next, as shown in FIG. 12B, a circular first via hole 30 and second circular via holes 31a and 31b are formed in the insulating substrate 21 so as to penetrate the insulating substrate 21.
The method of forming the laser beam is simple, but at least three are required for at least one mounting portion.

Further, as shown in FIG. 12C, the inside of each via hole 30, 31a, 31b is filled with a conductive material 34 such as tungsten. The material is buried with a material having excellent electrical and thermal conductivity.

[0010] As shown in FIG.
On the surface of the printing of metal paste such as tungsten,
A conductive pattern is formed by gold plating on the metal paste by an electrolytic plating method, and an island portion 22 and electrode portions 23a and 23b are formed. Also, the insulating substrate 21
The first external connection electrode 28 and the second external connection electrodes 29a and 29b are similarly formed on the back surface by printing a metal paste such as tungsten and gold plating on the metal paste by an electrolytic plating method. Therefore, the island portions 22 and the first external connection electrodes 28 are electrically connected to the electrode portions 23a and 23b and the second external connection electrodes 29a and 29b by the via holes 30, 31a and 31b, respectively. The first external connection electrodes 28 are, for example, collector electrodes, and the second external connection electrodes 29a, 29b are, for example, base and emitter electrodes.

Further, as shown in FIG. 12E, a conductive adhesive 2 such as an Ag paste is
4, the semiconductor chip 25 is fixed. An aluminum electrode pad 26 is formed on the surface of the semiconductor chip 25, and the electrode pad 26 is electrically connected to the electrode portions 23 a and 23 b by bonding wires 27. Electrode pad 26
A first bond is formed on the side and a second bond is formed on the electrode portion 23 side. If it is a bipolar transistor, the electrode portion 23
a, 23b correspond to the emitter and the base, and the power MOS
If it is an FET, it corresponds to the source and the gate.

Further, as shown in FIG. 12F, the upper portion of the insulating substrate 21 is covered with a resin layer 32 for sealing the semiconductor chip 25 and the bonding wires 27. Resin layer 32
Constitutes a package outer shape together with the insulating substrate 21. The four peripheral sides of the package are formed by a cut surface of the resin layer 32 and the insulating substrate 21, and the upper surface of the package is a flattened resin layer 3.
2 and the lower surface of the package are formed on the back surface side of the insulating substrate 21. The first external connection electrode 28 and the second external connection electrodes 29a and 29b are exposed on the back surface of the insulating substrate 21, and are soldered when mounted on a printed circuit board or the like.

FIGS. 13A, 13B and 13C show completed semiconductor devices. (A) is a plan view, (B) is a sectional view,
(C) is a rear view. Although FIG. 12 and the position of the via hole do not match, FIG. 12 differs from the actual position (FIG. 13) for convenience of explanation. In the figure, reference numeral 21 denotes an insulating substrate made of ceramic, glass epoxy, or the like. On the surface of the insulating substrate 21, an island portion 22 and electrode portions 23a,
3b. A on the island part 22
The semiconductor chip 25 is fixed by a conductive adhesive 24 such as g paste. An aluminum electrode pad 26 is formed on the surface of the semiconductor chip 25, and the electrode pad 26 is electrically connected to the electrode portions 23 a and 23 b by bonding wires 27. On the back side of the insulating substrate 21,
Similarly, a first external connection electrode 28 and second external connection electrodes 29a and 29b are formed by the metal paste and the gold plating layer. The insulating substrate 21 has a circular first
Is formed, and the inside of each via hole 30, 31a, 31b is buried with a conductive material 34 such as tungsten.
The via holes 30, 31a and 31b connect the island portion 22 and the first external connection electrode 28 to the electrode portion 23.
a, 23b and the second external connection electrodes 29a, 29b,
Each is electrically connected. The first external connection electrode 28 becomes, for example, a collector electrode, and the second external connection electrodes 29a, 29b
Are, for example, base and emitter electrodes.

The semiconductor chip 25 is located above the insulating substrate 21.
And the bonding wire 27 is covered with a resin layer 32. The resin layer 32 forms an outer shape of the package together with the insulating substrate 21. The four sides around the package are resin layers 32
The upper surface of the package is formed on the flattened surface of the resin layer 32, and the lower surface of the package is formed on the back surface side of the insulating substrate 21.

[0015]

However, there are various problems in the above-described mounting method. First, in order to connect electrodes and the like on both surfaces, a via hole penetrating the insulating substrate is indispensable, and since the inside of the via hole is filled with a metal paste, the number of steps increases, which causes an increase in cost. Since the processing accuracy is limited to about 0.15 mm, it is an obstacle to further miniaturization. Secondly, since each electrode uses an expensive metal paste such as tungsten, the number of processes is large and baking of a high-temperature metal paste is required, which cannot be said to be a low-cost manufacturing method. Thirdly, since the insulating substrate is formed with via holes or metal paste for each electrode, it is necessary to maintain mechanical strength in order to carry out the process, and 0.25 mm to 0.35 mm is required. There are many problems such as hindrance to thinning.

[0016]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned various problems, and has a first conductive foil, a thermoplastic resin film, and a conductive material adhered to a desired position. Forming a support substrate that electrically connects the first and second conductive foils by thermocompression bonding the second conductive foil with the second conductive foil to penetrate the conductive material through the thermoplastic resin film; Forming a fixed electrode and a lead electrode with a conductive foil, forming a connection electrode corresponding to the fixed electrode and the lead electrode with the second conductive foil and electrically connected with the conductive material; The method includes a step of fixing a semiconductor element using a conductive paste, a step of bonding and connecting the electrode of the semiconductor element and the extraction electrode, and a step of exposing the connection electrode and covering the whole with an insulating resin. To be

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a method for manufacturing a semiconductor device according to the present invention will be described with reference to FIGS.

First step: See FIGS. 1A, 1B and 1C In this step, first, a support substrate 50 is formed. As shown in FIG. 1A, a first conductive foil 52, a film 51 made of a thermoplastic resin, and a second conductive foil 53 are prepared. As the first and second conductive foils 52 and 53, inexpensive copper foil having low electric resistance is suitable, and the contact surface with the film 51 made of a thermoplastic resin having a thickness of 12 μm is roughened to have irregularities to improve the bonding strength. I try to raise it. A liquid crystal polymer is most suitable as the thermoplastic resin 51. In this embodiment, a wholly aromatic polyester liquid crystal polymer (trade name: Vectra) OC
-42 was used. This wholly aromatic polyester-based liquid crystal polymer has physical properties such as a melting point of 325 ° C. and a soldering heat resistance of 320 ° C., and can be sufficiently used as a mounting substrate for a semiconductor element. This can be easily understood from the fact that the solder heat resistance of the glass epoxy substrate is 260 ° C., for example. On the surface of the second conductive foil 53, a silver paste, which is a conductive material 57, is screen-printed at a predetermined position to previously form a bump 80 having a height (for example, 50 μm or more) penetrating the thermoplastic resin film 51. Keep it.

The first and second conductive foils 52 and 53 and the thermoplastic resin film 51 are initially supplied in the form of a roll having a width of 1 m, formed into a large number of support substrates 50, and then separated into individual support substrates 50. . This individual support substrate 50 is shown in FIG.
The mounting portions 70 of 576 semiconductor elements are formed in four rows.

Next, as shown in FIG. 1B, the first conductive foil 52, the thermoplastic resin film 51, and the second conductive foil 53 are thermocompression-bonded to form an integrated support substrate 50. During this thermocompression bonding, the thermoplastic resin film 51 is heated and softened, so that the bumps 80 serving as the conductive material 57 attached to the second conductive foil 53 penetrate the thermoplastic resin film 51 and extend to the first conductive foil 52. To reach.

When a liquid crystal polymer is used as the thermoplastic resin film 51, the heating temperature is 300.degree.
Vacuum thermocompression bonding is performed at 4 to 8.7 kPa. At this time, since the liquid crystal polymer is considerably softened near the glass transition point of 310 ° C., the pointed bump 80 formed of the conductive paste penetrates the liquid crystal polymer. At this time, no adhesive was used.

Further, as shown in FIG. 1C, when the thermocompression bonding is completed, the first conductive foil 52, the thermoplastic resin film 5
Since the first and second conductive foils 53 are in close contact and integrated, the bumps 80 made of conductive paste are also crushed to 0.15 mm.
A columnar conductive material 57 having a diameter of is formed.

FIG. 7 shows a thermoplastic resin film 51 of the present invention.
2 shows the dynamic elastic modulus of a wholly aromatic polyester-based liquid crystal polymer (trade name: Vectra) OC-42 used as a sample. Wholly aromatic polyester liquid crystal polymer (Vectra) OC
The temperature of the glass transition point of −42 is 310 ° C.,
It can be seen that when the temperature exceeds 0 ° C., the dynamic elastic modulus drops significantly. Therefore, if the heat treatment temperature in each step is set at 270 ° C. or less, there is not much trouble in assembly due to softening.

Second step: See FIGS. 2A and 2B Both main surfaces of the support substrate 50 are covered with first and second conductive foils 52 and 53. As shown in FIG.
The fixed electrode 5 having a predetermined shape is formed on the first conductive foil 52.
4. A resist film 81 is attached so as to cover the extraction electrode 55, and the resist film is also formed on the second conductive foil 53 so as to cover the first and second connection electrodes 56, 56a, and 56b having a predetermined shape. Attach 81. As the resist film 81, a liquid resist material may be spin-coated and subjected to photosensitive development, or a film-shaped resist material may be attached and subjected to photosensitive development.

Subsequently, the first resist film 81 is used as a mask.
Then, the second conductive foils 52 and 53 are chemically etched using a ferric chloride solution to form the fixed electrode 54 and the lead-out electrodes 55a and 55b with the first conductive foil 52. At 53, the first and second connection electrodes 56, 56a,
Form 56b. Since the specific shapes of these electrodes will be described later with reference to FIGS. 9A and 9B, please refer to those portions. These electrodes are all connected electrodes 72, 7
3 and a conductive material 57, a nickel plating layer (5 μm or more) serving as a base for gold plating and a gold plating layer (0.5 μm or more) are formed on these electrodes by electrolytic plating. ing.

If the support substrate 50 formed in the first and second steps described above is prepared in advance at another place, the assembling step can be shortened and efficient.

Third Step: See FIG. 3 A semiconductor chip 58 is die-bonded to each mounting portion 70 (see FIG. 9) of the support substrate 50 on which the electrodes are formed as described above. The semiconductor chip 58 is fixed to the surface of the fixed electrode 54 with a conductive paste 59 such as an Ag paste. After the conductive paste 59 is applied by screen printing on the fixed electrodes 54 of the individual support substrates 50, the semiconductor chip 58 is mounted, and the glass transition point 310 ° C. of the thermoplastic resin film is set in an electric furnace in a reducing atmosphere. Cure at the following temperature of about 150 ° C. for about 30 minutes.

In this step, the fixed electrode 54 is formed so as to overlap with the first connection electrode 56 by about half. However, about half or more of the semiconductor chip 58 overlaps with the first connection electrode 56 and forms the fixed electrode 54. Fixed on the top and two conductive members 57
When the semiconductor chip 58 is bonded, the sinking of the semiconductor chip 58 in the vertical direction can be suppressed, and the loop shape of the bonding fine wire can be stabilized. More preferably, the electrode 60 of the semiconductor chip 58 is connected to the first connection electrode 56.
When it is positioned above, the upper and lower sinks of the semiconductor chip 58 during bonding can be removed.

Fourth step: see FIG. 4 The electrode pad 60 and the extraction electrode 55 of the semiconductor chip 58
a and 55b are connected by bonding wires 61 such as gold. In the case of performing ball bonding with a gold wire, the supporting substrate 50 is heated to 150 ° C., and the ball portion formed at one end of the gold wire is thermocompression-bonded to the electrode pad 60 of the semiconductor chip 58, and multiple ends are taken out to the electrodes 55a and 55b. Thermocompression bonding.
At this time, since the thermoplastic resin film 51 is softer than the ceramic or glass epoxy substrate and is difficult to bond, the two conductive foils are bonded by bonding on the extraction electrodes 55a and 55b overlapping the second connection electrodes 56a and 56b. It is preferable to use the hardness of the copper foil to be formed. Further, by bonding the second connection electrodes 56a and 56b to the portions where the conductive material 57 and the extraction electrodes 55a and 55b overlap, the soft failure of the thermoplastic resin film 51 can be completely cleared.

Fifth Step: As shown in FIGS. 5A and 5B, when the die bonding of the semiconductor chip 58 and the connection by the bonding thin wires 61 to the mounting portions 70 of the support substrate 50 are completed, the entire molding is performed by the insulating resin 62. . In this step, the connection electrodes 56, 56 exposed on the back surface of the support substrate 50
a, 56b, except for the semiconductor chip 58, the fixed electrode 54,
Extraction electrodes 55a, 55b and bonding thin wire 6
1 is transfer-molded with an epoxy resin 62.

That is, as shown in FIG. 5A, the support substrate 50 is placed in the molds 90 and 91. The support substrate 50 is brought into contact with the lower mold 91, and each mounting portion 70 is placed in a cavity 92 formed by the upper mold 90.
The semiconductor chip 58 fixed to the substrate is disposed. Subsequently, epoxy resin is pressed into the cavity 92 from the runner 93 provided in the lower mold 91 via the gate 94, and all the semiconductor chips 58 are covered with the common insulating resin layer 62. This transfer mold has a temperature of about 18 ° C. or less which is lower than the glass transition temperature (310 ° C.) of the thermoplastic resin film 51.
Perform at 0 ° C. At this time, the support substrate 50 is pressed against the lower mold 91 by press-fitting the epoxy resin, and there is no problem that the thermoplastic resin film 51 is warped even if it is softened. In this step, the height of the insulating resin layer 62 is designed to be 0.5 to 1.0 mm from the support substrate 50 such that the surface of the insulating resin layer 62 covers at least up to the upper end of the semiconductor chip 58 and the bonding wire 61.

Further, as shown in FIG. 5B, after taking out from the molds 90 and 91 and cooling, the insulating resin layer 62 and the support substrate 50 are cut for each mounting part 70 and separated into respective semiconductor elements. . The dicing device is used for cutting, and the insulating resin layer 62 and the supporting substrate 5 are cut along the dicing line 71.
0 are simultaneously cut by the dicing blade 85 to form a semiconductor device divided for each mounting section 70.
The rest of the connection portions 72 and 73 (see FIG. 8A) cut in this step are the connection portions 72 and 73 shown in FIG. In the dicing process, a blue sheet (for example, trade name: UV sheet, manufactured by Lintec Corporation) is attached to the back surface of the support substrate 50, and cut at a cutting depth such that the dicing blade reaches the surface of the blue sheet. .

FIG. 6 is a perspective view showing each semiconductor element formed by the above-described steps and separated individually by scribing. A semiconductor device completed by the manufacturing method of the present invention will be described with reference to FIGS. FIG. 8 is a diagram illustrating a completed individual semiconductor device of the present invention.
(A) is a plan view, (B) is a cross-sectional view, and (C) is a back view. 9A and 9B are diagrams illustrating a support substrate used in the present invention, wherein FIG. 9A is a plan view and FIG. 9B is a rear view.

The support substrate 50 is formed by thermocompression bonding two conductive foils 52 and 53 (see FIG. 3) on both surfaces of a thermoplastic resin film 51. The thermoplastic resin is softened by heating and is easily subjected to secondary processing, and is much easier to handle than a conventionally used ceramic or glass epoxy hard substrate. A liquid crystal polymer is most suitable as the thermoplastic resin. In this example, a wholly aromatic polyester liquid crystal polymer (Vectra) was used. This wholly aromatic polyester-based liquid crystal polymer has physical properties such as a melting point of 325 ° C. and a soldering heat resistance of 320 ° C., and can be sufficiently used as a mounting substrate for a semiconductor element. This can be easily understood from the fact that the solder heat resistance of the glass epoxy substrate is 260 ° C., for example.

Two conductive foils 52 and 53 which are separated from each other and electrically insulated by the resin film are pressure-bonded to both surfaces of the thermoplastic resin film 51. As the conductive foil, an inexpensive copper foil having a small electric resistance is optimal. Specifically, copper foils 52 and 53 each having a thickness of 12 μm are pressure-bonded to both surfaces of a thermoplastic resin film 51 having a thickness of 50 μm. One conductive foil 52 is etched and processed into a desired shape pattern, and the fixed electrode 54 and the extraction electrode 55
a and 55b are formed. The fixed electrode 54 has at least a size and a shape on which the semiconductor chip 58 can be mounted.
A plurality of extraction electrodes 55a and 55b are formed adjacent to the fixed electrode 54 and slightly apart therefrom. The other conductive foil 53 is also etched and processed into a desired shape pattern, and connection electrodes 56, 56a, 56b are formed at positions facing the fixed electrode 54 and the extraction electrodes 55a, 55b.
The connection electrodes 56, 56a, 56b are formed in a size that can be soldered to a printed circuit board, are separated so that a solder bridge is not formed at the time of soldering, and are formed smaller than the corresponding fixed electrodes 54 and extraction electrodes 55a, 55b. Is done. Note that the fixed electrode 54 and the extraction electrode 55
The surfaces of the a and 55b and the connection electrodes 56, 56a and 56b are covered with a nickel plating layer and a gold plating layer by electrolytic plating to reduce the contact resistance with the conductive paste and enable the bonding of the bonding thin wires. .

The conductive material 57 is composed of the fixed electrode 54 formed by one conductive foil 52, the extraction electrodes 55 a and 55 b, and the corresponding connection electrodes 56 formed by the other conductive foil 53.
a, 56b. A silver paste is used as the conductive material 57, and the thermoplastic resin 51 is heated and softened to penetrate the conductive material 57. Therefore, it is not necessary to provide a via hole in advance. The position through which the conductive material 57 is penetrated is indicated by a broken-line circle in FIGS.
In No. 4, two are provided near the upper and lower ends on the side distant from the extraction electrodes 55a and 55b, and one is formed substantially in the center of the extraction electrodes 55a and 55b.

The semiconductor chip 58 has Ag fixed on the fixed electrode 54.
It is fixed by a conductive paste 59 such as a paste. The semiconductor chip 58 is supplied from a wafer on which a three-terminal element such as a bipolar transistor or a power MOSFET or a two-terminal element such as a diode is formed. The semiconductor chip 58 itself has a high-concentration impurity layer on the back side like an N + / N-type structure, and through the high-concentration layer, connects one terminal of an anode or a cathode if it is a diode element. In the case of a bipolar transistor, the collector terminal is provided, and in the case of a power MOSFET, the drain terminal is provided, so that this high concentration layer is ohmically connected to the fixed electrode 54 via the conductive paste 59. .

An aluminum electrode pad 60 is formed on the surface of the semiconductor chip 58, and the electrode pad 60 and the extraction electrode 5 are formed.
5a and 55b are electrically connected by a gold wire bonding wire 61. 1st bond on the electrode pad 60 side,
A second bond is formed on the side of the extraction electrodes 55a and 55b. If it is a bipolar transistor, the extraction electrode 5
5a and 55b correspond to the emitter and the base, respectively.
If it is an SFET, it corresponds to the source and the gate.

The upper surface of the supporting substrate 50 is
8. Sealed with an insulating resin 62 covering the fixed electrode 54, the mounting electrodes 55a and 55b, and the bonding wires 61. The insulating resin 62 forms a package outer shape together with the support substrate 51. The four peripheral sides of the package are formed by the cut surface of the insulating resin 62 and the support substrate 51, the upper surface of the package is formed by the flattened surface of the insulating resin layer 62, and the lower surface of the package is formed by the back surface of the support substrate 50. Insulating resin 6
2 uses a commonly used epoxy resin.

Next, referring to FIG. 9, fixed electrode 54 and extraction electrodes 55a and 55b formed from one conductive foil 52 on the upper surface of support substrate 51, and the other conductive foil 5
The relationship between the connection electrodes 56, 56a, and 56b formed from 3 will be described.

Each of the mounting portions 70 surrounded by a dotted line has a rectangular shape of, for example, 0.9 mm × 0.8 mm long side × short side, and these are separated from each other by a distance of 20 to 50 μm.
They are arranged vertically and horizontally on a matrix of 24 rows. The interval becomes a dicing line 71 in a later step. The conductive pattern forms the fixed electrode 54 and the extraction electrodes 55a and 55b in each mounting portion 70, and these patterns have the same shape in each mounting portion 70.

From the fixed electrode 54, two connecting portions 72 are extended in a continuous pattern. These line widths are narrower than the fixed electrode 54 and extend with a line width of, for example, 0.075 mm. The connecting portion 72 extends beyond the dicing line 71 until it is connected to the extraction electrodes 55a and 55b of the adjacent mounting portion 70. Further, a connecting portion 73 extends vertically from the fixed electrode 54 in a direction perpendicular to the connecting portion 72,
It extends until it is connected to the fixed electrode 54 of the adjacent mounting part 70 beyond the dicing line 71. The connecting portion 73 further includes
Connected to a common connecting portion 74 surrounding the mounting portion 70,
The fixed electrode 54 and the extraction electrodes 55a, 5
5b is electrically connected in common.

On the back side of the support substrate 50, first and second connection electrodes 56, 56a, 56b are formed. These connection electrodes 56, 56 a, 56 b are formed in a pattern recessed from the end of the mounting section 70 by about 0.05 to 0.1 mm. The thermoplastic resin 51 separating the two conductive foils 52 and 53 is penetrated by a conductive material 57 at a position shown by a circle to be electrically connected. Specifically, the fixed electrode 54 and the first
The connection electrodes 56 are connected by two conductive members 57 provided above and below, and the respective extraction electrodes 55a and 55b are connected to the second connection electrodes 56a and 56b by a conductive material 57 provided at the center thereof. Therefore, each electrode is connected to the common connection part 74 on the surface side of the support substrate 50 via the conductive material 57. Therefore, each of the thin connecting portions 72 and 73 is cut after dicing to function as an individual electrode. Since all the patterns are electrically connected in common, it is possible to cover the surface of each electrode with a nickel plating layer and a gold plating layer by an electrolytic plating method.

Since the thermoplastic resin 51 is softer than a ceramic or glass epoxy substrate, there is a disadvantage that the bonding pressure is diverged during bonding. In order to prevent this, the extraction electrodes 55a, 55b and the second connection electrodes 56a, 56b are arranged so as to substantially overlap,
An extraction electrode 55a at a position where at least both electrodes overlap,
It is desirable to bond a bonding thin wire on 55b, and it is more preferable to bond the bonding thin wire to the center of the extraction electrodes 55a and 55b where both electrodes and the conductive material 57 overlap. The fixed electrode 54 is formed so as to overlap with the first connection electrode 56 by about half. However, about half or more of the semiconductor chip overlaps with the first connection electrode 56 and is fixed on the fixed electrode 54, and two By fixing the conductive material 57 so as to overlap with the conductive material 57, the vertical sinking of the semiconductor chip during bonding can be suppressed, and the loop shape of the bonding thin wire can be stabilized. More preferably, the electrode 60 of the semiconductor chip 58 is connected to the first connection electrode 5.
6, the upper and lower sinks of the semiconductor chip during bonding can be removed.

In the above-described semiconductor device according to the present invention, since the thermoplastic resin film 51 is used as a material for separating the two conductive foils, it is important to remove a soft failure caused by thermoplasticity. However, the use of the liquid crystal polymer as the thermoplastic resin film 51 has many advantages. In electrical properties, the dielectric constant is 1 MH
3.0, 1 GHz at z (20 ° C., 96H, 65% RH)
Is 2.9 and the dielectric constant is 1 MH on a glass epoxy substrate.
It is considerably better than 4.7 to 5.0 in z. The surface resistance is 14 × 10 ¹³ Ω, which is much higher than the polyimide resin 1.1 × 10 ¹³ Ω. From these, it is clear that the characteristics of the support substrate 50 of the present invention in an extremely high frequency region are excellent. Further, regarding the folding resistance, R = 0.38 mm according to the JIS C5016 evaluation standard.
In the same conditions, the polyimide resin is less likely to be broken than the 33 times under the same conditions. 0.04% water absorption
It has good insulation properties under humidity, high gas barrier properties, and excellent environmental harmony with non-halogen and no through-hole plating.

[0046]

According to the present invention, first, a bump 80 of a conductive paste is previously formed on the other conductive foil of the two conductive foils 52 and 53, and a thermocompression bonding is performed with the thermoplastic resin film 51 interposed therebetween. Since the conductive material 57 can be formed only by performing the method, a via hole for connecting the electrodes and the like on both surfaces is not required, and the via hole does not need to be filled with a metal paste. realizable. Since the processing accuracy is also determined by the accuracy of the screen printing of the bump 80, it can sufficiently cope with a demand for miniaturization.

Second, since each electrode can be formed by etching a conductive foil, particularly a copper foil, there is no need to use an expensive metal paste such as tungsten, the number of steps can be reduced, and the firing of a high-temperature metal paste can be performed. It becomes unnecessary and a low-cost manufacturing method can be provided.

Third, the support substrate 50 can be formed with a thickness of at most 75 μm, and the demand for thinning is sufficiently satisfied.

Fourth, the softness of the thermoplastic resin film 51 is determined by setting the heat treatment temperature in each step to a glass transition temperature of 310 ° C.
By performing the following, it is possible to eliminate an obstacle in assembling.

Fifth, when copper foil is used as the conductive foils 52 and 53, the electric resistance can be reduced and the saturation on-resistance can be greatly improved.

Sixth, since the thermoplastic resin film 51 is used as an interlayer insulating film between the two conductive foils 52 and 53,
The formation of via holes and through-hole plating can be eliminated, and the electrodes formed by the conductive foils 52 and 53 can be electrically connected only by penetrating the conductive material 57 at the time of thermocompression bonding of the thermoplastic resin film 51. Can provide an implementation. For this reason, a non-halogen, no through-hole plating and extremely environmentally friendly mounting structure is obtained.

Seventh, the supporting substrate 50 of the present invention has a copper foil of about 1 mm.
Since the thickness of the thermoplastic resin film 51 is about 50 μm, the thickness can be as high as 75 μm as a whole.
m to 0.35 mm, which is advantageous in that the thickness can be reduced to about 1/5. For this reason, it is possible to greatly contribute to a reduction in thickness of a completed semiconductor device, and it is most suitable for a mounting structure of an extremely fine transistor chip of 1 mm square or less.

Eighth, the thermoplastic resin film 51 used in the present invention has the same dielectric constant in the high-frequency region as the polyimide resin, and has the same surface resistance as the glass epoxy substrate, so that good high-frequency characteristics can be obtained. .

Ninth, since the thermoplastic resin film 51 used in the present invention has softness due to thermoplasticity and is more excellent in folding resistance than polyimide resin, it breaks even in a wiring having a fine width. The probability is extremely low, and it is optimal for miniaturization of each electrode.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a diagram illustrating a method for manufacturing a semiconductor device according to the present invention.

FIG. 3 is a diagram illustrating a method for manufacturing a semiconductor device according to the present invention.

FIG. 4 is a diagram illustrating a method for manufacturing a semiconductor device according to the present invention.

FIG. 5 is a diagram illustrating a method for manufacturing a semiconductor device according to the present invention.

FIG. 6 is a perspective view illustrating a semiconductor device completed by a method of manufacturing a semiconductor device according to the present invention.

FIG. 7 is a diagram illustrating characteristics of a thermoplastic resin film used in the method of manufacturing a semiconductor device according to the present invention.

FIG. 8 is a diagram illustrating a semiconductor device completed by the method of manufacturing a semiconductor device according to the present invention.

FIG. 9 is a diagram illustrating a support substrate used in the method for manufacturing a semiconductor device of the present invention.

FIG. 10 is a diagram illustrating a conventional semiconductor device.

FIG. 11 is a diagram illustrating a conventional semiconductor device.

FIG. 12 is a diagram illustrating a conventional method of manufacturing a semiconductor device.

FIG. 13 is a diagram illustrating a conventional semiconductor device.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Haruo Hyodo 2-5-5 Keihanhondori, Moriguchi-shi, Osaka F-term in Sanyo Electric Co., Ltd. 5F061 AA01 BA04 BA05 CA21 CB13

Claims (12)

[Claims] 1. A first conductive foil, a thermoplastic resin film, and a second conductive foil having a conductive material adhered to a desired position are thermocompression-bonded so that the conductive material penetrates the thermoplastic resin film. Forming a support substrate for electrically connecting the first and second conductive foils, and forming a fixed electrode and an extraction electrode with the first conductive foil, and forming the fixed electrode with the second conductive foil. Forming a connection electrode which is electrically connected with the conductive material corresponding to the extraction electrode, and fixing a semiconductor element to the fixing electrode using a conductive paste; and an electrode of the semiconductor element and the extraction electrode. And a step of exposing the connection electrode and covering the whole with an insulating resin. 2. The manufacturing of a semiconductor device according to claim 1, wherein said fixed electrode, extraction electrode and connection electrode are formed by chemical etching using copper foil as said first and second conductive foils. Method. 3. The method for manufacturing a semiconductor device according to claim 1, wherein a liquid crystal polymer is used as said thermoplastic resin. 4. The method according to claim 1, wherein a silver paste is used as the conductive material. 5. The method according to claim 1, wherein a silver paste is used as the conductive paste for fixing the semiconductor element, and the silver paste is cured at a temperature equal to or lower than a glass transition point of the thermoplastic resin film. A method for manufacturing a semiconductor device. 6. The method according to claim 1, wherein the coating of the insulating resin is performed by transfer molding at a temperature equal to or lower than a glass transition point of the thermoplastic resin film. 7. A first conductive foil, a thermoplastic resin film, and a second conductive foil having a conductive material adhered to a desired position are thermocompression-bonded so that the conductive material penetrates the thermoplastic resin film. Electrically connecting the first and second conductive foils,
A supporting substrate in which a fixed electrode and an extraction electrode are formed of the first conductive foil, and a connection electrode electrically connected by the conductive material corresponding to the fixed electrode and the extraction electrode is formed of the second conductive foil. Preparing, fixing the semiconductor element to the fixed electrode using a conductive paste, bonding the electrode of the semiconductor element and the extraction electrode, and exposing the connection electrode with an insulating resin. A method of manufacturing a semiconductor device. 8. The method of manufacturing a semiconductor device according to claim 7, wherein said fixed electrode, extraction electrode and connection electrode are formed by chemical etching using copper foil as said first and second conductive foils. Method. 9. The method for manufacturing a semiconductor device according to claim 7, wherein a liquid crystal polymer is used as said thermoplastic resin. 10. The method for manufacturing a semiconductor device according to claim 7, wherein a silver paste is used as said conductive material. 11. The method according to claim 7, wherein a silver paste is used as the conductive paste for fixing the semiconductor element, and the silver paste is cured at a temperature equal to or lower than a glass transition point of the thermoplastic resin film. A method for manufacturing a semiconductor device. 12. The method of manufacturing a semiconductor device according to claim 7, wherein the coating of the insulating resin is performed by transfer molding at a temperature equal to or lower than a glass transition point of the thermoplastic resin film.