JP2001168270A - Semiconductor device and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To dispense with a lead wire required for a connection between a second semiconductor integrated circuit device as the master chip and a board on which the second semiconductor integrated circuit device is mounted in a semiconductor device of integral structure formed through a chip-on-chip system to turn the semiconductor device of integral structure formed through a chip-on-chip system to a chip-sized package CSP and to compactly mount the chip-sized package. SOLUTION: A first semiconductor integrated circuit device of small size or a slave chip is mounted at the center of a board, the slave chip and a second semiconductor integrated circuit device of large size or a master chip are arranged so as to be laminated, an electrical connection between the slave chip and master chip and another electrical connection between the master chip and the board are made direct with bumps or through the intermediary of an anisotropic conductive film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a first semiconductor integrated circuit device, that is, a child chip, and a second semiconductor integrated circuit device, that is, a parent chip, which are integrally formed, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, two types of semiconductor integrated circuit devices having different characteristics, for example, a bipolar chip and a CMOS chip, an analog chip and a digital chip, a custom chip and a standard chip, with the increase in the degree of integration of the semiconductor integrated circuit. Is the first means to implement
A chip-on-chip type semiconductor device in which the above semiconductor integrated circuit device is mounted on a second semiconductor integrated circuit device has been put to practical use.

FIG. 5 is a diagram showing a structure of a semiconductor device mounted by a conventional chip-on-chip method. In the figure, a first semiconductor integrated circuit device 510 has a wiring pad 5
11 are formed, and a bump electrode, that is, a bump 512 is formed on the wiring pad 511. The second semiconductor integrated circuit device 520 includes the first semiconductor integrated circuit device 51.
0, so that the wiring pad 5
21 is formed, and a bump electrode, that is, a bump 522 is formed on the wiring pad 521.

The first semiconductor integrated circuit device 510 and the second semiconductor integrated circuit device 520 have opposing bumps 5.
A required connection is made electrically between the bump 12 and the bump 522.

As described above, the first semiconductor integrated circuit device 51
Second semiconductor integrated circuit device 520 connected to 0 is mounted on substrate 530. Then, the electrode 523 formed on the periphery of the second semiconductor integrated circuit device 520 and the electrode 531 formed on the periphery of the substrate 530 are connected by a lead wire W which is wire-bonded. From the back side of the solder bump B for external connection
Is derived.

Then, the first semiconductor integrated circuit device is mounted on the second semiconductor integrated circuit device by molding with a resin and finally packaged, and a chip-on-chip type semiconductor device 50 is integrally formed. Are formed.

As described above, the child chip 510 as the first semiconductor integrated circuit device is mounted and integrated on the parent chip 520 as the second semiconductor integrated circuit device, and is mounted in a relatively small space. be able to.

[0008]

However, the conventional semiconductor device 50 having an integrated structure by the conventional chip-on-chip system is used.
Here, the parent chip 520 on which the small-sized child chip 510 is mounted is mounted on the substrate 530. The connection from the parent chip 520 to the substrate 530 is performed by a lead wire W that is wire-bonded from the electrode 523 formed on the periphery of the parent chip 520 to the electrode 531 formed on the periphery of the substrate 530. Have been done.

For this reason, the size of the substrate 530 becomes larger than the size of the parent chip 520 by the lead wire W,
Semiconductor device 5 of integrated configuration by chip-on-chip method
There is a problem that the size of “0” becomes larger correspondingly.

In view of the above, the present invention provides an integrated semiconductor device using a chip-on-chip system, which eliminates the need for a lead wire between a second semiconductor integrated circuit device as a parent chip and a substrate on which the second semiconductor integrated circuit device is mounted. It is an object of the present invention to enable a chip-sized package CSP for an integrated semiconductor device by an on-chip method and to mount the semiconductor device smaller.

[0011]

According to a first aspect of the present invention, there is provided a semiconductor device, comprising: a substrate provided with a connection electrode on one surface; and a surface of the substrate provided with the connection electrode, wherein the connection electrode is provided. A first semiconductor integrated circuit device disposed on a portion not to be contacted and having a connection electrode formed on the other surface side of the surface in contact with the substrate; and a connection electrode of the substrate and the first semiconductor integrated circuit formed on one surface side And a second semiconductor integrated circuit device provided with a connection electrode so as to face the connection electrode of the device.

According to the first aspect of the present invention, a first semiconductor integrated circuit device having a small size, that is, a child chip is mounted on, for example, a central portion on a substrate, and a second chip having a large size is formed with the child chip. A semiconductor integrated circuit device, that is, a parent chip is arranged so as to be stacked, and electrical connection between the child chip and the parent chip and between the parent chip and the substrate are performed using connection electrodes.

This eliminates the need for a lead wire between the second semiconductor integrated circuit device as the parent chip and the substrate on which the second semiconductor integrated circuit device is mounted, and reduces the size of the substrate. The semiconductor device having the integrated configuration can be made into a chip-sized package CSP, and can be mounted smaller.

According to a second aspect of the present invention, there is provided a semiconductor device having a connection electrode provided on one surface and an external connection electrode provided on the other surface, and a surface of the substrate provided with the connection electrode. A first semiconductor integrated circuit device having a connection electrode formed on a portion where the connection electrode does not exist, and a connection electrode formed on the other surface of the surface in contact with the substrate; A second semiconductor integrated circuit device provided with a connection electrode so as to face the connection electrode of the first semiconductor integrated circuit device; a connection electrode of the substrate; and a connection electrode facing the connection electrode of the substrate. An anisotropic conductive film provided so as to be interposed between the connection electrode of the second semiconductor integrated circuit device and
And are integrated.

In the semiconductor device according to the second aspect, the first aspect is as follows.
In addition to the functions of the described semiconductor device, the electrical connection between the child chip and the parent chip is made directly by the connection electrode, and the connection between the parent chip and the substrate is made via an anisotropic conductive film.

This facilitates the formation of the connection electrodes, and also facilitates connection between the connection electrodes having different intervals to be connected.

According to a third aspect of the present invention, there is provided a semiconductor device having a connection electrode provided on one surface side and an external connection electrode provided on the other surface, and a surface of the substrate provided with the connection electrode. A first semiconductor integrated circuit device having a connection electrode formed on a portion where the connection electrode does not exist, and a connection electrode formed on the other surface of the surface in contact with the substrate; A second semiconductor integrated circuit device provided with a connection electrode facing the connection electrode of the first semiconductor integrated circuit device, a connection electrode of the substrate, and a connection electrode of the first semiconductor integrated circuit device And anisotropically provided between the connection electrode of the substrate and the connection electrode of the second semiconductor integrated circuit device facing the connection electrode of the first semiconductor integrated circuit device, respectively. And a conductive film,
It is characterized by being integrated.

According to the semiconductor device of the third aspect, in addition to the function of the semiconductor device of the first aspect, the electrical connection between all the connection electrodes is performed through the anisotropic conductive film.

This makes it easier to form connection electrodes, and also allows connection between connection electrodes having different intervals to be connected easily.

A method of manufacturing a semiconductor device according to claim 4, wherein the connection electrode is provided on one side and the connection electrode is not present on the one side of the substrate provided with the external connection electrode on the other side. A first step of arranging a first semiconductor integrated circuit device having connection electrodes formed on the other surface side of the surface in contact with the substrate, and arranging an anisotropic conductive film on the connection electrodes of the substrate A second semiconductor integrated circuit device having a connection electrode provided on one surface thereof so as to face the connection electrode of the substrate and the connection electrode of the first semiconductor integrated circuit device. A second step of facing the conductive film and the substrate on which the first semiconductor integrated circuit device is arranged, and a connection between the connection electrode of the first semiconductor integrated circuit device and the second semiconductor integrated circuit device facing the connection electrode; Electrical connection with the A third step of electrically connecting the connection electrode of the second semiconductor integrated circuit device which faces the connecting electrode of the serial board and therewith via the anisotropic conductive film,
It is characterized by including.

According to the method of manufacturing a semiconductor device of the fourth aspect, the first semiconductor integrated circuit device, that is, the child chip and the anisotropic conductive film for connection are arranged on the substrate, and the second semiconductor integrated circuit device is provided thereon. The circuit device, that is, the parent chip is opposed, the child chip and the parent chip are connected by connection electrodes, and the parent chip and the substrate are connected via an anisotropic conductive film.

Thus, the connection between the second semiconductor integrated circuit device, which is the parent chip, and the substrate on which the second semiconductor integrated circuit device is mounted is made by simply connecting the child chip and the parent chip with the connection electrode, and connecting the other parent chip to the other chip. Since the connection between the semiconductor device and the substrate is performed simply by press-bonding, a semiconductor device integrated with the chip-sized package CSP and requiring no lead wire can be formed by a simple process.

A method of manufacturing a semiconductor device according to claim 5, wherein the connection electrode is provided on one side and the external connection electrode is provided on the other side of the substrate where the connection electrode does not exist on the one side. A first semiconductor integrated circuit device having a connection electrode formed on the other surface of the surface in contact with the substrate, and a first anisotropic conductive film disposed on the connection electrode of the substrate. A first step of disposing a second anisotropic conductive film on a connection electrode of the first semiconductor integrated circuit device, and a connection electrode of the substrate and the first semiconductor integrated circuit device on one surface side The second anisotropic conductive film, the second anisotropic conductive film, and the first semiconductor A second step of facing the substrate on which the integrated circuit device is arranged;
Electrically connecting a connection electrode of the first semiconductor integrated circuit device and a connection electrode of the second semiconductor integrated circuit device facing the connection electrode via the second anisotropic conductive film; The connection electrode of the substrate and the second electrode facing the connection electrode;
A third step of electrically connecting the connection electrode of the semiconductor integrated circuit device with the connection electrode via the second anisotropic conductive film.

According to the method of manufacturing a semiconductor device of the fifth aspect, the first semiconductor integrated circuit device, that is, the child chip and the first and second anisotropic conductive films for connection are arranged on the substrate. Then, the second semiconductor integrated circuit device, that is, the parent chip is opposed to each other, and the child chip and the parent chip and between the parent chip and the substrate are connected via the anisotropic conductive film.

Thus, the interconnection of the parent chip, the child chip, and the substrate is performed simply by crimping, so that a lead-wire is not required, and the integrated semiconductor device of the chip-sized package CSP can be manufactured in a simple process. Can be formed.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device, the anisotropic conductive film is disposed on the connection electrode of the substrate having the connection electrode provided on one side and the external connection electrode provided on the other side. A first step of connecting, a connection electrode of the first semiconductor integrated circuit device having a connection electrode formed on one surface side, and a connection of the connection electrode of the substrate and the first semiconductor integrated circuit device on one surface side Second electrode provided with a connection electrode so as to face the connection electrode
A second step of joining a connection electrode provided to face the connection electrode of the first semiconductor integrated circuit device of the first semiconductor integrated circuit device, and an external connection electrode provided on the other surface side. A third step of causing the substrate provided and the second semiconductor integrated circuit device to which the first semiconductor integrated circuit device is joined to face each other with the anisotropic conductive film interposed therebetween, and a connection electrode of the substrate. And a fourth step of electrically connecting the connection electrode of the second semiconductor integrated circuit device and the connection electrode facing the connection electrode via the anisotropic conductive film.

According to the method of manufacturing a semiconductor device of the present invention, first, the first semiconductor integrated circuit device, ie, the child chip, and the second semiconductor integrated device, ie, the parent chip, are integrated,
The parent chip and the substrate are electrically connected via an anisotropic conductive film so as to sandwich the child chip.

Thus, after the child chip and the parent chip are connected by the connection electrodes, the connection between the parent chip and the substrate is performed simply by crimping, so that a chip-sized package that eliminates the need for lead wires is provided. A semiconductor device having a CSP integrated structure can be formed in a simple process.

[0029]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a diagram showing a structure of a semiconductor device 10 having a chip-on-chip integrated structure according to a first embodiment of the present invention.

In FIG. 1, a first semiconductor integrated circuit device 110 is referred to as a child chip. A plurality of wiring pads 111 are provided on one surface side of the first semiconductor integrated circuit device 110. A bump 112 is provided.

The second semiconductor integrated circuit device 120 is called a parent chip. A plurality of wiring pads 121 are provided on one surface of the second semiconductor integrated circuit device 120, and a protruding electrode or bump 122 as a connection electrode is provided thereon. Can be This bump 1
Reference numeral 22 faces the bumps 112 of the child chip 110 and is connected to each other. Similarly, a plurality of wiring pads 123 are provided on one surface side, and a bump electrode 124 as a connection electrode is provided there. This bump 124
Is electrically connected to the substrate 130.

The substrate 130 is provided with the sub-chips 110 at a predetermined location (preferably at the center) on one side, and a plurality of wiring pads 13 at a vacant location on the same side, for example, at the periphery.
1 are provided, and a bump electrode 132 as a connection electrode is provided thereon. This bump 132
It faces the bump 124 of the parent chip 120 and is connected to each other via an anisotropic conductive film 140. Also, the substrate 53
0, the solder bump B for external connection is led out from the other surface side.

The anisotropic conductive film 140 is composed of an adhesive resin layer and conductive particles scattered in the resin layer. The shape is blank according to the outer shape of the chip 110. The anisotropic conductive film 140 is sandwiched between the parent chip 120 and the substrate 130, and the bumps 124
The pressure (or pressurization and heating) is applied in such a manner that the and the bumps 132 face each other. Therefore, in the portion between the bump 124 of the parent chip 120 and the bump 132 of the substrate 130, the anisotropic conductive film 140 is pressurized (or pressurized and heated), and the anisotropic conductive film 140 in that portion is electrically conductive. And the bumps 124 and 13
2 are electrically connected.

As described above, the connection between the parent chip 120 and the substrate 130 is made through the anisotropic conductive film 140.
The dimensions of the bumps 124 and 132 and the thickness of the anisotropic conductive film 140 are determined in consideration of the thickness of the child chip 110 and the like. It is also possible to electrically connect the bumps 124 and 132 without using the anisotropic conductive film 140 by, for example, setting the size of the bumps 124 and 132 to a large difference capable of absorbing the thickness of the child chip 110. It is.

Then, the first semiconductor integrated circuit device, that is, the child chip 110 is mounted on the substrate 130 by molding with a resin and finally packaged, and further, the second semiconductor integrated circuit device is mounted on the child chip 110. A semiconductor device 10 integrated with a circuit device, that is, a chip-on-chip system, on which a parent chip 120 is mounted, is formed.

Although FIG. 1 shows that the dimensions of the substrate 130 are set to be slightly larger than the dimensions of the parent chip 120, the dimensions of the substrate 130 may be adjusted to the dimensions of the parent chip 120. Needless to say, it can be done arbitrarily.

In the integrated semiconductor device 10 of the chip-on-chip type, a first semiconductor integrated circuit device having a small size, that is, a child chip 110 is placed on, for example, a central portion of a substrate 130, and the child chip 110 and A second semiconductor integrated circuit device having a large dimension, that is, a parent chip 120 is arranged so as to be stacked, and electrical connections between the child chip 110 and the parent chip 120 and between the parent chip 120 and the substrate 130 are made by bumps 112, 122, 124,. 132 and anisotropic electrode 1
40.

This eliminates the need for lead wires between the parent chip 120 and the substrate 130 on which it is mounted,
Since the size of the substrate can be reduced, a semiconductor device having an integrated configuration by a chip-on-chip method can be chip-sized package CSP, and can be mounted smaller.

Further, the electrical connection between the child chip 110 and the parent chip 120 is made directly by bumps, and the connection between the parent chip 120 and the substrate 130 is made via an anisotropic conductive film 140. This facilitates connection between the bumps.

FIG. 2 is a diagram showing a structure of a semiconductor device 20 having a chip-on-chip integrated structure according to a second embodiment of the present invention.

In FIG. 2, the difference from the semiconductor device of the first embodiment shown in FIG. 1 is that the connection between the child chip 110 and the parent chip 120 is not directly connected to the bumps but the parent chip 120. The structure is such that the connection is made via the anisotropic conductive film 150 as in the connection between the substrate and the substrate 130. Other points are the same as those in FIG. 1, and corresponding portions are denoted by the same reference numerals, and description thereof will not be repeated.

In the second embodiment shown in FIG.
Both the connection between the child chip 110 and the parent chip 120 and the connection between the parent chip 120 and the substrate 130 are made via the anisotropic conductive films 140 and 150. However, since the intervals to be connected are different, the dimensions of the anisotropic conductive film 150, the bumps 112, and the bumps 122 relating to the connection between the child chip 110 and the parent chip 120, and the dimensions of the parent chip 120 and the substrate 130 Conductive film 1 related to connection with
The dimensions of the bumps 40, the bumps 124, and the bumps 132 are set so that a good connection state can be obtained at the same time.

As a result, the same effects as in the first embodiment can be obtained, the formation of each bump is further facilitated, and the connection between bumps to be connected at different intervals can be easily performed.

FIG. 3 is a view showing a method of manufacturing a semiconductor device 10 having an integrated structure by a chip-on-chip method according to a third embodiment of the present invention.

In FIG. 3, each component is the same as in the first embodiment of FIG. 1, and corresponding components are denoted by the same reference numerals.

First, a wiring pad 131 and a bump 132 are formed thereon on one side, and an external solder bump B is formed on the other side.
A substrate on which is formed is prepared (FIG. 3A).

Next, the bumps 1 on one side of the substrate 130 are formed.
A wiring chip 111 and a sub chip 110 on which a bump 112 is formed are disposed on the other surface side of the surface in contact with the substrate 130 at a substantially central portion where the substrate 32 does not exist. At this time, it is desirable to fix the child chip 110 at a predetermined position on the substrate 130 with an adhesive (FIG. 3B).

Next, an anisotropic conductive film 140 is arranged on the bump 132 of the substrate 130 (FIG. 3C). Note that the step of FIG. 3B and the step of FIG. 3C may be performed in the reverse order, or may be performed simultaneously.

Next, the bump 13 of the substrate 130 is
A parent chip 120 having a wiring pad 121 and a bump 122 and a wiring pad 123 formed thereon and a bump 124 formed thereon is prepared so as to face the bump 112 of the second chip and the child chip 110. Then, the parent chip 120 is arranged such that the bumps 122 and 124 thereof are opposed to the bumps 132 of the substrate 130 with the bumps 112 and the anisotropic conductive film 140 of the child chip 110 interposed therebetween (FIG. 3D). .

Next, with the parent chip 120 facing the child chip 110 and the substrate 130, the bumps 122 of the parent chip 120 and the child chip 11 are brought closer.
The bumps 112 are brought into contact with each other and joined. Thus, the parent chip 120 and the child chip 110 are electrically connected.

At this time, the bumps 124 of the parent chip 120
And the distance between the bumps 132 of the substrate 130 is reduced, and the anisotropic conductive film 140 disposed therebetween is pressed and compressed.
Alternatively, the bumps 12 are heated at the same time if necessary.
4 and the bump 132 are automatically electrically connected. That is, the parent chip 120 and the substrate 130 are electrically connected (FIG. 3E).

Finally, the semiconductor device is molded with resin and finally packaged to form a chip-on-chip type integrated semiconductor device (not shown).

As a result, the connection between the parent chip 120 and the substrate 130 on which the parent chip 120 is mounted is made by merely connecting the child chip 110 and the parent chip 120 between the bumps 112 and 122, and connecting the other parent chip 120 to the substrate 130. Since the connection with 130 is performed simply by crimping, a semiconductor device integrated with a chip-sized package CSP that does not require a lead wire can be formed in a simple process.

A modification of the third embodiment of the present invention shown in FIG.
The semiconductor device 20 having an integrated configuration by the chip-on-chip method as shown in FIG. 2 can be manufactured by connecting the semiconductor device 20 to the zero through the anisotropic conductive film.

This manufacturing method will be described as a fourth embodiment. In the manufacturing method of the semiconductor device 20 having the integrated structure by the chip-on-chip method, the third embodiment is different from the third embodiment in that the step of FIG. The conductive film 150 is provided.

Next, in the step of FIG. 3D, the parent chip 120 is further fitted with its bumps 122 and 124.
The bumps 112 of the child chip 110 and the substrate 13 with the anisotropic conductive film 140 interposed therebetween.
It is arranged so as to face the 0 bump 132.

Next, in the step of FIG.
0 and the sub chip 110 and the substrate 130
Approach towards. Then, the bumps 124 of the parent chip 120 and the bumps 132 of the substrate 130 are similarly formed by the anisotropic conductive film 150 disposed between the bumps 122 of the parent chip 120 and the bumps 112 of the child chip 110.
Are electrically connected automatically by pressure compression (and heating) by an anisotropic conductive film 140 disposed therebetween. That is, the child chip 110 and the parent chip 120 are electrically connected, and the parent chip 120 and the substrate 130 are electrically connected.

As described above, the first semiconductor integrated circuit device, that is, the child chip 110 and the first and second anisotropic conductive films for connection are arranged on the substrate 130, and the second semiconductor integrated circuit device That is, the parent chips are opposed to each other, and the child chips and the parent chips and between the parent chips and the substrate are connected via the anisotropic conductive film.

As a result, the interconnection of the parent chip, the child chip, and the substrate is performed simply by crimping, so that a semiconductor device integrated with a chip-sized package CSP that does not require a lead wire can be simplified. It can be formed in a process.

FIG. 4 is a view showing a method of manufacturing a semiconductor device 10 having an integrated structure by a chip-on-chip method according to a fifth embodiment of the present invention.

In FIG. 4, each component is the same as in the first embodiment of FIG. 1, and corresponding components are denoted by the same reference numerals.

First, a wiring pad 131 and a bump 132 are formed on one surface thereof, and an external solder bump B is formed on the other surface.
A substrate 130 on which is formed is prepared (FIG. 4A).

Next, the bump 1 of the child chip 110 having the wiring pad 111 on one side and the bump 112 formed thereon is provided.
12 and, on one side, a wiring pad 121 and a bump 122 and a wiring pad formed thereon so as to face the wiring pad 111 of the substrate 130, the bump 112 formed thereon, and the bump 112 of the child chip 110. Parent chip 1 provided with 123 and bumps 124 formed thereon
The 20 bumps 122 are joined (FIG. 4B).

Next, the bumps 13 on the substrate 130 on which the wiring pads 131 and the bumps 132 formed thereon are provided on one side and the solder bumps B for external connection are provided on the other side.
An anisotropic conductive film 140 is disposed on the substrate 2 (FIG. 4C).
The order of the steps in FIG. 4B and the steps in FIG.
The reverse is also acceptable.

Next, the bump 132 of the substrate 130 provided with the solder bump B for external connection on the other surface, and the sub chip 11
The bumps 124 of the parent chip 120 to which the “0” is bonded are opposed to each other with the anisotropic conductive film 140 interposed therebetween (FIG. 4D).

Next, the parent chip 1
20 is approached toward the substrate 130, and the child chip 110 bonded to the parent chip 120 is brought into contact with the substrate 130.

At this time, the bumps 124 of the parent chip 120
And the distance between the bumps 132 of the substrate 130 is reduced, and the anisotropic conductive film 140 disposed therebetween is pressed and compressed.
Alternatively, the bumps 12 are heated at the same time if necessary.
4 and the bump 132 are automatically electrically connected. That is, the parent chip 120 and the substrate 130 are electrically connected (FIG. 4E).

Finally, the semiconductor device is molded with resin and finally packaged to form a chip-on-chip integrated semiconductor device (not shown).

As described above, first, the child chip 110 and the parent chip 120 are integrated, and the parent chip 120 and the substrate 130 are electrically connected via the anisotropic conductive film 140 so as to sandwich the child chip.

Thus, the child chip 110 and the parent chip 1
20 is connected between the bumps 112 and 122, and then the connection between the parent chip 120 and the substrate 130 is performed simply by pressure bonding.
A semiconductor device having an integrated configuration of the size package CSP can be formed in a simple process.

[0071]

According to the semiconductor device of the first aspect of the present invention, a first semiconductor integrated circuit device having a small size, that is, a child chip is mounted on, for example, a central portion of a substrate, and the child chip and the size are mounted. The second semiconductor integrated circuit device having a large size, that is, the parent chip is arranged to be stacked, and electrical connection between the child chip and the parent chip and between the parent chip and the substrate are performed using the connection electrodes.

This eliminates the need for lead wires between the second semiconductor integrated circuit device as the parent chip and the substrate on which it is mounted, and reduces the size of the substrate. The semiconductor device having the integrated configuration can be made into a chip-sized package CSP, and can be mounted smaller.

In the semiconductor device according to the second aspect of the present invention,
In addition to the function of the semiconductor device according to claim 1, the electrical connection between the child chip and the parent chip is made directly by the connection electrode, and the connection between the parent chip and the substrate is made via the anisotropic conductive film. .

As a result, the formation of the connection electrodes is facilitated, and the connection between the connection electrodes having different intervals to be connected can be easily performed.

According to the semiconductor device of the third aspect of the present invention, in addition to the function of the semiconductor device of the first aspect,
Electrical connection between all connection electrodes is performed via an anisotropic conductive film.

Thus, the formation of the connection electrodes is further facilitated, and the connection between the connection electrodes having different intervals to be connected can be easily performed.

According to the semiconductor device manufacturing method of the fourth aspect of the present invention, the first semiconductor integrated circuit device, that is, the child chip and the anisotropic conductive film for connection are arranged on the substrate, Semiconductor integrated circuit device, that is, the parent chip is opposed,
The child chip and the parent chip are connected by connection electrodes, and the parent chip and the substrate are connected via an anisotropic conductive film.

Thus, the connection between the second semiconductor integrated circuit device, which is the parent chip, and the substrate on which the second semiconductor integrated circuit device is mounted is made by simply connecting the child chip and the parent chip with the connection electrodes, and connecting the other parent chip with the other chip. Since the connection between the semiconductor device and the substrate is performed simply by press-bonding, a semiconductor device integrated with the chip-sized package CSP and requiring no lead wire can be formed by a simple process.

According to the method of manufacturing a semiconductor device of the fifth aspect of the present invention, the first semiconductor integrated circuit device, that is, the child chip and the first and second anisotropic conductive films for connection are arranged on the substrate. Then, the second semiconductor integrated circuit device, that is, the parent chip is made to face this, and the child chip and the parent chip and between the parent chip and the substrate are connected via the anisotropic conductive film.

Thus, the interconnection of the parent chip, the child chip, and the substrate is performed simply by crimping, so that the lead-wire is not required, and the integrated semiconductor device of the chip-sized package CSP can be manufactured in a simple process. Can be formed.

According to the method of manufacturing a semiconductor device of the present invention, first, the first semiconductor integrated circuit device, that is, the child chip, and the second semiconductor integrated device, that is, the parent chip are integrated, and the child chip is sandwiched. Thus, the parent chip and the substrate are electrically connected via the anisotropic conductive film.

Thus, after the child chip and the parent chip are connected by the connection electrodes, the connection between the parent chip and the substrate is performed simply by crimping, so that a chip-sized package that does not require a lead wire is provided. A semiconductor device having a CSP integrated structure can be formed in a simple process.

[Brief description of the drawings]

FIG. 1 is a diagram showing a structure of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a structure of a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a diagram illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 4 is a diagram illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 5 is a diagram showing a conventional semiconductor device having an integrated configuration.

[Explanation of symbols]

 110 first semiconductor integrated circuit device: child chip 120 second semiconductor integrated circuit device: parent chip 130 substrate 140, 150 anisotropic conductive film 112, 122, 124, 132 bump

Claims (6)

[Claims] 1. A substrate provided with a connection electrode on one side, and a surface of the substrate provided with the connection electrode, which is disposed in a portion where the connection electrode does not exist and which is in contact with the substrate. A first semiconductor integrated circuit device having a connection electrode formed on the other surface; and a connection electrode formed on one surface facing the connection electrode of the substrate and the connection electrode of the first semiconductor integrated circuit device. And a second semiconductor integrated circuit device provided with electrodes, wherein the semiconductor device is integrated. 2. A substrate having a connection electrode provided on one surface side and an external connection electrode provided on the other surface, and a surface of the substrate provided with the connection electrode, wherein the connection electrode is provided. A first semiconductor integrated circuit device arranged on a portion not to be contacted and having a connection electrode formed on the other surface side of the surface in contact with the substrate; a connection electrode of the substrate and the first semiconductor integrated circuit formed on one surface side A second semiconductor integrated circuit device provided with a connection electrode facing the connection electrode of the device; a connection electrode of the substrate; and the second semiconductor integrated circuit facing the connection electrode of the substrate. And an anisotropic conductive film provided so as to be interposed between the device and a connection electrode of the device. 3. A substrate provided with a connection electrode on one surface side and an external connection electrode provided on the other surface; and a surface of the substrate provided with the connection electrode, wherein the connection electrode is provided. A first semiconductor integrated circuit device arranged on a portion not to be contacted and having a connection electrode formed on the other surface side of the surface in contact with the substrate; a connection electrode of the substrate and the first semiconductor integrated circuit formed on one surface side A second semiconductor integrated circuit device provided with a connection electrode facing the connection electrode of the device; a connection electrode of the substrate and a connection electrode of the first semiconductor integrated circuit device; and connection of the substrate And an anisotropic conductive film provided between the connection electrode of the first semiconductor integrated circuit device and the connection electrode of the second semiconductor integrated circuit device facing the connection electrode. Semiconductor, characterized by being integrated and configured Apparatus. 4. A substrate provided with a connection electrode on one surface side and an external connection electrode on the other surface side, on a portion of the substrate where the connection electrode does not exist on the one surface side, and on a surface in contact with the substrate. A first step of arranging a first semiconductor integrated circuit device having connection electrodes formed on one surface side and arranging an anisotropic conductive film on the connection electrodes of the substrate; A second semiconductor integrated circuit device provided with a connection electrode so as to face the connection electrode and the connection electrode of the first semiconductor integrated circuit device; A second step of facing the substrate on which the circuit device is arranged; and electrically connecting the connection electrode of the first semiconductor integrated circuit device and the connection electrode of the second semiconductor integrated circuit device facing the connection electrode. With the connection electrode of the substrate and facing it Third electrically connecting that the connection electrode of the second semiconductor integrated circuit device via the anisotropic conductive film
A method for manufacturing a semiconductor device, comprising: 5. A substrate provided with a connection electrode on one surface side and an external connection electrode on the other surface side, on a portion of the substrate on which the connection electrode does not exist on the one surface side, other than a surface in contact with the substrate. A first semiconductor integrated circuit device having a connection electrode formed on a surface side, and a first anisotropic conductive film disposed on the connection electrode of the substrate; A first step of arranging a second anisotropic conductive film on the connection electrode of (a), and, on one surface side, facing the connection electrode of the substrate and the connection electrode of the first semiconductor integrated circuit device. A second semiconductor integrated circuit device provided with a connection electrode is opposed to a substrate on which the first anisotropic conductive film, the second anisotropic conductive film, and the first semiconductor integrated circuit device are arranged. A second process to be performed, a connection electrode of the first semiconductor integrated circuit device, Thereby connecting the connection electrode of the second semiconductor integrated circuit device the second anisotropic conductive film electrically through to the second opposite connecting electrodes and therewith of the substrate
A third step of electrically connecting the connection electrode of the semiconductor integrated circuit device with the connection electrode via the second anisotropic conductive film. 6. A first step of disposing an anisotropic conductive film on a connection electrode of a substrate having a connection electrode provided on one surface side and an external connection electrode provided on the other surface side; A connection electrode of the first semiconductor integrated circuit device on which the connection electrode is formed, and a connection electrode on one side facing the connection electrode of the substrate and the connection electrode of the first semiconductor integrated circuit device. A second step of joining a connection electrode provided to face the connection electrode of the first semiconductor integrated circuit device of the second semiconductor integrated circuit device provided with the electrode; The substrate provided with external connection electrodes,
A third step of opposing the second semiconductor integrated circuit device to which the first semiconductor integrated circuit device is bonded, with the anisotropic conductive film interposed therebetween; and a connection electrode of the substrate and the opposing electrode. A fourth step of electrically connecting a connection electrode of the second semiconductor integrated circuit device with the connection electrode via the anisotropic conductive film.