JP2001168124A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device improving the reliability of connection by reducing the failure of connection at the time of mounting, and stably making thin this device. SOLUTION: A solder bump 16b is formed to be connected with the circuit pattern of a semiconductor chip formed on a semiconductor wafer 10, and a probe needle is pressed to the solder bump 16b so that the electric characteristics of the circuit pattern can be inspected. Then, a protecting tape 17 is attached to the whole face of the solder bump 16b of the semiconductor wafer 10, the semiconductor wafer 10 is pressed from the upper part of the protecting tape 17 with a jig 18 having a flat surface so that the height of the solder 16b can be made uniform, and the adhesion of the protecting tape 17 to the semiconductor wafer 10 can be improved. Then, the semiconductor wafer 10 is made thin by a machine grinding method, a chemical machine grinding method, or etching method or the like from the face opposite to the attached face of the protecting tape 17.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device having a miniaturized and high-density package form.

[0002]

2. Description of the Related Art A digital video camera, an IC card, a digital cellular phone, a notebook computer or a PDA (Pers
Onal Digital Assistant) and other portable electronic devices are increasingly required to be smaller, thinner and lighter. To meet this demand, semiconductor devices such as recent VLSIs have been reduced by 70% in three years. On the other hand, research and development have been carried out as an important issue how to increase the component mounting density on a mounting board.

Conventionally, as a semiconductor device package, a DIP (Dual In-line Package) or PGA
(Tin Grid Array) and other lead insertion type (T
HD: Through Hole Mount Device), QFP (Quad
Flat Package) or TCP (Tape Carrier Packa)
ge) and the like, and a surface mount device (SMD: Surface Mount Device) has been used in which a lead wire is soldered and mounted on the surface of a substrate.

As described above, in order to reduce the size and increase the density of the device, the semiconductor device is packaged in a chip size package (CSP: Chip Size Package) in which the package size is as close as possible to the size of a semiconductor chip.
e) into a package form called
A bump-forming surface made of CSP is provided by connecting a bump electrode made of solder, gold, etc. to a pad electrode, and the bump forming surface side of the semiconductor device is turned to a mounting board, and the flip-chip mounting mode in which the semiconductor device is mounted face down has been shifted. ing. For further miniaturization and higher density, a method of flip chip mounting a semiconductor chip provided with bump electrodes (bumps) so as to be connected to pad electrodes in a bare chip state has been developed. , Many suggestions are given.

An electronic circuit device in which a semiconductor chip is mounted on a mounting board in a bare chip state will be described with reference to the drawings. FIG. 9 is a sectional view of an electronic circuit device in which the above-described bare chip mounting semiconductor chip is mounted on a mounting substrate. The surface of the semiconductor chip 10 'on which the pad electrode 11 made of aluminum or the like is formed is covered with a first surface protection film 12 made of, for example, a silicon nitride layer and a second surface protection film 13 made of a polyimide film. In this opening, a conductive film 14 made of a laminated film of chromium, copper, gold, or the like is formed so as to be connected to the pad electrode 11. This conductive film is made of BLM (Ball Limiting M).
etal) film. Further, a conductive film (BLM)
A bump 16b made of, for example, a high melting point solder ball is formed in connection with the film 14. The semiconductor chip 1 for mounting a bare chip is configured as described above.

On the other hand, the mounting substrate 2 is a land (electrode) made of copper or the like formed at a position corresponding to the position of the bump 16b of the semiconductor chip 1 to be mounted on the upper surface of the substrate 20 made of, for example, a glass epoxy material. 21 and a printed wiring portion (not shown) formed on the front surface, the back surface, or both surfaces of the substrate 20 connected to the land 21. Substrate 20 excluding land 21
The surface is covered with a solder resist 23.

The semiconductor chip 1 is mounted on the mounting substrate 2 with the bumps 16b and the lands 21 corresponding to each other.
1 are mechanically and electrically connected. Further, a gap between the semiconductor chip 1 and the mounting board 2 is sealed with a sealing resin 3 made of epoxy resin or the like.

In the above-described semiconductor device, as a method of forming solder bumps at predetermined positions, for example, a method using electrolytic plating is known. In this case, the surface condition of a material layer serving as a base of the bumps or the like is known. There is a problem that it is very difficult to form uniform and uniform solder ball bumps in a semiconductor chip, because the thickness of the solder bumps formed is affected by slight variations in electrical resistance. I have.

A method has been developed in which solder ball bumps are formed to have uniform heights by using the deposition of a solder layer by vacuum deposition and the lift-off of a photoresist film. This method will be described below with reference to the drawings. First, as shown in FIG. 10A, a pad electrode 11 made of an aluminum-copper alloy or the like is pattern-formed on a semiconductor wafer 10 on which a circuit pattern of a semiconductor chip is formed by, for example, a sputtering method or etching. A surface protective film 13 made of, for example, a silicon nitride layer or a polyimide film is coated on the entire surface. After opening the pad electrode 11 portion of the surface protection film 13, a conductive film (BLM film) 14, which is a laminate of chromium, copper, and gold, is formed by, for example, a sputtering method so as to be connected to the pad electrode 11.

Next, as shown in FIG. 10B, a resist film R having a pattern opening A in a region where a conductive film (BLM film) 14 is to be formed is formed by photolithography. Next, as shown in FIG. 10C, a solder layer is formed on the entire surface by, for example, a vacuum evaporation method.
The solder layer 16 is formed in the pattern opening A of the resist film R. At this time, the solder layer 1 is also formed on the resist film R.
6a is formed.

Next, as shown in FIG. 11A, the solder film 16a formed on the resist film R is simultaneously removed by removing the resist film R by lift-off. Thus, only the solder layer 16 formed in the pattern opening A of the resist film R can be left. Next, as shown in FIG. 11 (b), heat treatment is performed to melt the solder layer 16, and the solder layer 16 is cooled and solidified in a spherical shape due to surface tension to form solder ball bumps 16b.

By the way, as shown in FIG. 12A, a probe needle P is pressed against the vicinity of the top of the bump as a test for guaranteeing the electrical characteristics of the device wafer on which the bump is formed as described above. Measurement.

[0013]

However, when the probe needle P is pressed, a certain level of needle pressure must be applied in order to obtain sufficient electrical continuity. When P is removed, traces 16c of the probe needle are inevitably left near the tops of the bumps, and in some cases, the entire bumps 16b are crushed. In some cases, resulting in poor connection during mounting on a mounting board.

For portable electronic devices such as an IC card, a digital cellular phone, and a PDA, it is desired that the device mounting space be as small as possible. The demand for downsizing, ie, thinning, is increasing.

The present invention has been made in view of the above-mentioned problems, and has been made in accordance with the present invention. The present invention relates to a connection caused by a trace of a probe needle formed on a solder bump or a bump crushed after an inspection for ensuring electric characteristics. It is an object of the present invention to provide a method for manufacturing a semiconductor device, which can reduce defects, improve connection reliability, and can stably reduce the thickness of the device.

[0016]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises the steps of: forming a solder on a semiconductor wafer so as to connect to a circuit pattern of a semiconductor chip formed on the semiconductor wafer; A step of forming a bump, a step of pressing a probe needle against the solder bump to inspect an electrical characteristic of a circuit pattern of the semiconductor chip, and applying a protective tape to the entire surface of the semiconductor wafer on which the solder bump is formed. Pressing the protective tape from above with a jig having a flat surface to equalize the height of the solder bumps and increase the adhesion of the protective tape to the semiconductor wafer; and Thinning the semiconductor wafer from a surface opposite to the surface to which the semiconductor wafer is attached.

The method of manufacturing a semiconductor device according to the present invention described above includes:
Preferably, in the step of pressing with a jig having a flat surface from above the protective tape, a pressure of 10 to 1000 gf is applied per solder bump.

The method for manufacturing a semiconductor device according to the present invention described above comprises:
Preferably, the step of thinning the semiconductor wafer includes a step of thinning the semiconductor wafer by at least a mechanical grinding method, a chemical mechanical polishing method, or an etching method.

The method for manufacturing a semiconductor device according to the present invention described above comprises:
Preferably, after the step of thinning the semiconductor wafer, the method further includes a step of peeling off the protective tape and a step of cleaning the surface of the solder bump.

The method for manufacturing a semiconductor device according to the present invention described above comprises:
Preferably, the step of cleaning the surface on which the solder bumps are formed includes a step of removing an adhesive component remaining on the semiconductor wafer from the protective tape, and more preferably, an adhesive component remaining on the semiconductor wafer. The step of removing includes a washing step with an organic solvent. Also, preferably,
The step of cleaning the surface of the solder bump includes a sputtering etching process using discharge plasma of an inert gas or a reducing gas, and in the step of cleaning the surface of the solder bump, the semiconductor wafer in a gap between the solder bumps at the same time. Chemically activates the surface of

The method of manufacturing a semiconductor device according to the present invention is as follows.
A solder bump is formed on the semiconductor wafer so as to be connected to the circuit pattern of the semiconductor chip formed on the semiconductor wafer, and a probe needle is pressed against the solder bump to inspect the electrical characteristics of the circuit pattern of the semiconductor chip. Next, a protective tape is adhered to the entire surface of the semiconductor wafer on which the solder bumps are formed, and a jig having a flat surface is applied from the upper side of the protective tape to 10 to 1000 g per solder bump.
Press with the pressure of f to equalize the height of the solder bumps,
In addition, the adhesion of the protective tape to the semiconductor wafer is improved.
Next, the semiconductor wafer is thinned from at least the surface opposite to the surface to which the protective tape is attached by at least mechanical grinding, chemical mechanical polishing, or etching.

The method of manufacturing a semiconductor device according to the present invention is as follows.
Furthermore, the protective tape is peeled off, and the adhesive component remaining on the semiconductor wafer is removed from the protective tape by washing with an organic solvent or the like, or by a sputtering etching process using a discharge plasma of an inert gas or a reducing gas. The surface of the solder bump is cleaned while chemically activating the surface of the semiconductor wafer in the gap between the solder bumps.

According to the method of manufacturing a semiconductor device of the present invention described above, even if traces of probe needles are formed on the solder bumps or the bumps are crushed after the inspection for assuring the electrical characteristics, the solder bumps on the semiconductor wafer are removed. A protective tape is adhered to the entire surface of the formation and pressed with a jig having a flat surface from above the protective tape to equalize the height of the solder bumps, thereby reducing connection failures and improving connection reliability. Can be improved. In addition, since the adhesion of the protective tape to the semiconductor wafer is enhanced, water or a polishing solvent may enter between the protective tape and the semiconductor wafer during the grinding or polishing treatment, causing the protective tape to peel off or damage the semiconductor wafer. Is suppressed, and the semiconductor wafer can be stably thinned.

Further, when the solder bump surface is cleaned and mounted on a mounting substrate by a process of removing an adhesive component such as washing with an organic solvent or a sputtering etching process by discharge plasma of an inert gas or a reducing gas. The connection resistance of the semiconductor chip can be reduced by further chemically activating the surface of the semiconductor wafer in the gap between the solder bumps by a sputtering etching process using discharge plasma of the inert gas or reducing gas. The adhesiveness of the resin when the gap of the mounting board is sealed with the resin can be improved.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the method for manufacturing a semiconductor device according to the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a sectional view of a semiconductor device manufactured by a method of manufacturing a semiconductor device according to the present embodiment. Semiconductor chip 10 '
The pad electrode 11 formation surface made of aluminum or the like
For example, the first surface protection film 12 made of a silicon nitride layer and the second surface protection film 13 made of a polyimide film are covered, and the pad electrode 11 is opened. In this opening, chromium, copper, and gold are laminated. Conductive film 14 made of a film or the like
Are formed so as to be connected to the pad electrode 11. This conductive film may be called a BLM (Ball Limiting Metal) film. Further, a bump 16b made of, for example, a high melting point solder ball is formed so as to be connected to the conductive film (BLM film) 14. Here, the portion 1 near the top of the solder bump 16b
6d is flattened, and the height of the solder bump 16b is made uniform. The semiconductor chip 1 for mounting a bare chip is configured as described above.

A method for manufacturing the above semiconductor device will be described with reference to the drawings. The steps up to the formation of solder bumps and the inspection of electrical characteristics are performed in the same manner as in the conventional method. That is, first, as shown in FIG. 10A, a pad electrode 11 made of an aluminum-copper alloy or the like is pattern-formed on a semiconductor wafer 10 on which a circuit pattern of a semiconductor chip is formed by, for example, a sputtering method or etching. An upper layer is formed by covering the entire surface with a surface protective film 13 made of, for example, a silicon nitride layer or a polyimide film. After opening the pad electrode 11 portion of the surface protection film 13, a conductive film (BLM film) 14, which is a laminate of chromium, copper, and gold, is formed by, for example, a sputtering method so as to be connected to the pad electrode 11.

Next, as shown in FIG. 10B, a resist film R having a pattern opening A in a conductive film (BLM film) 14 formation region is patterned by a photolithography process. Next, as shown in FIG. 10C, a solder layer is formed on the entire surface by, for example, a vacuum evaporation method.
The solder layer 16 is formed in the pattern opening A of the resist film R. At this time, the solder layer 1 is also formed on the resist film R.
6a is formed.

Next, as shown in FIG. 11A, by removing the resist film R by lift-off, the solder layer 16a formed on the resist film R is simultaneously removed. Thus, only the solder layer 16 formed in the pattern opening A of the resist film R can be left. Next, as shown in FIG. 11 (b), heat treatment is performed to melt the solder layer 16, and the solder layer 16 is cooled and solidified in a spherical shape due to surface tension to form solder ball bumps 16b.

Next, as shown in FIG. 12A, for the device wafer on which the bumps have been formed as described above, as an inspection for assuring the electrical characteristics, for example, ( Measurement probe diameter: 30
μmφ, overdrive amount: 30 μm, heating temperature: 1
The measurement is performed by pressing the probe needle P under the condition of (05 ° C.). When the probe needle P is removed after the above inspection, the trace 16c of the probe needle is left near the top of the bump.

Next, as shown in FIG. 2A, a protective tape 17 having an adhesive layer 17b provided on a tape base material 17a is removed.
Affixed to the entire surface of the semiconductor wafer 10 where the solder bumps 16b are formed.

Next, as shown in FIG. 2 (b), the solder bumps 10 to 1000 gf (for example, 60
gf), while pressing the trace 16c of the probe needle of the solder bump 16b,
d is flattened and the height of the solder bumps 16b is made uniform. At this time, the adhesiveness of the protective tape 17 to the semiconductor wafer 10 is increased at the same time. If the pressure applied by the jig 18 is less than 10 gf per solder bump, effects such as uniform pump height are poor, and if it exceeds 1000 gf, there is a possibility of breakage. Therefore, the pressure is preferably in the range of 10 to 1000 gf.

Next, with respect to the semiconductor wafer (wafer film thickness is, for example, 620 μm) in the state shown in FIG. 3A, at least a mechanical grinding method, a chemical mechanical polishing method, The semiconductor wafer is thinned by an etching method and processed into a state shown in FIG. 3B (the film thickness is, for example, 100 μm). At this time,
By performing the process of forming a circuit pattern of a semiconductor chip or the like on a conventional semiconductor wafer, the process shown in FIG.
As shown in (a), the scratches 10a have been formed on the back surface of the semiconductor wafer 10, but the scratches 10a can be ground and removed by the above-mentioned thinning process, and further fine polishing can be performed by polishing and finishing. Can also be removed.

In the above-mentioned thinning processing, first, for example, in a grinding apparatus shown in FIG. 4, the semiconductor wafer 10 is placed on a base of the apparatus with the surface to which the protective tape 17 is adhered down, and, for example, While rotating 40 at a rotation speed of 2500 rpm, it is sent downward at a speed of 150 μm / min, and is ground, for example, by a film thickness of 510 μm to obtain a semiconductor wafer having a film thickness of 110 μm. Next, for example, in a chemical mechanical polishing apparatus shown in FIG. 5, the semiconductor wafer 10 on which the protective tape 17 is adhered is attached to the wafer carrier 41 and, for example, a polishing cloth (cloth) provided on a table (platen) 42. 43, polishing slurry 44 at 40 ml /
Polishing rate 400 g / cm while supplying at a supply rate of
^The wafer is pressed at ² , the wafer carrier 41 is rotated at 80 rpm, the table is rotated at 80 rpm, and rocked at a rocking speed of 2 mm / sec. Wafer 10
And

In this embodiment, since the adhesion of the protective tape to the semiconductor wafer is enhanced, water or a polishing solvent intrudes between the protective tape and the semiconductor wafer in the above-mentioned grinding or polishing to protect the tape. It is possible to prevent the tape from peeling off or to damage the semiconductor wafer, and to stably perform the thinning process on the semiconductor wafer.

Next, the surface protection tape is peeled off from the semiconductor wafer and separated into individual semiconductor chips by a dicing process to obtain the semiconductor device shown in FIG.

The semiconductor chip 1 formed as described above
Can be mounted on the mounting board 2 as shown in FIG. 6, for example. That is, the substrate 2 made of, for example, a glass epoxy material
0, the bump 1 of the semiconductor chip 1 to be mounted
A land (electrode) 21 made of copper or the like formed at a position corresponding to the formation position of 6b, and a print (not shown) formed on the front surface, the back surface, or both surfaces of the substrate 20 connected to the land 21 Land 2 with wiring section
Using the mounting substrate 2 covered with a solder resist 23 on the surface of the substrate 20 except for one portion, the semiconductor chip 1 is mounted on the mounting substrate 2 in correspondence with the bumps 16 b and the lands 21, and the eutectic solder layer 19 is formed. By bump 16
b and the land 21 are mechanically and electrically connected, and
The gap between the semiconductor chip 1 and the mounting board 2 can be sealed and mounted with a sealing resin 3 made of epoxy resin or the like.

According to the method of manufacturing a semiconductor device of the present embodiment, as described above, in the method of flip-chip mounting a device chip having a solder bump formed on a mounting substrate, the probe needle formed on the solder bump is Improving connection reliability by reducing connection failures caused by crushing of traces and bumps, and reliability and durability of final product devices assembled by mounting a plurality of device chips formed according to the present embodiment And the stable thinning of the device, so that it is possible to stably manufacture thin semiconductor device products for flip chip mounting, which are necessary to realize ultra-small and ultra-thin electronic devices. be able to.

Second Embodiment The semiconductor device according to the present embodiment is substantially the same as the semiconductor device according to the first embodiment. As in the method of manufacturing the semiconductor device, in the same manner as in the first embodiment, a protective tape is stuck on the bump-formed surface of the semiconductor wafer, and is pressed from above the protective tape by a jig having a flat surface from near the top. The protective tape is peeled off from the semiconductor wafer by flattening the portion, simultaneously increasing the adhesion of the protective tape to the semiconductor wafer, and further performing a thinning process such as a grinding process or a polishing process.

Next, the protective tape peeling surface is washed with an organic solvent such as alcohol or ether, and the adhesive component (mainly acrylic) remaining on the semiconductor wafer is removed from the protective tape.

Next, for example, RF of an inert gas such as Ar
Sputter etching using discharge plasma is performed.
The above RF discharge plasma is performed using, for example, a parallel plate RF plasma processing apparatus shown in FIG. In FIG.
The parallel plate type RF plasma processing apparatus includes a plasma processing chamber 5
An anode plate 51 and a wafer stage 52 serving as a cathode plate are arranged opposite to each other in a space 0, and a wafer 53 to be processed is placed on the wafer stage 52. The anode plate 51 has a ground potential, and the wafer stage 52 is connected to a coupling capacitor 55 and a substrate bias power supply 56. A plasma source gas is introduced into the plasma processing chamber 50, and a predetermined voltage is applied to each electrode, so that the plasma 5 is introduced into the plasma processing chamber 50.
8 is generated. In the wafer stage 52, a refrigerant pipe or the like is provided, so that a refrigerant such as Florinart, for example, may be circulated.

In order to perform a sputtering etching process on a wafer to be processed using the parallel plate type RF plasma processing apparatus shown in FIG. 7, for example, (etching gas type and flow rate: Ar = 25 sccm, pressure: 1. 0
Pa, wafer stage temperature: room temperature, RF applied power:
300 W (13.56 MHz), processing time: 30 seconds).

By the above-mentioned sputtering etching process using the RF discharge plasma of the inert gas, the process residues and the natural oxide film remaining on the surface of the solder bump are removed.
The solder bump surface can be cleaned.

In the subsequent steps, as in the first embodiment, individual semiconductor chips are separated by a dicing step to obtain the semiconductor device shown in FIG. The semiconductor chip formed as described above can be mounted on a mounting board, for example, as shown in FIG. 6, as in the first embodiment. At this time, by cleaning the surface of the solder bumps in the washing with the organic solvent and the sputtering etching treatment as described above, the connection resistance when mounted on the mounting board can be reduced. Further, by a sputtering etching process using discharge plasma of the inert gas,
The surface of the semiconductor wafer (the surface of the second surface protection film 13 made of a polyimide film) in the gap between the solder bumps can be chemically activated, thereby sealing the gap between the semiconductor chip and the mounting board with resin. In this case, the adhesion of the resin can be improved.

According to the method of manufacturing a semiconductor device of the present embodiment, as described above, in the method of flip-chip mounting a device chip having a solder bump formed on a mounting board, the probe needle formed on the solder bump is Improving connection reliability by reducing connection failures caused by crushing of traces and bumps, further improving electrical characteristics, and assembling by mounting a plurality of device chips formed according to the present embodiment. Thin semiconductors for flip-chip mounting that are required to realize ultra-small and ultra-thin electronic devices, as they can improve the reliability and durability of product devices and stably reduce the thickness of devices. Device products can be manufactured stably.

Third Embodiment The semiconductor device according to the present embodiment is substantially the same as the semiconductor device according to the first embodiment. As in the method of manufacturing the semiconductor device, in the same manner as in the first embodiment, a protective tape is stuck on the bump-formed surface of the semiconductor wafer, and is pressed from above the protective tape by a jig having a flat surface from near the top. The protective tape is peeled off from the semiconductor wafer by flattening the portion, simultaneously increasing the adhesion of the protective tape to the semiconductor wafer, and further performing a thinning process such as a grinding process or a polishing process.

Next, the protective tape peeling surface is washed with an organic solvent such as alcohol or ether to remove the adhesive component (mainly acrylic) remaining on the semiconductor wafer from the protective tape.

Next, sputtering etching is performed using discharge plasma of a reducing gas such as HF. The discharge plasma is, for example, a triode type R shown in FIG.
This is performed using an F plasma processing apparatus. In FIG. 8, a triode type RF plasma processing apparatus includes a plasma processing chamber 5
An anode plate 51 and a wafer stage 52 serving as a cathode plate are arranged opposite to each other in a space 0, and a wafer 53 to be processed is placed on the wafer stage 52. The anode plate 51 is connected to a plasma generation power supply 54, the wafer stage 52 is connected to a coupling capacitor 55 and a substrate bias power supply 56, and the plasma processing chamber 50 has a space between the anode plate 51 and the wafer stage 52. Is provided with a grid electrode 57 having a ground potential. A plasma source gas is introduced into the plasma processing chamber 50, and a predetermined voltage is applied to each electrode to generate a plasma 58 in the plasma processing chamber 50. In the wafer stage 52, a refrigerant pipe or the like is provided, so that a refrigerant such as Florinart, for example, may be circulated.

To perform a sputtering etching process on a wafer to be processed by using the triode type RF plasma processing apparatus shown in FIG. 8, for example, (etching gas type and flow rate: HF / Ar = 10/20 scc)
m, pressure: 1.0 Pa, wafer stage temperature: room temperature,
Plasma source power: 700 W (2 MHz), substrate bias voltage: 350 W (13.56 MHz), processing time:
30 seconds). Here, in order to introduce a liquid source such as HF into the plasma processing chamber, a technique such as bubbling, heating vaporization, or ultrasonic vaporization using a carrier gas such as He can be used.

By a sputtering etching process using discharge plasma of the reducing gas, a natural oxide film formed due to oxygen and moisture taken in the solder bumps is removed by sputtering etching while chemically reducing the natural oxide film. The solder bump surface can be cleaned.

In the subsequent steps, as in the first embodiment, individual semiconductor chips are separated by a dicing step to obtain the semiconductor device shown in FIG. The semiconductor chip formed as described above can be mounted on a mounting board, for example, as shown in FIG. 6, as in the first embodiment. At this time, by cleaning the surface of the solder bumps in the washing with the organic solvent and the sputtering etching treatment as described above, the connection resistance when mounted on the mounting board can be reduced. Furthermore, dangling bonds on the polyimide film surface in the gaps between the solder bumps are terminated by F atoms and other halogen atoms having a high electronegativity due to the sputtering etching process using discharge plasma of a reducing gas (HF gas), and chemically. The activated surface can be maintained, and thereby the adhesion of the resin when the gap between the semiconductor chip and the mounting board is sealed with the resin can be improved.

According to the method of manufacturing a semiconductor device of the present embodiment, as described above, in the method of flip-chip mounting a device chip having a solder bump formed on a mounting substrate, the probe needle formed on the solder bump may be used. Improving connection reliability by reducing connection failures caused by crushing of traces and bumps, further improving electrical characteristics, and assembling by mounting a plurality of device chips formed according to the present embodiment. Thin semiconductors for flip-chip mounting that are required to realize ultra-small and ultra-thin electronic devices, as they can improve the reliability and durability of product devices and stably reduce the thickness of devices. Device products can be manufactured stably.

The semiconductor device manufactured according to the present invention can be applied to any semiconductor device such as a MOS transistor semiconductor device, a bipolar semiconductor device, a BiCMOS semiconductor device, and a semiconductor device having a logic and a memory. is there.

The method of manufacturing a semiconductor device according to the present invention is not limited to the above embodiment. For example, as a plasma processing apparatus, in addition to a parallel plate RF plasma processing apparatus and a triode RF plasma processing apparatus, an ICP high density plasma processing apparatus, a TCP (Transformaer Coupled Plasma) type,
A high-density plasma processing apparatus such as an ECR (Electron Cyclotron Resonance) type or a helicon wave plasma can be used. Further, the conditions of each process, the structure of the wafer, and the like are not limited to the contents described in the above embodiment. As the reducing gas used in the third embodiment,
In addition to HF, H ₂ or HCl can be used. Also, as a method of forming bumps on a wafer, a method of forming a film by vacuum evaporation and a method of patterning by lift-off has been described. However, various methods such as a screen printing method, an electrolytic plating method, and a solder ball transfer method can be used. it can. In addition, various changes can be made without departing from the gist of the present invention.

[0055]

As described above, according to the method of manufacturing a semiconductor device of the present invention, a method of flip-chip mounting a device chip on which a solder bump is formed on a mounting substrate is described.
Traces of probe needles formed on the solder bumps and connection failures caused by the bumps being crushed are reduced to improve connection reliability. The reliability and durability of various devices can be improved, and the equipment can be made thinner in a stable manner. Semiconductor device products can be manufactured stably.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to first to third embodiments.

FIGS. 2A and 2B are cross-sectional views illustrating a manufacturing process of the method for manufacturing a semiconductor device according to the first to third embodiments, in which FIG. 2A is a process up to a protection tape attaching process, and FIG. Up to

FIG. 3 shows a step subsequent to that of FIG. 2, in which a semiconductor wafer is thinned from a state shown in FIG. 2A to a state shown in FIG.

FIG. 4 is a perspective view showing a schematic configuration of a grinding device.

FIG. 5 is a view showing a schematic configuration of a chemical mechanical polishing apparatus.

FIG. 6 is a sectional view of an electronic circuit device in which a semiconductor chip formed in the first to third embodiments is mounted on a mounting substrate.

FIG. 7 is a schematic diagram of a parallel plate RF plasma processing apparatus according to a second embodiment.

FIG. 8 is a triode type RF according to a third embodiment;
It is a schematic diagram of a plasma processing apparatus.

FIG. 9 is a sectional view of an electronic circuit device according to a conventional example.

10A and 10B are cross-sectional views illustrating manufacturing steps of a method of manufacturing a semiconductor device according to the present invention and a conventional example, in which FIG. 10A illustrates up to a step of forming a conductive film (BLM film), and FIG. (C) shows up to the step of forming a solder layer.

FIG. 11 shows a step that follows the step shown in FIG. 10;
5B shows the process up to the step of removing the solder layer on the resist film by lift-off, and FIG. 5B shows the process up to the step of forming the solder ball bump by reflow.

FIG. 12 shows a step that follows the step of FIG. 11;
(A) until the step of pressing the probe needle for inspection
(B) shows the process up to the step of removing the probe needle.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1: Semiconductor chip for mounting bare chip, 2: Mounting board, 3
... Seal resin, 10 ... Semiconductor wafer, 10 '... Semiconductor chip, 11 ... Pad electrode, 12,13 ... Surface protective film, 1
4 ... conductive film (BLM film), 15 ... upper surface protection film, 15
a: scum, 16, 16a: solder layer, 16b: solder bump, 16c: trace of probe needle, 16d: near the top, 17: protective tape, 17a: tape base, 17b ...
Adhesive layer, 18 jig, 19 eutectic solder layer, 20 substrate, 21 land, 23 solder resist, 40 grindstone, 41 wafer carrier, 42 table, 43
Polishing cloth, 44 polishing slurry, 50 plasma processing chamber, 5
DESCRIPTION OF SYMBOLS 1 ... Anode plate, 52 ... Wafer stage, 53 ... Wafer to be processed, 54 ... Plasma generation power supply, 55 ... Coupling capacitor, 56 ... Substrate bias power supply, 57 ... Lattice electrode, 58 ...
Plasma, R: resist film, A: opening, P: probe needle.

Claims (9)

[Claims] A step of forming a solder bump on the semiconductor wafer so as to be connected to a circuit pattern of the semiconductor chip formed on the semiconductor wafer; Inspecting the electrical characteristics of the pattern; applying a protective tape to the entire surface of the semiconductor bump forming surface of the semiconductor wafer; pressing the protective tape from above with a jig having a flat surface from the solder to form the solder; A step of making the height of the bumps uniform and increasing the adhesion of the protective tape to the semiconductor wafer; and a step of thinning the semiconductor wafer from the surface opposite to the surface to which the protective tape is attached. Production method. 2. The method according to claim 1, wherein in the step of pressing the protective tape from above with a jig having a flat surface, a pressure of 10 to 1000 gf is applied to each of the solder bumps. 3. The step of thinning the semiconductor wafer,
2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of thinning the semiconductor wafer by at least a mechanical grinding method, a chemical mechanical polishing method, or an etching method. 4. The method according to claim 1, further comprising, after the step of thinning the semiconductor wafer, a step of peeling off the protective tape and a step of cleaning the surface of the solder bump. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the step of cleaning the surface of the solder bump includes a step of removing an adhesive component remaining on the semiconductor wafer from the protective tape. 6. The method of manufacturing a semiconductor device according to claim 5, wherein the step of removing the adhesive component remaining on the semiconductor wafer includes a cleaning step using an organic solvent. 7. The method of manufacturing a semiconductor device according to claim 4, wherein the step of cleaning the surface of the solder bump includes a sputtering etching process using an inert gas discharge plasma. 8. The method of manufacturing a semiconductor device according to claim 4, wherein the step of cleaning the surface of the solder bump includes a sputtering etching process using discharge plasma of a reducing gas. 9. The method of manufacturing a semiconductor device according to claim 4, wherein in the step of cleaning the surface of the solder bump, the surface of the semiconductor wafer in a gap between the solder bumps is simultaneously chemically activated.