JP2001167693A - Electron emission element, electron source and image forming device and method of fabricating electron emission element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electron emission element having a high electron emission efficiency and a simple and easy structure, an electron source and an image forming device each having the electron emission element, and a method of fabricating the electron emission device. SOLUTION: A high potential electrode 5A is installed on a sidewall of an insulating layer 3C, and a low potential electrode 5B is installed on a sidewall of an insulating layer 3A. A recess portion 6 is formed in such a manner that the sidewall of the insulating layer 3B formed between the insulating layer 3A and the insulating layer 3C is receded inwardly from the sidewall of the high potential electrode layer 4 and the sidewalls of the insulating layers 3B and 3C. Between the high potential electrode 5A and the low potential electrode 5B, there is formed a gap serving as an electron emission portion.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an electron-emitting device for emitting electrons, an electron source having the electron-emitting device, an image forming apparatus having the electron source, and a method of manufacturing the electron-emitting device. It is.

[0002]

2. Description of the Related Art Conventionally, two types of electron-emitting devices, a thermionic electron-emitting device and a cold cathode electron-emitting device, are known. The cold cathode electron emitting device includes a field emission type (hereinafter, referred to as “FE type”), a metal / insulating layer / metal type (hereinafter, referred to as “MIM type”), a surface conduction type electron emitting device, and the like.

[0003] As an example of the FE type, W. P. Dyke
& W. W. Dolan, "Field Emissi
on ", Advance in Electron P
physics, 8, 89 (1956) or C.I. A.
Spindt, “PHYSICAL Property
es of thin-film field emi
session cathodes with mollyb
denium cones ", J. Appl. Phys.
s. , 47, 5248 (1976).

As an example of the MIM type, C.I. A. Mea
d, “Operation of Tunnel-Em
issue Devices, "J. Apply.
Phys. , 32, 646 (1961).

In a recent example, Toshiaki.
Kusunoki, “Fractation-fre
e electron emission from
non-formed metal-insulato
r-metal (MIM) cathodes Fabr
icated by low current Ano
dic oxidation ", Jpn. J. App.
l. Phys. vol. 32 (1993) pp. L16
95, Mutsumi suzuki et al "
An MIM-Cathode Array for
Cathodeluminescent Displa
ys ", IDW'96, (1996) pp. 529 and the like have been studied.

[0006] As an example of the surface conduction type, a report by Elinson (MI Elinson Radio Eng. E) is available.
electron Phys. , 10 (1965)), and the surface conduction type electron-emitting device emits electrons when a current flows through a small-area thin film formed on a substrate in parallel with the film surface. It utilizes the phenomenon.

As the surface conduction type devices, those using the SnO ₂ thin film, those using the Au thin film described in the above-mentioned report by Ellison, and those using (G. Dittmer. Thin Solid)
Films, 9, 317 (1972)), In ₂ O ₃ /
According to SnO ₂ thin film (M. Hartwell an)
d C.I. G. FIG. Fonstad, IEEE Trans.
ED Conf. , 519 (1983)).

Japanese Patent Application Laid-Open No. 9-82214 discloses an example in which the electron emission efficiency of a surface conduction electron-emitting device is improved.

Here, the efficiency refers to a current flowing when a voltage is applied to a pair of opposed device electrodes of the surface conduction electron-emitting device (hereinafter, referred to as a device current If), and is emitted into a vacuum corresponding thereto. It refers to a current ratio to a current (hereinafter referred to as an electron emission current Ie).

This example will be described with reference to FIG.
In the figure, 141 is a substrate, 142 is an electron-emitting portion, 1
43 is a conductive film, 144 is a cathode side device electrode, 145 is an anode side device electrode, 146 is a gap, and 147 is an electric field correction electrode.

In a surface conduction electron-emitting device, the emitted electrons move in an electric field formed by a low potential electrode and a high potential electrode. The ratio of the electrons reaching the anode electrode, that is, the electron emission efficiency is affected.

In this embodiment, an electric field correction electrode 147 is provided outside the low potential electrode in order to improve the electron emission efficiency.

In these surface conduction electron-emitting devices, it is common to form an electron-emitting portion on a conductive thin film by an energization process called "energization forming" before electron emission.

The energization forming is a process in which a current is applied by applying a voltage to both sides of the conductive thin film, and the conductive thin film is locally destroyed, deformed or deteriorated, and an electron in an electrically high resistance state is formed. The formation of the emission part. In addition,
In the electron emitting portion, a minute gap is generated in a part of the conductive thin film, and electrons are emitted from the vicinity of the gap.

Here, there is a problem that if the position of the gap differs depending on the element, the electron emission characteristics vary.

As a means for solving this problem, Japanese Patent Application Laid-Open Publication No. Heisei 1 (1999) discloses an example in which a gap is formed without performing energization forming for the purpose of controlling the gap position which is an electron emission portion.
As disclosed in JP-A-105445 and JP-A-9-55161, a vertical surface conduction element has been proposed.

In this example, as shown in FIG.
A step is formed between the two device electrodes 152 and 154 via an insulating layer 153 on 1, and an electron emitting portion 155 is arranged on a side end surface of the insulating layer 153 formed on the electrode facing portion.

Further, as disclosed in Japanese Patent Application Laid-Open No. 9-330646, there is an element having a configuration in which an insulating layer is sandwiched between both element electrodes.

Further, in order to improve the electron emission characteristics,
A process called “activation” may be performed. That is, this activation treatment forms a film made of carbon or a carbon compound (carbon) around the cracks in the electron-emitting portion. In this activation treatment step, the element is formed in an atmosphere containing an organic substance. A method of applying a pulse voltage to carbon and depositing carbon and carbon compounds around the cracks.

Here, the electron source is provided with a plurality of electron-emitting devices as described above.

Conventionally, as an example in which a large number of surface conduction electron-emitting devices are arranged and formed, surface conduction electron-emitting devices are arranged in parallel, and both ends (both device electrodes) of each surface-driven electron emission device are wired. (Common wiring), an electron source in which a plurality of rows each connected by a common line are arranged (ladder-like arrangement) (for example, JP-A-64-31332, JP-A-1-21-2).
No. 83749, Japanese Unexamined Patent Publication No. 1-257552, etc.).

In recent years, in image forming apparatuses such as display apparatuses, flat panel display apparatuses using liquid crystal have been widely used in place of CRTs. However, since they are not self-luminous, they must have a backlight. Therefore, a self-luminous display device has been desired.

The self-luminous display device is an image forming device that combines an electron source having a large number of surface conduction electron-emitting devices arranged therein and a phosphor that emits visible light by electrons emitted from the electron source. Devices (eg, US Pat. No. 5,066,883).

Here, it is desirable that the surface conduction electron-emitting device used in the image forming apparatus has high efficiency and stable electron emission characteristics.

When an electron-emitting device having a low electron-emitting efficiency is used in an image forming apparatus, a large device current If is required to obtain a required emission current. As a result, power consumption increases. This is because the voltage drop due to the wiring resistance increases, which causes luminance unevenness.

[0026]

However, in the case of the above-described prior art, the following problems have occurred.

In the surface conduction type electron-emitting device according to the prior art described above, as will be described later, most of the electrons emitted from the electron-emitting portion do not directly go to the anode electrode, but the conductive thin film on the high potential side. Or, it is incident on the element electrode.

Of these, the one that has been elastically scattered goes to the anode again, but a considerable portion is absorbed, and the electron emission efficiency is reduced.

Therefore, increasing the ratio of electrons directly toward the anode and improving the efficiency of elastic scattering on the conductive thin film on the high potential side or the device electrode are methods of improving the electron emission efficiency. Conceivable.

In a device having a correction electrode as disclosed in Japanese Patent Application Laid-Open No. 9-82214, although the electron emission efficiency is improved, the potential of the correction electrode is high and there is a problem in driving. , Has not been fully resolved.

The present invention has been made to solve the above-mentioned problems of the prior art, and an object of the present invention is to provide an electron-emitting device having a simple structure and high electron-emitting efficiency, and an electron source having the same. Another object of the present invention is to provide an image forming apparatus including the same, and a method for manufacturing an electron-emitting device.

[0032]

In order to achieve the above object, according to the present invention, there is provided a first layer having a first side wall surface, and a first layer having a first side wall surface formed on an extension surface thereof. A second layer having a second side wall surface substantially matching with the first side wall surface, and a third side wall surface provided with the surface at a position depressed inward from the first side wall surface and the second side wall surface. And a third layer provided between the first layer and the second layer, wherein a high-potential electrode is provided on the first side wall surface. A low-potential electrode is provided on the second side wall surface, and a gap between these electrodes is used as an electron-emitting portion.

Therefore, the electrons emitted from the low potential electrode toward the high potential electrode perform elastic scattering only by the thickness of the first layer, so that the rate of absorption by the high potential electrode is reduced, and The creepage distance increases as much as the position of the side wall surface of the second is concave, and the leak current can be reduced. Further, a high potential electrode and a low potential electrode are provided in a structure (recess structure) in which a side wall surface of a third layer provided between the first layer and the second layer is located at a concave position. The position of the electron emitting portion can be easily controlled with a simple configuration by using the electron emitting portion between these portions.

A low-potential electrode layer laminated on the substrate, an insulating layer laminated on the low-potential electrode layer, and a high-potential electrode layer laminated on the insulating layer; Is preferably electrically connected to the high potential electrode layer, and the low potential electrode is electrically connected to the low potential electrode layer.

It is preferable that the insulating layer includes the first layer, the second layer, and the third layer.

The high potential electrode layer is the first layer,
It is preferable that the insulating layer includes the second layer and the third layer.

When the second layer side is viewed from the first layer side, it is preferable that the low-potential electrode is surrounded by the high-potential electrode.

By forming a through hole penetrating the first layer, the second layer and the third layer, a part of the inner peripheral surface of the through hole is used as the first side wall surface. The other portion of the inner peripheral surface of the through hole is used as the second side wall surface, and a high potential electrode and a low potential electrode are provided on these side wall surfaces, respectively, so that the low potential electrode is surrounded by the high potential electrode. It is good to do.

The high-potential electrode and the low-potential electrode are preferably provided only in a part of the inner periphery of the through hole in the circumferential direction, so that the electron emission portion is formed only in a part of the circumferential direction.

The high-potential electrode layer is formed in a square shape, and electron emission portions are provided on both ends of the high-potential electrode layer, and the low-potential electrode layers are spread on both ends. Should be placed.

The high-potential electrode layer is formed in a rectangular shape, and an electron emission portion is provided only at one end of a pair of both ends of the high-potential electrode layer. It is good to arrange each layer so that it may spread.

It is preferable that the element emits surface conduction type electrons.

The electron source of the present invention is characterized in that a plurality of the above-mentioned electron-emitting devices are arranged.

Preferably, the electron-emitting devices are arranged in a matrix.

In the image forming apparatus of the present invention,
In addition to the above-mentioned electron source, an image forming member for forming an image by the electrons emitted from the electron source is provided.

It is preferable that the image forming member is a phosphor which emits light by collision of electrons.

The method for manufacturing an electron-emitting device according to the present invention has a three-layer structure in which a first layer, a second layer, and a third layer are laminated, and has a side wall surface of these layers. A method of manufacturing an electron-emitting device in which an electron-emitting portion is provided on a side, wherein the third layer is made of a different material from the first layer and the second layer, and Forming a recess structure by selectively etching only the second layer by a predetermined amount after the laminating step of laminating the first layer and the first layer in order, and thereafter, an electron emission portion is formed at the recess position. Covering the side wall surfaces of the first layer and the second layer with conductive thin films, respectively.

The first, second, and third layers are preferably insulating layers.

It is preferable that the first layer is a high-potential electrode layer electrically connected to the conductive thin film, and the second and third layers are insulating layers.

[0050]

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, the dimensions of the components described in this embodiment,
The materials, shapes, relative arrangements, and the like are not intended to limit the scope of the present invention only to them unless otherwise specified.

First, the mechanism of the device provided with the electron-emitting device according to the embodiment of the present invention will be described.

Before describing the improvement of the efficiency of the present invention, the motion of electrons in the surface conduction electron-emitting device will be described. First, a planar element will be described with reference to FIG.

The anode 16 is separated from the electron-emitting device by a distance H.
3, the voltage applied between the element high potential electrode 161 and the element low potential electrode 162 is Vf, and the voltage Va applied between the element low potential electrode 162 and the anode (anode) 163 is Vf. In the configuration for applying
98 Digest, Okuda, et. According to al, the device has a gap on the order of nm, and this device has a V
It is known that when f is applied, electrons are emitted from the tip of the low-potential electrode toward the opposite high-potential electrode, and the electrons are isotropically scattered at the tip of the high-potential electrode.

In the figure, reference numeral 164 denotes an equipotential surface equal to the drive voltage Vf, and 165 denotes an equipotential surface higher than Vf.

Because of such a potential distribution around the electron emission portion, most of the emitted electrons are repeatedly elastically scattered (multiple scattered) several times on the high-potential electrode, and the electrons exceeding the characteristic distance Xs are repeated. Reaches the anode 163.

Here, Xs = HVf / (πVa), for example, Va = 10 [KV], Vf = 15 [V], H
At = 2 [mm], Xs is about 1 μm.

Efficiency is governed by a decrease in the number of electrons due to partial absorption by the high potential electrode due to multiple scattering until electrons due to multiple scattering exceed Xs.

It is not clear about the ratio β that is scattered due to the electron scattering of about several tens eV, but it is 0.1% per one time.
From about 0.5.

Since β is 1 or less in such a scattering mechanism, it can be seen that the amount of electrons taken out in a vacuum decreases with a power.

Therefore, in order to improve the efficiency, it is necessary to adopt a configuration in which electrons are not scattered by the high potential electrode in Xs.

Next, the movement of electrons in the electron-emitting device according to the embodiment of the present invention will be described with reference to FIG.

As shown, a step is provided between the device electrodes,
When the electron emission portion is arranged on the step side wall, the low potential electrode 1
The electrons emitted from 72 repeat multiple scattering on high potential electrode 171 as in the case of the flat type, but on the upper surface of the high potential electrode layer, electrons that are about to scatter collide with high potential electrode 171. Anode (anode) 1 as it is
Go to 73.

In the figure, reference numeral 174 denotes an equipotential surface equal to the drive voltage Vf, and 175 denotes an equipotential surface higher than Vf.

Therefore, the length from the position of the end of the high potential electrode 171 to the upper part of the layer of the high potential electrode 171 (T
By configuring 1) such that the value becomes as small as possible than the above-mentioned feature distance Xs, it is possible to prevent a decrease in efficiency due to multiple scattering.

According to the present invention, in order to reduce the number of electrons absorbed by the high-potential electrode due to scattering and to improve the efficiency, the position of the gap as the electron-emitting portion and the high-potential electrode is controlled by: It has been studied diligently so as to be realized with a simple configuration.

Next, the configuration and the like of the electron-emitting device according to the present embodiment, which can improve the efficiency, will be described.

FIG. 1A is a schematic plan view of an electron-emitting device according to an embodiment of the present invention, and FIG.
It is sectional drawing in the AA in (a). FIG.
FIG. 3 is a schematic view showing a state in which this element is driven.

In FIG. 1, reference numeral 2 denotes a low potential electrode layer, 3A, 3B,
3C is an insulating layer, 4 is a high-potential electrode layer, 5A is a high-potential electrode formed of a conductive material electrically connected to the high-potential electrode layer 4, and a side wall surface (first side) of the insulating layer 3C. 5B is a low-potential electrode made of a conductive material electrically connected to the low-potential electrode layer 2, and is provided on the side wall surface (the second side wall surface) of the insulating layer 3A. 6) is provided on the side wall surface of the insulating layer 3B (third side wall surface) on the step side wall and the side wall surface of the high potential electrode layer 4 and the insulating layer 3B.
The recessed portions 7 are recessed inward so as to be depressed in comparison with the side wall surfaces of B and 3C, and 7 is a gap serving as an electron emitting portion. In the case of the configuration of FIG. 1, the insulating layer 3A corresponds to the second layer,
The insulating layer 3B corresponds to a third layer, and the insulating layer 3C corresponds to a first layer.

In FIG. 2, Vf is a voltage applied between the device high potential electrode and the device low potential electrode, If is a device current flowing at this time, and Va is a voltage between the device low potential electrode and the anode (anode) 8. And Ie is an electron emission current.

FIG. 3 is an enlarged schematic view of the electron emission portion in such an arrangement. In FIG. 3, D is a gap distance between the high-potential electrode 5A and the low-potential electrode 5B, T1 is a distance from an end position of the high-potential electrode 5A of the gap 7 to an upper portion of the high-potential electrode layer 4, and T2 is a gap. 7 is the distance from the end position of the low potential electrode 5B to the surface of the low potential electrode layer 2.

The high-potential electrode is, in a broad sense, a high-potential electrode layer 4 and a high-potential electrode 5 formed of a conductive material.
A means all electrodes electrically connected to the high potential side including A. Similarly, the low potential electrode broadly means the low potential electrode layer 2 and the low potential electrode formed from a conductive material. This means all electrodes including the potential electrode 5B that are electrically connected to the lower potential side.

When Vf is applied to this element, electrons 31 are emitted from the tip of the low-potential electrode 5B in FIG. 3 to the opposing high-potential electrode 5A, and the emitted electrons 31 return to the tip of the high-potential electrode 5A. Scatters isotropically.

As described above, many of the electrons 32 scattered by the high-potential electrode 5A are repeatedly elastically scattered (multiple scattering) several times by the high-potential electrode 5A. Jumps out to the anode side without scattering.

The flight distance of the scattered electrons is estimated to be at most about 200 times the gap width D or the above-mentioned characteristic distance Xs, and T1 is set to be as small as 200 times the gap width D or the characteristic distance Xs as much as possible. As a result, the number of electrons traveling toward the anode can be increased.

As described above, T1 is important as a parameter relating to multiple scattering.

FIG. 18 is a graph showing the relationship between T1 and efficiency. In FIG. 18, the vertical axis indicates efficiency (Ie / If), and the horizontal axis indicates logT1.

According to this, it is understood that the efficiency decreases as T1 increases, and the efficiency decreases more remarkably when the gap position is closer to the low potential electrode layer.

The element structure is a step structure in which an insulating layer and a high-potential electrode layer are laminated on a low-potential electrode layer as described above,
When a gap is arranged on the step side wall, T1 is defined by the thickness of the high potential electrode layer and the position of the gap on the step side wall.

The thickness of the high-potential electrode layer is determined in consideration of the parasitic resistance.
It is appropriately selected depending on the driving voltage, and in the configuration of the present embodiment, it can be easily controlled by a normal thin film deposition technique.
Further, in the present embodiment, by forming a recess in the side wall of the insulating layer, the gap can be located immediately below the high potential electrode.

As described above, T1 can be controlled, and a highly efficient electron-emitting device can be provided.

The above-described electron-emitting device according to the embodiment of the present invention will be described in more detail.

Referring to FIG. 4, an example of a method for manufacturing an electron-emitting device according to an embodiment of the present invention will be described. FIG.
FIG. 4 is a schematic view sequentially showing the manufacturing process of the electron-emitting device according to the embodiment of the present invention.

First, the surface was sufficiently cleaned beforehand.
Low potential is placed on an insulating substrate 1 such as quartz glass, glass having a reduced impurity content such as Na, blue plate glass, a laminated body obtained by laminating SiO ₂ on a silicon substrate by sputtering or the like, or ceramics such as alumina. The electrode layer 2 is laminated.

Here, the low-potential electrode layer 2 generally has conductivity, and is formed by a general vacuum film forming technique such as an evaporation method or a sputtering method, or a photolithography technique.

The material of the low potential electrode layer 2 is, for example, Be,
Mg, Ti, Zr, Hf, V, Nb, Ta, Mo, W,
Al, Cu, Ni, Cr, Au, Pt, Pd and other metals
Or alloy materials, TiC, ZrC, HfC, TaC, Si
Carbides such as C and WC, HfB _Two, ZrB_Two, LaB₆, C
eB₆, YB_Four, GdB_FourBorides such as TiN, ZrN,
Nitride such as HfN, semiconductor such as Si and Ge, organic polymer
Material, amorphous carbon, graphite, diamond
Like carbon, diamond dispersed carbon and
A carbon compound or the like is appropriately selected.

The thickness of the low-potential electrode layer 2 is set in the range of several tens nm to several mm, preferably several hundred nm.
It is selected in the range of m to several μm.

Next, following the low potential electrode layer 2, the insulating layer 3A
Is deposited. Here, the insulating layer 3A is formed by a general vacuum film forming method such as a sputtering method, a CVD method, or a vacuum evaporation method.
The thickness is set in the range of several nm to several tens of μm, and is preferably selected in the range of several tens to several hundred nm.

Subsequently, an insulating layer 3B to be a recess portion later is formed on the insulating layer 3A by a general vacuum film forming method such as sputtering.
It is formed by a CVD method or a vacuum evaporation method. As its thickness,
It is set in the range of several nm to 100 nm, and is preferably selected from the range of several nm to 30 nm.

Further, an insulating layer 3C is deposited following the insulating layer 3B. The insulating layer 3C is formed by a general vacuum film forming method such as a sputtering method, a CVD method, or a vacuum evaporation method, and its thickness is set in a range from several nm to 100 nm, preferably from several nm to 30 nm. Selected by range.

The above-mentioned insulating layer 3B is formed by insulating layers 3A and 3A.
For C, a material that can be selectively etched by a certain etchant is appropriately selected, and the insulating layers 3A and 3B can be made of an insulating material such as SiO _2.
Can be made of, for example, Si ₃ N ₄ , PSG having a high phosphorus concentration, BSG film having a high boron concentration, or the like.

Further, a high potential electrode layer 4 is deposited following the insulating layer 3C.

The high-potential electrode layer 4 has conductivity similarly to the low-potential electrode layer 2, and is formed by a general vacuum film forming technique such as an evaporation method or a sputtering method, or a photolithography technique.

The material of the high potential electrode layer 4 is, for example, Be,
Mg, Ti, Zr, Hf, V, Nb, Ta, Mo, W,
Al, Cu, Ni, Cr, Au, Pt, Pd and other metals
Or alloy materials, TiC, ZrC, HfC, TaC, Si
Carbides such as C and WC, HfB _Two, ZrB_Two, LaB₆, C
eB₆, YB_Four, GdB_FourBorides such as TiN, ZrN,
Nitride such as HfN, semiconductor such as Si and Ge, organic polymer
Material, amorphous carbon, graphite, diamond
Like carbon, diamond dispersed carbon and
It is appropriately selected from carbon compounds and the like.

The thickness of the high-potential electrode layer 4 is several tens of nm.
To a few mm, and preferably in the range of several tens to several hundreds of nm.

The low-potential electrode layer 2 and the high-potential electrode layer 4 may be of the same material or different materials, and may be of the same forming method or different methods.
May be set in a range where the film thickness is thinner than
Low resistance materials are desirable.

FIG. 4 (a) shows a state in which the semiconductor device is manufactured by the above-described manufacturing process.

Next, by photolithography technology,
A step structure is formed in which the insulating layers 3A, 3B, 3C, which are the deposited films, and a part of the high potential electrode layer 4 are removed from the substrate 1. However, this etching step may be stopped up to the upper surface of the low potential electrode layer 2 or a part of the low potential electrode layer 2 may be etched.

Here, the low potential electrode layer 2 is a lower electrode, and the high potential electrode layer 4 is an upper electrode.

The element electrode length L1 (see FIG. 1A) is
It is set as appropriate depending on the material constituting the device, the resistance value, and the arrangement of the electron-emitting devices. Usually, it is selected from the range of several μm to several hundred μm.

As a method of forming the above-mentioned step, spin coating of a photoresist, exposure and development of a mask pattern are performed, and insulating layers 3A, 3B, 3C and high potential electrode layer 4 are formed by wet etching or dry etching.
Is partially removed.

In this etching step, a smooth and vertical etching surface is desirable, and an etching method may be selected according to the material of each electrode and insulating layer.

FIG. 4B shows a state in which the semiconductor device has been manufactured in the above manufacturing steps.

Subsequently, a recess structure 6 is formed on the step side wall by wet etching or the like.

As an etching method, for example, Ta is selected as a material of the high-potential electrode layer 4, SiO ₂ is selected as a material of the insulating layers 3A and 3C, PSG (phosphorus concentration is 10%) is selected as a material of the insulating layer 3B, and HF is used as an etchant. (48
%): When a solution having a ratio of NH ₄ F (40%) = 1:10 diluted with pure water to 1% is etched, the insulating layer 3B is selectively etched and the insulating layer 3B is removed from the side wall of the step.
Only B recedes, and a recess structure is formed.

FIG. 4C shows a state in which the semiconductor device has been manufactured in the above manufacturing steps.

As another example of this manufacturing process, Ta or the like is used for the high-potential electrode layer 4, SiO2 is used for the insulating layers 3A and 3C,
An etchant, a high-potential electrode layer 4, and an insulating layer 3 are selected by selecting Si ₃ N ₄ for the insulating layer 3B and etching with hot phosphoric acid.
Materials of A, 3B and 3C can be appropriately selected.

Because of this recess structure, an electron emission portion will be formed later in this portion. Also, the insulating layer 3
By retreating B, the creepage distance becomes longer, so that there is also an effect of reducing the leak current flowing between the two electrodes during driving and increasing the electron emission efficiency.

As the depth of the recess formed by the recess of the insulating layer 3B, the effect of reducing the leak current can be expected as the depth increases, but the depth of the insulating layer 3B is reduced to such an extent that the upper layer of the insulating layer 3B does not collapse. It is set appropriately according to the thickness and the like.

In FIG. 4, the insulating layer has a three-layer structure.
The recessed structure is created by depressing the intermediate layer,
As shown in FIG. 10, which will be described later, a recess structure can be formed immediately below the upper electrode layer by forming the insulating layer into a two-layer structure.

The recess can be formed at the same time as the etching step for forming the step.

Next, a conductive thin film 5 is coated on the step side wall having the recess 6 from the low potential electrode layer 2 to the high potential electrode layer 4. Here, the presence of the recessed portion 6 in the side wall forms a gap 7 in the conductive thin film 5 to be an electron emitting portion.

The material used for the conductive thin film 5 is as follows.
Pt, Ru, Ag, Au, Ti, In, Cu, Cr, F
e, Zn, Sn, Ta, W, Pd and other metals, and carbon, LaB ₆ , HfC and other materials having a low work function;
The film thickness depends on the specific resistance of the material in order to secure conductivity, but is preferably at least 10 nm or more.

When the gap 7 is formed by energization forming after the conductive thin film 5 is coated on the step side wall, PdO and SnO ₂ , which have relatively high resistance, are used as the material of the conductive thin film 5. , in ₂ O _3, PbO, oxides such as _{Sb 2 O 3, HfB 2,} ZrB 2, LaB 6, CeB 6, YB
_4, GdB boride such as _{4, TiC, ZrC, HfC,} Ta
Carbides such as C, SiC, WC, etc., TiN, ZrN, FfN
Nitride, etc., semiconductors such as Si, Ge, carbon, AgM
g, NiCu, Pb, Sn, etc. are used, and the resistance value shows a sheet resistance value of 10 ³ to 10 ⁷ Ω / □.

It is necessary to set the film thickness as thin as several nm so that a crack is easily formed by forming.

The method of forming the conductive thin film (or high resistance film) 5 is appropriately selected from photolithography, oblique deposition, sputtering and the like. For example, when the thickness of the insulating layer 3B is set to be thin (about several tens of nm), the oblique deposition method is advantageous, and the conductive thin film (or the high resistance) is obliquely directed upward from the step side wall. By depositing the film 5, the film can be uniformly applied to the step side wall and the gap 7 can be formed in the recessed portion.

FIG. 4D shows a state in which the semiconductor device is manufactured by the above-described manufacturing process.

The length L2 (see FIG. 1A) of the region where the conductive thin film (or high-resistance film) 5 is deposited is set to the same length as the high-potential electrode length L1 or to a shorter length. , Electron emission length, element configuration, and element arrangement.

Next, the low potential electrode layer 2 and the high potential electrode layer 4
, A current is applied to the conductive thin film (or high-resistance film) 5, and it is confirmed that the gap 7 is formed in the recess 6.

If the gap 7 has not been formed in the conductive thin film (or high-resistance film) 5, the gap 7 is formed in the recess 6 at this stage (see FIG. 4E).

Furthermore, in the electron-emitting device according to the embodiment of the present invention, when forming the electron-emitting portion, a voltage is applied to the low-potential electrode layer 2 and the high-potential electrode layer 4 in the presence of an organic material. As a result, a process called activation for generating carbon in the electron emission region and forming an electron emission point may be performed.

The carbon generated in this step is, for example, graphite or amorphous carbon.

Here, graphite is a so-called HO
PG, PG, and GC are included, and HOPG has a crystal structure of almost perfect graphite, and PG has a crystal grain of 2.
GC refers to a crystal with a disordered crystal structure of about 0 × 10 ⁻⁸ m, and GC refers to a crystal with a crystal grain of about 2.0 × 10 ⁻⁹ m and further disordered crystal structure.

The term “amorphous carbon” refers to amorphous carbon and a mixture of amorphous carbon and the fine crystals of graphite.

FIG. 5 shows a vacuum processing apparatus used in this process.
This will be described with reference to FIG.

In FIG. 5, reference numeral 55 denotes a vacuum vessel;
Reference numeral 6 denotes an exhaust pump, and 57 denotes an organic gas supply source of an organic gas used for generating carbon on the side wall of the step of the electron-emitting device.

An element according to the embodiment of the present invention is arranged in a vacuum vessel 55. That is, 1 is a substrate, 2 is a low potential electrode layer (lower electrode), 3 is an insulating layer, 4 is a high potential electrode layer (upper electrode), 5 is a conductive thin film (or high resistance film),
7, a gap serving as an electron emitting portion; 51, a power supply for applying a device voltage Vf to the electron emitting device; 50, a low potential electrode layer 2;
An ammeter for measuring a device current If flowing between the device and the high-potential electrode layer 4, and an anode electrode 54 for supplementing a current emitted from the device.

Reference numeral 53 denotes a high voltage source for applying a voltage to the anode electrode 54, and reference numeral 52 denotes an ammeter for measuring the emission current emitted from the electron-emitting device.

As an example, the voltage of the anode electrode is set to 0 to 1
The measurement can be performed with the range of 0 kV and the distance H between the anode electrode and the electron-emitting device in the range of 100 μm to 8 mm.

In the vacuum container 55, there are provided devices necessary for measurement in a vacuum atmosphere such as a vacuum gauge (not shown).
The measurement and evaluation can be performed in a desired vacuum atmosphere.

The exhaust pump 56 is a turbo pump,
It is composed of a normal high vacuum system including a rotary pump and an ultra high vacuum system including an ion pump.

With the above configuration, the substrate 1 is
After evacuating and evacuating to a vacuum atmosphere,
An organic gas is introduced into the vacuum vessel 55 from the organic gas supply source 57, and a voltage is applied to the low potential electrode layer 2 and the high potential electrode layer 4 in an atmosphere containing an organic substance gas.

The voltage deformation is repeatedly applied in a pulse waveform. This includes a method of continuously applying a pulse having a pulse peak value of a constant voltage, and a method of applying a voltage pulse while increasing the pulse peak value.

Here, the preferable gas partial pressure of the organic substance for producing carbon varies depending on the form of the carbon, the shape of the vacuum vessel, the type of the organic substance, and the like, but is appropriately set according to the case.

Suitable organic substances include aliphatic hydrocarbons of alkanes and alkenes, aromatic hydrocarbons, alcohols, aldehydes, ketones, amines, and organic acids such as phenol, carboxylic acid and sulfonic acid. Specifically, other than saturated hydrocarbons represented by C _n H _{2n + 2} such as methane, ethane and propane, unsaturated hydrocarbons represented by a composition formula such as C _n H _2n such as ethylene and propylene, etc. , Benzene, toluene, methanol, ethanol, formaldehyde,
Acetaldehyde, acetone, methyl ethyl ketone, methylamine, ethylamine, phenol, formic acid, acetic acid,
Propionic acid or the like can be used.

By this carbon generation step, the low potential electrode layer 2
Between the electrode and the high potential electrode layer 4 or immediately before being formed in the recess, carbon is deposited from an organic substance existing in the atmosphere to form a shape capable of emitting electrons at a low voltage.

Further, after this activation step, a process called a stabilization step may be performed.

In this step, the organic substance in the vacuum vessel is evacuated, and the pressure in the vacuum vessel is 1.3 × 10 ⁻⁵ P
a or less, more preferably 1.3 × 10 ⁻⁶ Pa or less.

Here, when evacuating the inside of the vacuum container, a vacuum exhaust system such as a sorption pump or an ion pump, which does not use oil, is used so that oil or the like generated from the apparatus is mixed and does not affect the element characteristics. Is preferred.

Further, when the vacuum vessel is evacuated, it is preferable to heat the entire vacuum vessel so that the organic substance molecules adsorbed on the inner wall of the vacuum vessel and the electron-emitting device can be easily evacuated. The heating temperature at this time is preferably from 80 ° C. to 200 ° C. for 5 hours or more, but is not particularly limited to this condition.
It is appropriately selected depending on the size and shape of the vacuum vessel, the configuration of the electron-emitting device, and the like.

An application example to which the electron-emitting device according to the embodiment of the present invention can be applied will be described below. That is,
By arranging a plurality of electron-emitting devices according to the embodiment of the present invention on a base, for example, an electron source or an image forming apparatus can be configured.

Various arrangements of the electron-emitting devices can be adopted.

As an example, each of a large number of electron-emitting devices arranged in parallel is connected at both ends, a large number of rows of electron-emitting devices are arranged (referred to as a row direction), and a direction perpendicular to the wiring (column direction). In some cases, a control electrode (also referred to as a grid) disposed above the electron-emitting device controls the electrons from the electron-emitting device in a ladder-like arrangement.

Separately, a plurality of electron-emitting devices are arranged in a matrix in the X and Y directions, and one of the electrodes of the plurality of electron-emitting devices arranged in the same row is connected to the wiring in the X direction. One commonly connected and the other of the electrodes of a plurality of electron-emitting devices arranged in the same column is commonly connected to a wiring in the Y direction.

What is matrix-wired in this manner is a so-called simple matrix arrangement. First, the simple matrix arrangement will be described in detail below.

In the surface-conduction electron-emitting device according to the embodiment of the present invention, when the electrons emitted from the surface-conduction electron-emitting device exceed a threshold voltage, a pulse-like voltage applied between opposing device electrodes is applied. Can be controlled by the peak value and width.

On the other hand, when the voltage is lower than the threshold voltage, almost no light is emitted. According to this characteristic, even when a large number of electron-emitting devices are arranged, if a pulse-like voltage is appropriately applied to each of the devices, a surface-conduction electron-emitting device is selected according to an input signal to emit electrons. You can control the amount.

Hereinafter, based on this principle, an electron source obtained by disposing a plurality of electron-emitting devices according to the embodiment of the present invention and an image forming apparatus provided with the electron source will be described with reference to FIG.

In FIG. 6, reference numeral 61 denotes an electron source substrate, 62 denotes an X-direction wiring, 63 denotes a Y-direction wiring, 64 denotes a surface conduction electron-emitting device according to the embodiment of the present invention, and 65 denotes
Is a connection.

The m X-directional wirings 62 are DX ₁ , DX ₂ ,
... consists DX _m, a vacuum evaporation method, printing method, it can be composed of a formed conductive metal or the like by sputtering or the like. The material, thickness, and width of the wiring are appropriately designed.

The Y-direction wiring 63 includes DY ₁ , DY ₂ ,.
_{It is composed} of n wirings and is formed in the same manner as the X-directional wiring 62. An interlayer insulating layer (not shown) is provided between the m X-directional wirings 62 and the n Y-directional wirings 63 to electrically separate them (m and n are both Positive integer).

The interlayer insulating layer (not shown) is made of SiO ₂ or the like formed by using a vacuum deposition method, a printing method, a sputtering method, or the like. For example, the electron source substrate 61 on which the X-directional wiring 62 is formed is formed in a desired shape on the entire surface or a part thereof.
The film thickness, material, and manufacturing method are appropriately set so as to withstand the potential difference at the intersection of the directional wiring 62 and the Y-directional wiring 63. X
The directional wiring 62 and the Y-directional wiring 63 are respectively drawn as external terminals.

A pair of electrodes (not shown) constituting the surface conduction electron-emitting device 64 are electrically connected by m X-directional wirings 62, n Y-directional wirings 63, and a connection 65 made of a conductive metal or the like. It is connected.

The material forming the wirings 62 and 63, the material forming the connection 65, and the material forming the pair of element electrodes may be the same or different in some or all of the constituent elements. Good. These materials are appropriately selected, for example, from the above-described materials for the device electrodes.

When the material forming the element electrode is the same as the wiring material, the wiring connected to the element electrode can be called an element electrode.

The X-direction wiring 62 is connected to a scanning signal applying means (not shown) for applying a scanning signal for selecting a row of the surface conduction electron-emitting devices 64 arranged in the X-direction. On the other hand, a modulation signal generating means (not shown) for modulating each column of the surface conduction electron-emitting devices 64 arranged in the Y direction according to an input signal is connected to the Y-direction wiring 63.

The driving voltage applied to each electron-emitting device is
It is supplied as a difference voltage between the scanning signal and the modulation signal applied to the element.

In the above configuration, individual elements can be selected and driven independently using simple matrix wiring.

An image forming apparatus configured using such an electron source having a simple matrix arrangement will be described with reference to FIG. FIG. 7 is a schematic diagram illustrating an example of a display panel of the image forming apparatus.

In FIG. 7, reference numeral 61 denotes an electron source substrate on which a plurality of electron-emitting devices are arranged; 71, a rear plate on which the electron source substrate 61 is fixed; and 76, a fluorescent material serving as an image forming member on the inner surface of a glass substrate 73. Film 74 and metal back 75
And the like are formed on the face plate.

Reference numeral 72 denotes a support frame.
2, a rear plate 71 and a face plate 76 are connected using frit glass or the like. Reference numeral 77 denotes an envelope, for example, in the atmosphere or in nitrogen,
By baking for 10 minutes or more in a temperature range of 00 degrees, the structure is sealed.

Reference numeral 64 corresponds to the electron-emitting device in FIG. 1. Reference numerals 62 and 63 denote an X-direction wiring and a Y-direction wiring connected to a pair of device electrodes of the surface conduction electron-emitting device. .

The envelope 77 includes the face plate 76, the support frame 72, and the rear plate 71 as described above. Here, since the rear plate 71 is provided mainly for the purpose of reinforcing the strength of the base 61, if the base 61 itself has sufficient strength, the separate rear plate 71 can be unnecessary.

That is, the support frame 72 may be directly sealed to the base 61, and the envelope 77 may be constituted by the face plate 76, the support frame 72, and the base 61. On the other hand, by providing a support (not shown) called a spacer between the face plate 76 and the rear plate 71, the envelope 77 having sufficient strength against atmospheric pressure can be formed.

In the image forming apparatus using the electron-emitting device according to the embodiment of the present invention, the phosphor is aligned above the device in consideration of the emitted electron trajectory.

FIG. 8 is a schematic diagram showing the fluorescent film used for the panel of the present invention. In the case of a color fluorescent film, it is preferable to use a black conductive material 81 called a black stripe shown in FIG. 8A or a black matrix shown in FIG.

Next, an example of the configuration of a driving circuit for performing television display based on NTSC television signals on a display panel configured using electron sources in a simple matrix arrangement will be described with reference to FIG. .

In FIG. 9, reference numeral 91 denotes an image display panel;
2 is a scanning circuit, 93 is a control circuit, and 94 is a shift register. 95 is a line memory, 96 is a synchronizing signal separation circuit, 97 is a modulation signal generator, and Vx and Va are DC voltage sources.

The display panel 91 has terminals Dox1 to Dox
xm, terminals Doy1 to Doyn, and a high voltage terminal Hv are connected to an external electric circuit.

Terminals Dox _{1 to} Dox _m are provided with an electron source provided in the display panel, that is, a group of surface conduction electron-emitting devices arranged in a matrix of M rows and N columns in one row (N elements). A scanning signal for sequentially driving each is applied.

[0170] On the other hand, the terminal Doy ₁ through Doy _n, the modulation signal for controlling the output electron beam of each of the surface conduction electron-emitting devices of a row selected by the scanning signal is applied.

The high voltage terminal Hv is connected to a DC voltage source Va.
For example, a DC voltage of 10 [kV] is supplied, which is an accelerating voltage for applying sufficient energy to the electron beam emitted from the surface conduction electron-emitting device to excite the phosphor.

Next, the scanning circuit 92 will be described. This circuit is a that comprises M switching devices inside (in the figure, is schematically shown in S ₁ to S _m) is.

Each switching element selects either the output voltage of the DC voltage source Vx or 0 [V] (ground level), and the terminals Dx ₁ through Dx of the display panel 91 are selected.
x _m and are electrically connected.

Each of the switching elements S _{1 to} S _m operates based on the control signal Tscan output from the control circuit 93, and can be configured by combining switching elements such as FETs.

In the case of the present embodiment, the DC voltage source Vx uses a drive voltage applied to an unscanned element based on the characteristics (electron emission threshold voltage) of the surface conduction electron-emitting element. It is set so as to output a constant voltage lower than the threshold voltage.

The control circuit 93 has a function of matching the operation of each unit so that appropriate display is performed based on an image signal input from the outside.

The control circuit 93 generates control signals Tscan, Tsft and Tmry for each unit based on the synchronization signal Tsync sent from the synchronization signal separation circuit 96.

The synchronizing signal separating circuit 96 is a circuit for separating a synchronizing signal component and a luminance signal component from an NTSC television signal input from the outside, and uses a general frequency separating (filter) circuit or the like. Can be configured.

The synchronization signal separated by the synchronization signal separation circuit 96 is composed of a vertical synchronization signal and a horizontal synchronization signal, but is shown here as a Tsync signal for convenience of explanation. The luminance signal component of the image separated from the television signal is represented as a DATA signal for convenience. This DATA signal is input to the shift register 94.

The shift register 94 is for serially / parallel-converting a DATA signal input serially in time series for each line of an image.
It operates on the basis of the control signal Tsft sent from the controller (ie, it can be said that the control signal Tsft is a shift clock of the shift register 94).

[0181] Data of the serial / parallel converted image one line (corresponding to the electron-emitting device N elements set of drive data) is output from the shift register 94 as N parallel signals Id ₁ to Id _n.

[0182] The line memory 95 is a storage device for storing data of one line of the image only for a necessary time, to store the contents of the appropriate Id ₁ to Id _n in accordance with the control signal Tmry sent from the control circuit 93 .

The stored contents are output as I ′d _{1 to} I ′d _n and input to the modulation signal generator 97.

The modulation signal generator 97 outputs the image data I'd ₁
To a signal source for appropriately driving modulating each of the surface conduction electron-emitting device according to each of the I'd _n, the output signal is displayed through the terminal Doy ₁ through Doy _n Panel 91
Is applied to the surface conduction type electron-emitting device in the inside.

As described above, the electron-emitting device according to the embodiment of the present invention has the following basic characteristics with respect to the emission current Ie.

That is, a clear threshold voltage V is required for electron emission.
and electron emission occurs only when a voltage equal to or higher than Vth is applied. For a voltage equal to or higher than the electron emission threshold, the emission current also changes according to the change in the voltage applied to the device.

From this, when a pulse-like voltage is applied to the present device, for example, when a voltage lower than the electron emission threshold is applied, no device emission occurs, but when a voltage higher than the electron emission threshold is applied, An electron beam is output.

At this time, the intensity of the output electron beam can be controlled by changing the pulse peak value Vm. Further, by changing the pulse width Pw, it is possible to control the total amount of charges of the output electron beam.

Therefore, a voltage modulation method, a pulse width modulation method, or the like can be adopted as a method for modulating the electron-emitting device according to the input signal. When implementing the voltage modulation method, a circuit of a voltage modulation method that generates a voltage pulse of a fixed length and modulates the peak value of the pulse appropriately according to input data is used as the modulation signal generator 97. be able to.

When implementing the pulse width modulation method,
As the modulation signal generator 97, a pulse width modulation type circuit that generates a voltage pulse having a constant peak value and appropriately modulates the width of the voltage pulse according to input data can be used.

The shift register 94 and the line memory 95
Can be adopted as a digital signal type or an analog signal type. This is because the serial / parallel conversion and storage of the image signal may be performed at a predetermined speed.

When the digital signal type is used, it is necessary to convert the output signal DATA of the synchronization signal separation circuit 96 into a digital signal. For this purpose, an A / D converter is provided at the output of the synchronization signal separation circuit 96. Just do it.

In connection with this, the circuit used for the modulation signal generator 97 differs slightly depending on whether the output signal of the line memory 95 is a digital signal or an analog signal.

That is, in the case of the voltage modulation method using a digital signal, for example, a D / A conversion circuit is used as the modulation signal generator 97, and an amplification circuit and the like are added as necessary.

On the other hand, in the case of the pulse width modulation system, the modulation signal generator 97 includes, for example, a high-speed oscillator, a counter for counting the number of waves output from the oscillator, an output value of the counter, and an output value of the memory. Are used in combination with a comparator for comparing the two.

If necessary, an amplifier for amplifying the voltage of the pulse width-modulated signal output from the comparator to the driving voltage of the surface conduction electron-emitting device can be added.

In the case of the voltage modulation method using an analog signal, an amplification circuit using, for example, an operational amplifier can be used as the modulation signal generator 97, and a level shift circuit and the like can be added as necessary.

In the case of the pulse width modulation method, for example, a voltage controlled oscillator (VCO) can be employed, and an amplifier for amplifying the voltage up to the drive voltage of the surface conduction electron-emitting device can be added if necessary. Can also.

In the image display device (FIG. 7) according to the embodiment of the present invention which can take such a configuration, the external terminals Dox _{1 to} Dox _m and the terminal Doy are provided to each electron-emitting device.
By applying a ₁ to a voltage via a Doy _n, electron emission occurs.

A metal back 75 via a high voltage terminal Hv,
Alternatively, a high voltage is applied to a transparent electrode (not shown) to accelerate the electron beam. The accelerated electrons collide with the fluorescent film 74 and emit light to form an image.

The configuration of the image forming apparatus described here is an example of an image forming apparatus to which the present invention can be applied, and various modifications can be made based on the technical idea of the present invention.

For example, for the input signal, the NTSC system has been described, but the input signal is not limited to this.
In addition to the PAL and SECAM methods, a TV signal (for example, a high-definition TV such as the MUSE method) including a larger number of scanning lines can be adopted.

The image forming apparatus according to the embodiment of the present invention can be used as an optical printer including a photosensitive drum or the like in addition to a display device for a television broadcast, a display device such as a video conference system or a computer. Can be used as an image forming apparatus.

[0204]

EXAMPLES Hereinafter, more specific examples based on the above-described electron-emitting device according to the embodiment of the present invention will be described in detail.

(Example 1) This example will be described with reference to FIGS. 1 and 4 referred to in the above embodiment.

Hereinafter, the manufacturing process of the electron-emitting device according to this embodiment will be described in detail.

(Step 1) After sufficiently cleaning the substrate 1 using quartz, the low-potential electrode layer 2 is made of Ta having a thickness of 300 nm by sputtering, the insulating layer 3A is made of SiO _{2 having} a thickness of 35 nm, and the insulating layer 3A is formed by CVD. 10n thickness as insulating layer 3B
m PSG (phosphorus concentration: 10%), SiO _{2 with} a thickness of 5 nm as an insulating layer 3C, and Ta with a thickness of 25 nm as a high-potential electrode layer 4 were deposited in this order by sputtering (FIG. 4).
(State shown in (a)).

Thereafter, in a photolithography process, spin coating of a positive type photoresist (AZ1500 / manufactured by Clariant) and exposure and development of a photomask pattern were performed to form a register pattern.

Thereafter, the insulating layers 3A, 3B and 3C and the high-potential electrode layer 4 are dry-etched using CF ₄ gas using the patterned photolitho-resist as a mask, stopped at the low-potential electrode layer 2, L1 is 50μ
m was formed (the state shown in FIG. 4B).

(Step 2) Next, H is applied to the formed step portion.
A solution obtained by diluting a solution having a ratio of F (48%): NH ₄ F (40%) = 1:10 with pure water to 1% was used as an etching solution.
Etching was performed for 5 minutes to selectively etch the insulating layer 3B, thereby retreating the insulating layer 3B by about 50 nm from the step side wall, thereby forming a recess structure 6 (a state shown in FIG. 4C).

(Step 3) Next, as the conductive thin film 5, 2
A carbon film having a thickness of 10 nm was deposited only on the periphery of the step, and a gap 7 was formed in the recess 6. This carbon film was selectively deposited from above by 45 degrees with respect to the step side wall by an ion beam sputtering method, using a photolithography technique to mask a portion other than the periphery of the step with a photoresist (FIG. 4). (D).

(Step 4) Next, a 15 V pulse voltage (ON time: 1 ms) is applied to the low potential electrode layer 2 and the high potential electrode layer 4.
ec / OFF time: 9 msec) was applied to energize the carbon film, and it was confirmed that the resistance between the upper and lower electrodes was 10 MΩ or more.

In this case, the gap 7 was formed at the stage of the process 3. If the resistance between the upper and lower electrodes is 10 MΩ or less, the current supply is continued until the resistance becomes 10 MΩ or more. It may be formed (the state shown in FIG. 4E).

The element manufactured as described above, in which the gap position to be the electron emission portion is closer to the upper electrode, is placed in a vacuum vessel as shown in FIG. 5 so that the upper electrode becomes the high potential electrode layer 4. Driven.

When the driving voltage is Vf = 15 V, Va = 10 k
V, and the distance H between the electron-emitting device and the anode electrode is H =
It was 2 mm. As a result, electron emission was obtained with an efficiency of 2.3%.

(Embodiment 2) In this embodiment, an example in which the thickness of the insulating layer is large will be described.

(Step 1) As in step 1 of the first embodiment, the high potential electrode layer 4 is made of Ta (25 nm), the insulating layer 3A is made of SiO ₂ (5 nm), and the insulating layer 3B is made of PSG.
(10 nm), the insulating layer 3C is made of SiO ₂ (1 μm).
Thus, the low potential electrode layer 2 was formed of Ta (300 nm), and a step structure was formed using the substrate 1 as a quartz substrate. Note that the insulating layer 3C was formed by a CVD method.

(Step 2) HF (48
%): NH ₄ F (40%) = 1:10 solution was diluted with pure water to 1% and etched at room temperature using an etchant to form a recessed structure on the step side wall.

(Step 3) Next, Steps 3 to
4, a carbon film was deposited on the stepped portion, and a gap 7 was formed in the recessed portion 6.

As described above, by increasing the thickness of the insulating layer, the element capacity was reduced, and high-speed response became possible. Also,
Defects in the process compared to the case where the insulating layer is thin (leakage between electrodes due to pinhole generation etc. when forming the insulating layer)
And the yield could be improved.

Even in the case where the insulating layer was thickened, the position of the electron-emitting portion could be controlled, and good electron emission was obtained from the manufactured electron-emitting device.

(Embodiment 3) In this embodiment, an example in which a stabilizing step by activation is performed on a gap portion which is an electron emitting portion will be described.

(Step 1) As in step 1 of the first embodiment, the high potential electrode layer 4 is made of Ta (25 nm), the insulating layer 3A is made of SiO ₂ (5 nm), and the insulating layer 3B is made of PSG.
(10 nm), the insulating layer 3C is made of SiO ₂ (35n).
m), the low potential electrode layer 2 was formed of Ta (300 nm), and a step structure was formed using the substrate 1 as a quartz substrate. Note that PSG has a P concentration of 10% and was formed by a CVD method.

(Step 2) HF (4
8%): NH ₄ F (40%) = 1:10, a solution diluted to 1% with pure water was used as an etchant, and etching was performed at room temperature to form a recess structure 6 on the step side wall.

(Step 3) Next, steps 3 to 3 of the above-mentioned Example 1 were performed.
4, a Pd film was deposited on the step and a gap 7 was formed in the recess 6. Also in this example, the resistance between the upper and lower electrodes was 10 MΩ or less, and the gap 7 was formed when the fine particle film was deposited.

(Step 4) Next, in the atmosphere of BN (benzonitrile), 2.7 × 10 ⁻⁴ Pa, the low-potential electrode layer 2 and the high-potential electrode layer 4 were applied in the same manner as in step 4 of the first embodiment. A pulse voltage was applied to generate carbon between the gaps.

The activation step was completed when the current flowing between the gaps was saturated.

Good electron emission was obtained from the electron-emitting device manufactured as described above.

Example 4 FIG. 10 is a sectional view of an electron-emitting device manufactured in this example. The plan view is the same as that of the first embodiment. The difference from the first embodiment is that the insulating layer has a two-layer structure and a gap is formed immediately below the high potential electrode layer. In this case, the insulating layer 3A corresponds to the second layer, the insulating layer 3B corresponds to the third layer, and the high potential electrode layer 4 corresponds to the first layer.

(Step 1) As in step 1 of the first embodiment, the high-potential electrode layer 4 is made of Ta (25 nm), the insulating layer 3B is made of Si ₃ N ₄ (10 nm), and the insulating layer 3A is made of Si.
O ₂ (40 nm) is used to convert the low potential electrode layer 2 to Ta (30 nm).
0 nm), and a step structure was formed using the substrate 1 as a quartz substrate (Si ₃ N ₄ was formed by a sputtering method).

(Step 2) Next, 1
Etching with H ₃ PO ₄ heated to 20 ° C.
The 3B comprised of ₃ N ₄ is selectively etched to form a recess structure 6 on the step side wall.

(Step 3) Next, Steps 3 to
As in the case of No. 4, a carbon film 5 was deposited on the step, and a gap 7 was formed in the recess 6 immediately below the high potential electrode layer 4.

When the electron-emitting device manufactured as described above was driven under the same conditions as in Example 1, electron emission was obtained at an efficiency of 2.7%.

(Embodiment 5) FIG. 11A is a schematic plan view of this embodiment, and FIG. 11B is a schematic sectional view (AA section in FIG. 11A).

(Step 1) As in step 1 of the fourth embodiment, the high potential electrode layer 4 is made of Ta (25 nm), the insulating layer 3C is made of SiO ₂ (5 nm), and the insulating layer 3B is made of Si ₃ N.
₄ (10 nm), the insulating layer 3A is made of SiO ₂ (35n).
m), the low potential electrode layer 2 was formed of Ta (300 nm), and a step structure was formed using the substrate 1 as a quartz substrate.

Thereafter, a hole type structure of 2 μmφ was formed by photolithography and dry etching (a hole as a through hole penetrating each layer was formed).

(Step 2) Next, similarly to step 2 of the fourth embodiment, a recess structure 6 was formed on the side wall of the hole type structure (the inner peripheral surface of the hole as a through hole).

(Step 3) Next, steps 3 to 3 of the above-mentioned Example 1 were performed.
As in the case of No. 4, a carbon film 5 was deposited on the side wall of the hole type structure, and a gap 7 was formed in the recess 6.

When the electron-emitting device manufactured as described above was driven under the same conditions as in Example 1, electron emission was obtained with an efficiency of 2.3%. From the side (from the first layer side to the second layer side), since the low potential electrode is surrounded by the high potential electrode (high potential electrode layer), the electrons emitted from the hole diverge, Compared to Example 1, the electron beam was spread by about 40%.

In the illustrated example, the configuration in which the electron emission portion is provided on the entire inner periphery of the hole is shown. However, the present invention is not limited to this, and each electrode is provided only in a part of the inner periphery of the hole in the circumferential direction. Thus, the electron emission portion may be formed only in a part in the circumferential direction.

Embodiment 6 FIG. 12A is a schematic plan view of this embodiment, and FIG. 12B is a schematic cross-sectional view (AA cross section in FIG. 12A).

In this embodiment, as shown in the drawing, a structure in which a high potential electrode of an element is sandwiched between low potential electrodes (each layer is formed in a rectangular shape, and a first side wall surface, A structure in which a second side wall surface, a third side wall surface, a high potential electrode, a low potential electrode, and an electron emission portion are provided, and further, the respective layers are stacked such that the low potential electrode layer is spread on both ends thereof. (Hereinafter referred to as a ridge type), and assuming that the electron emission portion when viewing the device from the anode side is the origin,
There is an effect that the electron beam converges near the origin.

(Step 1) As in step 1 of the fourth embodiment, the high potential electrode layer 4 is made of Ta (25 nm), the insulating layer 3C is made of SiO ₂ (5 nm), and the insulating layer 3B is made of Si ₃ N.
₄ (10 nm), the insulating layer 3A is made of SiO ₂ (35n).
m), the low potential electrode layer 2 was formed of Ta (300 nm), and a step structure was formed using the substrate 1 as a quartz substrate.

Thereafter, an 8 μm-wide ridge structure was formed by photolithography and dry etching.

(Step 2) Next, similarly to step 2 of the fourth embodiment, the recess structure 6 was formed on both side walls of the ridge structure.

(Step 3) Next, steps 3 to 3 of the above-mentioned Example 1 were performed.
4, carbon films 5 are deposited on both side walls of the ridge,
A gap 7 was formed in the recess 6.

When the electron-emitting device manufactured as described above is driven under the same conditions as in the first embodiment, the high-potential electrode is surrounded by the low-potential electrode when viewed from the anode side in the device configuration of the present embodiment. Therefore, the electrons emitted from both side walls of the ridge are sandwiched between negative potentials, and the electron beam was observed near the origin as compared with Example 1. However, the efficiency dropped slightly to 1.9%.

(Embodiment 7) In this embodiment, Embodiment 6
In the ridge type described above, a case where an electron emission portion is formed only on one side of both steps will be described.

(Step 1) As in step 1 of the fourth embodiment, the high potential electrode layer 4 is made of Ta (25 nm), the insulating layer 3C is made of SiO ₂ (5 nm), and the insulating layer 3B is made of Si ₃ N.
₄ (10 nm), the insulating layer 3A is made of SiO ₂ (35n).
m), the low potential electrode layer 2 was formed of Ta (300 nm), and a step structure was formed using the substrate 1 as a quartz substrate.

Thereafter, a ridge structure having a width of 8 μm was formed by photolithography and dry etching.

(Step 2) Next, similarly to step 2 of the fourth embodiment, recess structures 6 were formed on both side walls of the ridge structure.

(Step 3) Next, Steps 3 to
As in the case of No. 4, a carbon film 5 was deposited only on one side of the ridge structure, and a gap 7 was formed only in the recess 6 on one side.

When the electron-emitting device manufactured as described above is driven under the same conditions as in the first embodiment, the emitted electrons are sandwiched between the negative potentials, and the emitting portion is moved, as in the fifth embodiment. Since only one side of the ridge side wall, an electron beam with a smaller diameter was observed near the origin.

(Embodiment 8) In this embodiment, as an example of an image forming apparatus provided with the electron-emitting device of the present invention, a case will be described in which an image forming apparatus is manufactured using the element of the above-described Embodiment 1.

FIG. 13A is a schematic plan view of the element of this embodiment when viewed from above, and FIG.
It is a typical sectional view in the AA line in (a).

In the electron-emitting device in this case, as shown in the figure, the insulating layer other than the high potential electrode related to the electron emission is designed as thick as 1 μm like the insulating layer 131 to reduce the parasitic capacitance. Thus, a signal delay occurring during matrix driving is prevented.

The devices thus configured were arranged in a 10 × 10 MTX shape, and the x-direction wiring was connected to the low potential electrode and the y-direction wiring was connected to the high potential electrode.

The device has a width of 150 μm and a length of 300 μm.
The phosphors were arranged at a pitch of m, and the phosphors were arranged at a distance of 2 mm above the element. And the phosphor has 10k
A voltage of V was applied.

As a result, it was possible to form a high-definition image forming apparatus capable of driving the matrix by the effect of reducing the capacitance component.

[0260]

As described above, according to the electron-emitting device of the present invention and the method of manufacturing the same, the position of the electron-emitting portion can be easily controlled with a simple structure, and the number of elastic scatterings can be reduced to reduce the electron-emitting efficiency. Can be improved.

If the electron-emitting device having the improved electron emission efficiency is applied to an electron source or an image forming apparatus, an electron source and an image forming apparatus having excellent performance can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic view of an electron-emitting device according to an embodiment of the present invention.

FIG. 2 is a schematic sectional view when the electron-emitting device according to the embodiment of the present invention is driven.

FIG. 3 is an enlarged view of an electron-emitting portion of the electron-emitting device according to the embodiment of the present invention.

FIG. 4 is a schematic view sequentially showing manufacturing steps of the electron-emitting device according to the embodiment of the present invention.

FIG. 5 is a schematic view of a vacuum processing apparatus for performing an activation process, which is one of the manufacturing processes of the electron-emitting device.

FIG. 6 is a schematic configuration diagram of an electron source (simple matrix arrangement) according to an embodiment of the present invention.

FIG. 7 is a schematic configuration diagram of a display panel used in an image forming apparatus according to an embodiment of the present invention using an electron source having a simple matrix arrangement.

FIG. 8 is a schematic diagram of a fluorescent film in the display panel of FIG.

FIG. 9 is a circuit diagram showing an example of a drive circuit for driving the display panel of FIG.

FIG. 10 is a schematic sectional view of an electron-emitting device according to Example 4 of the present invention.

FIG. 11 is a schematic view of an electron-emitting device according to Example 5 of the present invention.

FIG. 12 is a schematic view of an electron-emitting device according to Example 6 of the present invention.

FIG. 13 is a schematic view of an electron-emitting device used when manufacturing an image forming apparatus according to Embodiment 8 of the present invention.

FIG. 14 is a schematic sectional view of an electron-emitting device according to a conventional technique.

FIG. 15 is a schematic sectional view of a vertical surface conduction element according to the related art.

FIG. 16 is a schematic view showing electron trajectories of a planar surface conduction element.

FIG. 17 is a schematic diagram showing electron trajectories of a vertical surface conduction element.

FIG. 18 is a relationship diagram showing a relationship between electron emission efficiency and a predetermined distance for a high potential electrode.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Substrate 2 Low potential electrode layer 3A, 3B, 3C Insulating layer 4 High potential electrode layer 5 Conductive thin film (or high resistance film) 5A High potential electrode 5B Low potential electrode 6 Recess part 7 Gap 8 Anode (anode) 31, 32 Electron 50 Ammeter 51 Power supply 52 Ammeter 53 High voltage power supply 54 Anode electrode 55 Vacuum container 56 Exhaust pump 57 Organic gas supply source 61 Electron source base 62 X direction wiring 63 Y direction wiring 64 Electron emitting element 65 Connection 71 Rear plate 72 Support frame 73 Glass substrate 74 Fluorescent film 75 Metal back 76 Face plate 77 Enclosure 81 Black conductive material 82 Phosphor 91 Image display panel 92 Scan circuit 93 Control circuit 94 Shift register 95 Line memory 96 Synchronous signal separation circuit 97 Modulation signal generator 131 Insulating layer 161 Element high potential electrode 162 Element low potential Electrode 163 Anode (anode) 164 Equipotential surface equal to drive voltage Vf 165 Equipotential surface higher than drive voltage Vf 171 High potential electrode 172 Low potential electrode 173 Anode (anode) 174 Equipotential surface equal to drive voltage Vf 175 Drive voltage Equipotential surface higher than Vf D Gap distance L1 Element electrode length L2 Length of region where conductive thin film (or high resistance film) is deposited T1 From end position of high potential electrode in gap to upper part of high potential electrode layer Distance T2 Distance from end position of low potential electrode in gap to surface of low potential electrode layer Xs Characteristic distance

Claims (17)

[Claims] A first layer having a first side wall surface; a second layer having a second side wall surface substantially coincident with an extension surface of the first side wall surface; A third side wall surface on which the first side wall surface and the second side wall surface are provided, and a third side wall surface provided on the first side wall surface and the second side wall surface, and a third side wall surface provided between the first layer and the second layer; A third layer provided, wherein a high-potential electrode is provided on the first side wall surface, and a low-potential electrode is provided on the second side wall surface. An electron-emitting device, wherein a gap between them is an electron-emitting portion. 2. The high potential electrode layer comprising: a low potential electrode layer laminated on a substrate; an insulating layer laminated on the low potential electrode layer; and a high potential electrode layer laminated on the insulating layer. The electron-emitting device according to claim 1, wherein a potential electrode is electrically connected to the high potential electrode layer, and the low potential electrode is electrically connected to the low potential electrode layer. 3. The apparatus according to claim 2, wherein said insulating layer comprises said first layer, second layer, and third layer.
3. The electron-emitting device according to item 1. 4. The electron according to claim 2, wherein the high-potential electrode layer is the first layer, and the insulating layer is composed of the second layer and a third layer. Emission element. 5. The device according to claim 1, wherein the low potential electrode is surrounded by the high potential electrode when the second layer side is viewed from the first layer side. Electron-emitting device. 6. A through hole penetrating through the first layer, the second layer, and the third layer, and a part of an inner peripheral surface of the through hole is used as the first side wall surface. A high-potential electrode and a low-potential electrode are provided on these side walls, respectively, with the other part of the inner peripheral surface of the through hole as the second side wall, and the low-potential electrode is connected to the high-potential electrode. 6. The electron-emitting device according to claim 5, wherein the electron-emitting device is surrounded. 7. The high-potential electrode and the low-potential electrode are provided only on a part of the inner periphery of the through hole in the circumferential direction, so that the electron emission portion is formed only on a part of the circumferential direction. The electron-emitting device according to claim 6, wherein: 8. The high-potential electrode layer is formed in a square shape, and an electron-emitting portion is provided on each of a pair of both ends of the high-potential electrode layer. 3. The electron-emitting device according to claim 2, wherein each of the layers is disposed. 9. The high-potential electrode layer is formed in a rectangular shape, an electron emission portion is provided only at one end of a pair of both ends of the high-potential electrode layer, and a low-potential electrode is provided at each of the both ends. 3. The electron-emitting device according to claim 2, wherein the layers are arranged so that the layers are widened. 10. The electron-emitting device according to claim 1, wherein the electron-emitting device is a device that emits surface conduction type electrons. 11. An electron source comprising a plurality of the electron-emitting devices according to claim 1. 12. The electron source according to claim 11, wherein said electron-emitting devices are arranged in a matrix. 13. An image forming apparatus comprising: the electron source according to claim 11; and an image forming member that forms an image with electrons emitted from the electron source. 14. An image forming apparatus according to claim 13, wherein said image forming member is a phosphor which emits light by collision of electrons. 15. A method of manufacturing an electron-emitting device having a three-layer structure in which a first layer, a second layer, and a third layer are laminated, and having an electron-emitting portion provided on a side wall surface of these layers. In the laminating step, the third layer is made of a material different from the first layer and the second layer, and is laminated in the order of the second layer, the third layer, and the first layer. Forming a recess structure by selectively etching only the second layer by a predetermined amount, and then forming an electron emission portion at the recess position.
Covering the side wall surfaces of the first layer and the second layer with a conductive thin film, respectively. 16. The method according to claim 15, wherein the first layer, the second layer, and the third layer are insulating layers. 17. The semiconductor device according to claim 17, wherein the first layer is a high-potential electrode layer electrically connected to the conductive thin film, and the second and third layers are insulating layers. The method for manufacturing an electron-emitting device according to claim 16.