JP2001157138A - Video compositing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a video composting device, which does not perform reduction and expansion processing that changes the resolution of a sub screen video signal by uselessly performing reduction and expansion processing, when there is no disturbance in the display of the sub screen video signal by performing the processing, only when the reduction and expansion of a sub screen signal are decided as necessary even in the compositing of a main screen signal and the sub screen signal where the number of scanning lines are different. SOLUTION: When it is judged that all of the display area of the sub screen video signal cannot be displayed from the ratio of the number of horizontal synchronizing signals in the main screen video signal to the number of horizontal synchronizing signals in the sub screen video signal, the sub screen video signal is converted into the same number of lines as the number of main screen video signal lines by performing vertical compression.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver for displaying a plurality of combined images on a single display.

[0002]

2. Description of the Related Art Conventionally, when a plurality of video signals are synthesized and displayed in a television receiver of this type, it depends on the number of scanning lines in one vertical period of a main screen signal having a synchronization signal for controlling the display. Thus, the number of lines on which the sub-screen signal is displayed during one vertical synchronization period is determined.

[0003] As a conventional video synthesizing apparatus, the present applicant has disclosed FIG.
5 and FIG. 6 are considered as the video signals to be displayed.

In FIG. 4, reference numeral 1 denotes a main screen video signal processing device, and reference numeral 2 denotes a sub screen video signal processing device. The main screen signal is input to the main screen video signal processing device 1. A broadcast signal (terrestrial broadcast, satellite broadcast, or the like), which is an input main screen signal, is selected by the tuner 3. A video signal from various storage media input from a video input terminal 4 and a signal from the tuner 3 are selected by a switching circuit 5 and output as a main screen signal. The selected main screen signal is separated into a luminance signal and a chroma signal by a Y / C separation circuit 6, the chroma signal is demodulated into a color difference signal, and a digital signal is converted by an A / D conversion circuit 7 which converts an analog signal into a digital signal. And input to the video compositing circuit 15.

Further, a synchronization signal is separated from the main screen signal by a synchronization separation circuit 8 and is input to a deflection processing circuit 18 which generates a control signal relating to deflection processing. The main screen synchronizing signal, which is the output of 8, is stored in the field memory 1 for image synthesis.
6 is generated. The output signal of the deflection processing circuit 18 serves as a reference signal for displaying a video signal on the display 19.

The sub-screen signal is supplied to the sub-screen video signal processing circuit 2
Is input to A broadcast signal (terrestrial broadcast, satellite broadcast, or the like), which is an input sub-screen signal, is selected by the tuner 9. In addition, video signals from a game machine or various storage media input from a video input terminal 10 and the tuner 9
Is selected by the switching circuit 11 and output as a sub-screen signal. The selected sub-screen signal is separated into a luminance signal and a chroma signal by a Y / C separation circuit 14, the chroma signal is demodulated into a color difference signal, and an A / D conversion circuit 13 that converts an analog signal into a digital signal.
Is converted into a digital signal. Further, the synchronization signal is separated from the sub-screen signal by the synchronization separation circuit 12, and at the same time, a control signal relating to the input of the video compositing field memory 16 is generated.

[0007] The sub-screen signal is written into the field memory 16 for video synthesis by sub-screen synchronization control, read out by the main screen synchronization signal control, and synthesized by the video synthesis circuit 15 with the main screen signal. D / A conversion circuit 1 for converting the synthesized video signal from a digital signal to an analog signal
7 is converted to an analog signal. Deflection processing circuit 1
Numeral 8 generates a scanning deflection pulse for the display 19, and the video signal output from the D / A conversion circuit 17 is displayed on the display 19 by the scanning deflection pulse generated from the deflection processing circuit 17.

Since the control signal from the synchronization separation circuit 8 is used as a timing reference signal of the deflection processing circuit 18, the video signal handled by the video signal processing circuit 1 to which the synchronization separation circuit 8 belongs is defined as a main screen signal. It is calling.

The synthesized video signal obtained by synthesizing the video by the video synthesizing circuit shown in FIG. 4 will be described with reference to FIGS.

FIG. 5 shows that the number of scanning lines is 240.5 as a main screen signal.
Number of scanning lines per line / field, sub-screen signal is 262.5
This is an example when a signal of book / one field is input.

[0011] Further, not all the scanning lines include video signals, and there are lines that actually include video signals and lines that do not include video.

In FIG. 5 and FIG. 6, in order to make the description easy to understand, the number of lines actually containing video signals is set to 90% of the number of scanning lines in one field, and It is described as a number.

It is assumed that the video signal is actually included in the main screen signal by 216 lines and the sub-screen signal by 236 lines based on the above assumption. At this time, for 24.5 scanning lines that do not include video signals, that is, for 24.5 main screen signals, 12 are allocated above and 12.5 below the scanning lines that include video signals, and for 26.5 sub-screen signals, video is allocated. Thirteen lines are assigned above the scanning line containing the signal, and 13.5 lines are assigned below the scanning line.

When the above main screen signal and sub screen signal are input to the conventional video synthesizing apparatus shown in FIG. 4, the video synthesized signal obtained as an output signal is output according to the main screen synchronizing signal. It is output as a signal of 240.5 lines / 1 field.

At this time, the breakdown of the main screen signal for 240 scanning lines per field is the same as the main screen signal input.
The number of lines including the video signal in the scanning line of 240 lines / field is 216. In the composite video signal, the breakdown of the sub-screen signal in the scanning line of 240 lines / field is 13 from the top.
A line that does not include the image of the book, and a line that includes 227 images, was a video signal of the sub-screen signal at the time of input.
All six are lost without being displayed.

On the other hand, FIG. 6 shows an example in which a signal having a number of scanning lines of 262.5 lines / field is input as a main screen signal and a signal of 240.5 lines / field is input as a sub-screen signal.

It is assumed that the video signal is actually contained in the main screen signal by 236 lines and the sub-screen signal by 216 lines based on the above assumption.
Suppose it was a book. At this time, for 26.5 scanning lines that do not include video signals, that is, for 26.5 main screen signals, 13 lines are allocated above and 13.5 lines below the scanning lines that include video signals, and for 24.5 sub-screen signals, Are allocated above the scanning line containing the video signal, and 12.5 below the scanning line.

When the main screen signal and the sub-screen signal are input to the conventional video synthesizing apparatus shown in FIG. 4, the video synthesizing signal obtained as an output signal is output according to the main screen synchronizing signal. It is output as a signal of 262.5 lines / 1 field.

At this time, the breakdown of the main screen signal for the scanning lines of 262.5 lines / field is the same as that of the main screen signal input, and the number of lines including the video signal is 216. The breakdown of the 262.5 lines / field scanning line of the signal consists of 12 lines not including video and 216 lines including video from the top, and 34.5 scanning lines not including video signal below the video signal. Will be located. At this time, when all the 236 video signals of the main screen video signal are displayed, 21 scanning lines not including the video signal below the video signal of the sub screen signal are displayed on the sub screen side at the same time.

[0020]

In the above-mentioned prior art, when the number of scanning lines of the main screen video signal having a synchronization signal for controlling display is smaller than the number of scanning lines of the sub-screen video signal, the main screen video signal is generated. When the sub-screen video signal is damaged in the composite video signal display of the sub-screen video signal or when the number of scanning lines of the main screen video signal is larger than the number of scanning lines of the sub-screen video signal, the composite video signal is displayed. In such a case, there is a problem that a scanning line that does not include the image of the sub-screen image signal is displayed.

As described above, the number of scanning lines of the main screen video signal or the sub-screen video signal is standard (for example, NTSC signal is 262.5 lines / field, HD signal is 562.times.).
Signals that are more or less than (5/1 field) include output signals when special reproduction (fast forward, rewind, pause, etc.) is performed on an external storage device VTR or the like.

[0022]

According to the present invention, there is provided a video synthesizing apparatus for synthesizing a main screen signal and a sub-screen signal having different numbers of scanning lines. Using the result of calculating the ratio between the number of lines and the number of sub-screen signal scanning lines, (1-1) reducing the number of sub-screen signal if the number of scanning lines of the sub-screen signal is larger than the number of scanning lines of the main screen signal (1-2) When the number of scanning lines of the sub-screen signal is smaller than the number of scanning lines of the main screen signal, the sub-screen signal can be enlarged.

According to the present invention, a higher-order function or a complicated function can be easily realized as a correction function by digital signal processing, and a desired sub-screen video signal can be obtained. In other words, a video synthesizing apparatus capable of synthesizing video signals without displaying scanning lines other than video signals in the video signal display area of the sub-screen signal can be provided.

(2) In the present invention, it is possible to select whether to reduce or enlarge the sub-screen signal by comparing the ratio of the number of scanning lines between the main screen signal and the sub-screen signal to an arbitrary constant value. By having a possible selector, the reduction / enlargement processing of the sub-screen signal can be performed only when the displayed sub-screen video signal is damaged or a scan line other than the video signal may be displayed. It is possible.

According to the present invention, even when the main screen signal and the sub-screen signal having different numbers of scanning lines are combined, the processing is performed only when it is determined that the sub-screen signal needs to be reduced or enlarged. In addition, it is possible to provide a video synthesizing apparatus that performs reduction / enlargement processing uselessly when display of the sub-screen video signal is not hindered and does not perform reduction / enlargement processing that changes the resolution of the sub-screen video signal. .

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to the first aspect of the present invention is directed to a main screen signal and a sub-screen signal in which a main screen signal and a sub-screen signal are video signals having different numbers of scanning lines as input signals. A video synthesizing apparatus for synthesizing and displaying signals, wherein the number of scanning lines of the main screen signal and the sub-screen signal is obtained, and the number of scanning lines of the sub-screen signal is adjusted to the number of scanning lines of the main screen signal. The sub-screen signal is reduced or enlarged by the ratio of the number of scanning lines of the main screen signal to the number of scanning lines of the sub-screen signal so that the display area is not damaged.

In this case, a higher-order function or a complicated function can be easily realized as a correction function by digital signal processing, and a desired sub-screen video signal can be obtained. Or a composite video signal can be displayed without displaying a scanning line other than the video signal in the video signal display area of the sub-screen signal.

According to a second aspect of the present invention, there is provided a means for counting the number of scanning lines of a main screen signal and a sub-screen signal, and a scanning line ratio of a main screen signal and a sub-screen signal based on an output result of the counter. And a sub-screen video signal processing circuit for performing vertical reduction / enlargement processing of the sub-screen signal based on the output result of the arithmetic device. Claim 2 describes a specific circuit configuration realized by claim 1, and has the same function as claim 1.

According to a third aspect of the present invention, the ratio of the number of scanning lines between the main screen signal and the sub-screen signal is determined, and the sub-screen signal is determined only when the ratio becomes a certain value or less or a certain value or more. It is characterized in that reduction / enlargement processing is performed. In this case, in addition to the operation of claim 1, when the number of main screen scanning lines and the number of sub screen scanning lines are different, the reduction and reduction of the
Rather than enlarging, the necessity / unnecessity of reducing / enlarging the sub-screen signal is determined by the ratio of the main screen signal scanning line to the sub-screen signal scanning line. If necessary, no reduction / enlargement of the sub-screen signal is performed.

More specifically, even when the number of scanning lines of the main screen video signal and the number of scanning lines of the sub-screen video signal are different, when the composite signal is displayed on the display, a part of the sub-screen video signal is damaged. Alternatively, if the phenomenon that the scanning line containing no video signal is not displayed in the area where the sub-screen signal is displayed is not seen, the process of reducing / enlarging the sub-screen signal is unnecessary. This is determined by the range in which the combined signal is displayed on the display, that is, the range to display the main screen video signal and the sub-screen video signal.

Therefore, even when the number of scanning lines on the main screen and the number of scanning lines on the sub-screen are different from each other, it is determined that the sub-screen video signal is displayed without inconvenience, and the displayed sub-screen video signal is damaged. A is the ratio of the number of main screen scanning lines to the number of sub screen scanning lines, and the scanning of the main screen signal and the sub screen signal when a scanning line that does not include a video signal is displayed in the display area of the sub screen signal. Assuming that the line ratio is B, if the scanning line ratio of the main screen signal and the sub-screen signal is smaller than A, the sub-screen signal is enlarged. If the scanning line ratio is larger than B, the sub-screen signal is reduced. Perform processing. When the scanning line ratio is A
In the case of B or less, it is determined that the sub-screen video signal can be displayed without inferiority, and no reduction / enlargement of the sub-screen signal is performed.

As described above, the processing is performed only when it is determined that the sub-screen signal needs to be reduced or enlarged, so that if there is no problem in displaying the sub-screen video signal, it is uselessly reduced or enlarged. It has a sub-screen video processing circuit that performs processing and does not change the resolution of the sub-screen video signal.

According to a fourth aspect of the present invention, there is provided a register for storing an arbitrary ratio of the number of scanning lines as a constant value, and a comparison for comparing a scanning line ratio between a main screen signal and a sub-screen signal with a value stored in the register. A sub-screen video signal processing for reducing and enlarging the sub-screen signal when it is determined that the sub-screen signal needs to be reduced or enlarged based on the output of the comparison circuit and the output of the comparison circuit; And a circuit.

[0034] Claim 4 describes a specific circuit configuration realized by claim 3, and has the same function as claim 3.

(Embodiment 1) An image synthesizing apparatus according to Embodiment 1 of the present invention will be described below. FIG. 1 is a block diagram illustrating a configuration of a television receiver including the video synthesizing apparatus according to the first embodiment.

In FIG. 1, reference numeral 1 is a main screen video signal processing circuit, 2 is a sub-screen video signal processing circuit, 3 is a tuner on the main screen video signal side, 9 is a tuner on the sub-screen video signal side, and 4 is a main screen. Video input terminal 10 on the video signal side, video input terminal 10 on the sub-screen video signal side, 5 a switching circuit on the main screen video signal side, 11 a switching circuit on the sub-screen video signal side, 6
Is a Y / C separation circuit on the main screen video signal side, 14 is a Y / C separation circuit on the sub screen video signal side, and 7 is A on the main screen video signal side.
/ D conversion circuit, 13 an A / D conversion circuit on the sub-screen video signal side, 8 a sync separation circuit on the main screen video signal side, 12 a sync separation circuit on the sub-screen video signal side, 15 a video synthesis circuit, 1
Reference numeral 6 denotes a field memory for synthesizing an image, 17 denotes a D / A conversion circuit, 18 denotes a deflection processing circuit, and 19 denotes a display, which have almost the same configuration as the conventional technology.

In the first embodiment, the following components are provided in addition to the above components. Sign 2
0 counts the number of horizontal synchronizing signals (MHC) in one field of the main screen signal and the number of horizontal synchronizing signals (SHC) in one field of the sub-screen signal, and obtains the ratio. In other words, it is an arithmetic circuit for calculating the ratio of the number of sub-screen scanning lines to the number of main screen scanning lines (HC) in Expression 1.

HC = SHC / MHC (1) where HC is the ratio of the number of sub-screen scanning lines to the number of main screen scanning lines, M
HC is the number of horizontal synchronization signals in one field of the main screen signal, S
HC indicates the number of horizontal synchronization signals in one field of the sub-screen signal.

21 receives a result of the arithmetic circuit 20 and outputs a signal instructing a reduction process if the result is greater than 1;
If the result of the arithmetic circuit 20 is smaller than 1, a signal for supporting the enlargement processing is output; if the result of the arithmetic circuit 20 is 1, a comparison circuit for outputting a signal for not performing the reduction / enlargement processing; Is a reduction / enlargement circuit which receives the result of the comparison circuit 21 and reduces / enlarges the sub-screen signal (S) according to the instruction. The operation of the video synthesizing apparatus configured as described above will be described below.

In the following, for ease of understanding, the following symbols are also described. (M): Main screen signal (S): Sub screen signal (MM): Main screen video signal (scanning line including video signal) (SS): Sub screen video signal (Video signal (Including scanning lines) (MV) ・ ・ ・ Main screen vertical synchronization signal (SV) ・ ・ ・ Sub screen vertical synchronization signal (MH) ・ ・ ・ Main screen horizontal synchronization signal (SH) ・ ・ ・ Sub screen horizontal synchronization signal (MHC) ) ・ ・ ・ Number of main screen scanning lines (SHC) ・ ・ ・ Number of sub-screen scanning lines (HC) ・ ・ ・ Ratio of main screen scanning lines to sub-screen scanning lines Main screen signal ( M) broadcast signals such as terrestrial and satellite broadcasts
Tuned by. Further, a signal from the game machine or various storage media input from the video input terminal 4 and a signal from the tuner 3 are selected by the switching circuit 5 and output as a main screen signal (M). The selected main screen signal (M) is separated into a luminance signal and a chroma signal by a Y / C separation circuit 6, the chroma signal is demodulated into a color difference signal, and an A / D conversion circuit 7 that converts an analog signal into a digital signal. Is converted into a digital signal. From the main screen signal (M), the synchronization signal (M
V, MH) are separated, and the separated synchronization signal (M
V, MH) are input to a deflection processing circuit 18 that generates a control signal relating to the deflection processing. In addition, a control signal for the field memory 16 for video synthesis is generated from the sync separation circuit 8.

A broadcast signal such as a terrestrial wave or a satellite broadcast, which is a sub-screen signal (S), is selected by a tuner 9.
A signal from the game machine or various storage media input from the video input terminal 10 and a signal from the tuner 4 are selected by the switching circuit 11 and output as a sub-screen signal (S). The selected sub-screen signal (S) is separated into a luminance signal and a chroma signal by the Y / C separation circuit 14,
The chroma signal is demodulated into a color difference signal, and further converted into a digital signal by an A / D conversion circuit 13 that converts an analog signal into a digital signal. The synchronizing signal (SV, SH) is separated from the sub-screen signal (S) by the synchronizing separation circuit 12, and the synchronizing separation circuit 12 generates an input control signal of the field memory 16 for video synthesis.

The synchronization signals on the main screen side and the sub-screen side output from the synchronization separation circuit are input to the arithmetic circuit 20. The arithmetic circuit 20 sets the period within the main screen vertical synchronizing signal (MV) period to 1
The number of main screen horizontal synchronizing signals (MH) in one field is counted as a field, and the result is defined as the number of main screen scanning lines (MHC). The sub-screen vertical synchronizing signal (SV) period is defined as one field on the sub-screen side, and the number of sub-screen horizontal synchronizing signals (SH) in one field is counted to determine the number of sub-screen scanning lines (SHC).

The arithmetic circuit 20 calculates the ratio of the number of scanning lines on the main screen to the number of scanning lines on the sub-screen (HC) according to Equation 1, and outputs the ratio to the comparison circuit 21.

In the comparison circuit 21, if the output result of the arithmetic circuit 20 is smaller than 1, it is determined that the number of sub-screen scanning lines (SHC) is smaller than the number of main screen scanning lines (MHC). In order to prevent a sub-screen scanning line that does not include a video signal from being displayed in the display area of the sub-screen signal (S) as shown in FIG.
A signal for instructing to enlarge the sub-screen signal (S) is output. Since the signal for instructing enlargement can be easily represented by an integer or the like, the signal for instructing enlargement is represented by the numeral 1 here.

If the output result of the arithmetic circuit 20 is larger than 1, it is determined that the number of sub-screen scanning lines (SHC) is larger than the number of main screen scanning lines (MHC), and the video composite signal is finally displayed on the display 19. In order to prevent the sub-screen video signal (SS) from exceeding the display area of the sub-screen signal (S) and not being able to display all of the sub-screen signal (S) as shown in FIG. A signal for instructing to perform the reduction of S) is output. Since the signal for instructing reduction is easily represented by a specific integer or the like, the signal for instructing reduction is represented by the numeral 2 here.

Further, when the output result of the arithmetic circuit 20 is 1, the comparison circuit 21 outputs a signal for instructing not to reduce or enlarge the sub-screen signal (S). This reduction
A signal indicating that no enlargement is performed is represented by a numeral 0 here.

Next, the output of the comparison circuit 21 is input to the reduction / enlargement circuit 23. The operation circuit 2 is provided in the reduction / enlargement circuit 23.
A ratio of the number of main screen scanning lines to the number of sub-screen scanning lines (HC), which is an output of 0, and a sub-screen signal (S) are input. In the reduction / enlargement circuit 23 and the field memory 24, the comparison circuit 21
The sub-screen signal (S) is reduced / enlarged in accordance with the instruction signal which is the output of (2).

L = (MHC) / (SHC) (2) where L is the reduction ratio or enlargement ratio of the sub-screen signal (reciprocal of the output signal of the arithmetic circuit 20), and MHC is the number of scanning lines of the main screen signal. , SHC represent the number of scanning lines of the sub-screen signal.

Next, the sub-screen signal (S) obtained as the output of the reduction / enlargement circuit 23 is input to the video synthesizing circuit 15. The main screen signal (M) is also input to the video synthesizing circuit 15, and the main screen signal (M) and the sub-screen signal (S) are synthesized by the video synthesizing circuit 15 and the field memory 16. The synthesized video signal is converted into an analog signal by the D / A conversion circuit 17, and the display 19 displays the synthesized video signal by the deflection processing pulse from the deflection processing circuit 18.

Here, in the reduction / enlargement circuit 23, it is necessary to perform a process of filtering the sub-screen signal (S) in order to prevent the return of the video signal caused by the reduction / enlargement of the signal. In the present invention, since the signal processing is performed on the digital signal, the characteristics of the filter can be easily realized as a high-order function or a complicated function. Appropriate processing can be applied to the sub-screen signal (S).

(Embodiment 2) The third embodiment of the present invention will be described below.
A second embodiment of the present invention will be described with reference to FIG.

FIG. 2 is a block diagram showing a configuration of a television receiver provided with a video synthesizing apparatus according to Embodiment 2 of the present invention.

The same reference numerals as those in FIG. 1 of the first embodiment denote the same constituent elements in FIG. 2 of the second embodiment, and are the same as those described above, and thus description thereof will be omitted.

Items that have been described in the first embodiment and will not be described again in the second embodiment also apply to the second embodiment as they are, and a detailed description thereof will be omitted. The configuration of the second embodiment differs from that of the first embodiment in a circuit configuration in which a comparison circuit 21 and a register 22 are attached. Other configurations are the same as those of the first embodiment.

An image synthesizing apparatus having such a circuit configuration will be described below with reference to FIG. FIG. 3 shows a state when the composite video signal is displayed on the display 19.

FIG. 3A shows an example in which the number of main screen scanning lines (MHC) shown in FIG. 5 is smaller than the number of sub-screen scanning lines (SHC), and FIG. FIG. 3 shows a case where the number of main screen scanning lines (MHC) is larger than the number of sub-screen scanning lines (SHC), and FIG. Is shown.

As shown in FIG. 3, a scanning line containing a video signal may not be displayed due to overscan. If the range of the video signal displayed on the display unit 19 is called a display area, in the second embodiment, a composite video of a signal having different numbers of main screen scanning lines (MHC) and sub-screen scanning lines (SHC) is used. When the signal is displayed on the display 19, the sub-screen video signal (SS) in the display area of the video signal to be displayed is damaged, or a scanning line containing no video signal is not displayed in the display area. Does not reduce / enlarge the sub-screen signal (S).

This will be described with reference to FIG. (1) The number of main screen scanning lines (MHC) is equal to the number of sub-screen scanning lines (S
HC) in the sub-screen display area of the composite signal displayed on the display 19, the sub-screen video signal (SS) can be displayed without being damaged as shown in FIG. The ratio of the number of main screen scanning lines to the number of sub-screen scanning lines (HC), which is the boundary of the case
Is stored in the register 22 as A.

(2) When the number of scanning lines on the main screen is larger than the number of scanning lines on the sub-screen In the sub-screen display area of the composite signal displayed on the display 19, as shown in FIG. In the register 22, the ratio of the number of main screen scanning lines to the number of sub-screen scanning lines (HC) in the case where a scanning line that does not include a video signal is displayed and the case where the scanning line is not displayed is stored as B in the register 22.

In the above (1) and (2), the values of A and B stored in the register 22 are arbitrarily determined in consideration of the amount of overscan in the display.

A and B stored in the register 22 in (1) and (2) are input to the comparison circuit 21. The comparison circuit 21 outputs a signal instructing to reduce the sub-screen signal (S) when the ratio of the number of main screen scanning lines to the number of sub-screen scanning lines (HC) calculated by the arithmetic circuit 20 is more than A, and less than B. In this case, a signal instructing enlargement of the sub-screen signal (S) is output, and less than A B
In the above case, a signal indicating an instruction not to perform reduction / enlargement is output. Subsequent operations are the same as in the first embodiment, and detailed operations are omitted.

[0062]

As described above, according to the video synthesizing apparatus of the present invention, when a video signal having a small number of scanning lines in one field of a main screen signal or a sub-screen signal, such as a special reproduction of a VTR, is input. However, (1) a composite video signal can be displayed without damaging a part of the video signal. (2) It is possible to display a composite video signal without displaying a scan line that does not include a video signal in a part of the display area of the display. (3) Reduction of video signal by digital video signal processing
When performing filter processing to prevent aliasing in enlargement processing, it is possible to realize a filter using a higher-order function or a complicated function, and to obtain desired video signal characteristics.

[Brief description of the drawings]

FIG. 1 is a block diagram of a video compositing apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram of a video compositing apparatus according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating display of a composite video signal according to an embodiment of the present invention.

FIG. 4 is a block diagram of a video synthesizing apparatus according to the related art of the present invention.

FIG. 5 is a diagram illustrating the synthesis of a main screen signal and a sub-screen signal in the related art of the present invention.

FIG. 6 is an explanatory diagram showing a combination of a main screen signal and a sub-screen signal according to the conventional technique of the present invention.

[Description of Signs] 1 Main screen video signal processing circuit 2 Sub screen video signal processing circuit 3, 9 Tuner 4, 10 Video input terminal 5, 11 Switching circuit 6, 14 Y / C separation circuit 7, 13 A / D conversion circuit 8, 12 Synchronization separation circuit 15 Video synthesis device 16, 24 Field memory 17 D / A conversion circuit 18 Deflection processing circuit 19 Display 20 Operation circuit 21 Comparison circuit 22 Register 23 Reduction / enlargement circuit

Claims (4)

[Claims] An image synthesizing apparatus for synthesizing and displaying a main screen signal and a sub screen signal in a state where a main screen signal and a sub screen signal are video signals having different numbers of scanning lines as input signals, The number of scanning lines of the signal and the sub-screen signal is obtained, and the number of scanning lines of the sub-screen signal is adjusted to the number of scanning lines of the main screen signal. At the same time, the number of scanning lines of the main screen signal is maintained so that the display area of the sub-screen signal is not damaged. A video synthesizing apparatus characterized in that a sub-screen signal is reduced or enlarged according to a ratio between the number of sub-screen signals and the number of scanning lines of the sub-screen signal. 2. A means for counting the number of scanning lines of a main screen signal and a sub-screen signal, an arithmetic unit for calculating a scanning line ratio of a main screen signal and a sub-screen signal from an output result of the counter,
An image synthesizing apparatus, comprising: a sub-screen video signal processing circuit for performing vertical reduction / enlargement processing of a sub-screen signal based on an output result of the arithmetic unit. 3. The method according to claim 1, wherein a ratio of the number of scanning lines between the main screen signal and the sub-screen signal is obtained, and the reduction / enlargement processing of the sub-screen signal is performed only when the ratio becomes a certain value or less or a certain value or more. The video synthesizing device according to claim 1, wherein 4. A register for storing an arbitrary scanning line ratio as a constant value, a comparing device for comparing an output result of an arithmetic unit for calculating a scanning line ratio between a main screen signal and a sub-screen signal with the constant value, 3. The sub-screen video signal is reduced or enlarged only when the scanning line ratio between the screen signal and the sub-screen signal is below a certain value or above a certain value.
5. The video synthesizing device according to 1.