JP2001145371A - Power supply for sputtering - Google Patents

Power supply for sputtering

Info

Publication number
JP2001145371A
JP2001145371A JP32930099A JP32930099A JP2001145371A JP 2001145371 A JP2001145371 A JP 2001145371A JP 32930099 A JP32930099 A JP 32930099A JP 32930099 A JP32930099 A JP 32930099A JP 2001145371 A JP2001145371 A JP 2001145371A
Authority
JP
Japan
Prior art keywords
power supply
voltage
series
reverse polarity
reverse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP32930099A
Other languages
Japanese (ja)
Other versions
JP4079561B2 (en
Inventor
Kiyomi Watanabe
清美 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Origin Electric Co Ltd
Original Assignee
Origin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Origin Electric Co Ltd filed Critical Origin Electric Co Ltd
Priority to JP32930099A priority Critical patent/JP4079561B2/en
Publication of JP2001145371A publication Critical patent/JP2001145371A/en
Application granted granted Critical
Publication of JP4079561B2 publication Critical patent/JP4079561B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To prevent abnormal discharge from a direct-current power supply for sputtering without applying overvoltage to a switching element. SOLUTION: A main direct-current power supply 6 and a direct-current power supply 8 for reverse pulses are series-connected with each other with their polarities identical, and first and second semiconductor switches 15 and 16, provided across them, respectively, with anti-parallel diodes 19 and 20, in series with each other are connected. A sputtering electrode 12 and an inductor 17 for current limitating are connected at the point of series connection between the main direct-current power supply 6 and the direct-current power supply 8 for reverse pulses, and the point of series connection between the first and second semiconductor switches 15 and 16 to form a half-bridge configuration, and reverse positive-pole pulses are periodically applied to the sputtering electrode 12.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】 この発明は、直流スパッタ
用電源の異常放電防止に関する。
[0001] 1. Field of the Invention [0002] The present invention relates to the prevention of abnormal discharge of a DC sputtering power supply.

【0002】[0002]

【従来の技術】直流スパッタ装置はチャンバー内でター
ゲット材料(カソード極)とガスをプラズマ放電により
反応させ、それにより生成された化合物の膜を半導体表
面や光ディスクなどの基板上に形成させるものであり、
そのプラズマ直流放電のために負極性の直流高電圧を印
加する直流負極性電源が用いられる。
2. Description of the Related Art In a direct current sputtering apparatus, a target material (cathode electrode) and a gas are reacted in a chamber by plasma discharge, and a film of a compound generated by the reaction is formed on a semiconductor surface or a substrate such as an optical disk. ,
A DC negative power supply for applying a negative DC high voltage is used for the plasma DC discharge.

【0003】 しかし、プラズマ直流スパッタの性能を
低下させるものに、局部的に電流密度が急上昇してアー
ク放電領域に至る異常放電がある。この異常放電を防止
する方法として、逆極性、すなわち正極性のパルス電圧
を周期的に加える方法がある。
[0005] However, one of the causes of degrading the performance of the plasma DC sputtering is an abnormal discharge in which the current density sharply increases locally and reaches an arc discharge region. As a method of preventing this abnormal discharge, there is a method of periodically applying a pulse voltage of a reverse polarity, that is, a positive polarity.

【0004】 従来、この構成としては、次に示す回路
がある。第一の従来例を、図5に示す。直流電源51の
出力とスパッタ電極52の間に直列に電圧ブロック用イ
ンダクタ53を接続し、定常時はこのインダクタ53を
通してスパッタ電極52に負極性電圧を加える。
Conventionally, this configuration includes the following circuit. FIG. 5 shows a first conventional example. A voltage blocking inductor 53 is connected in series between the output of the DC power supply 51 and the sputter electrode 52, and a negative voltage is applied to the sputter electrode 52 through the inductor 53 in a normal state.

【0005】 異常放電を防止するため、半導体スイッ
チ54と逆極性電圧源55を直列接続してスパッタ電極
52に並列に接続し、半導体スイッチ54を周期的にオ
ンすることにより、逆電圧源55からスパッタ電極52
に逆極性パルス電圧を加える。このとき、電圧ブロック
用インダクタ53は逆極性パルス電圧が直流電源51側
に吸収されるのを阻止する。
In order to prevent abnormal discharge, the semiconductor switch 54 and the reverse polarity voltage source 55 are connected in series and connected in parallel to the sputter electrode 52, and the semiconductor switch 54 is periodically turned on, so that the reverse voltage source 55 Sputter electrode 52
Is applied with a reverse polarity pulse voltage. At this time, the voltage blocking inductor 53 prevents the reverse polarity pulse voltage from being absorbed by the DC power supply 51.

【0006】 第二の従来例は、図6に示すように、直
流電源61の出力とスパッタ電極62の間に直列にオー
トトランス63を接続し、半導体スイッチ64を周期的
にオンしてオートトランス63の始端子66と中間端子
67間に直流電源61の電圧を加えると、端子66と終
端子68に図示極性で直流電源61の電圧の1.1倍程
度の電圧が発生し、この電圧は直流電源61の出力と逆
極性なので、直流電源61の電圧の0.1倍程度の逆極
性パルスがスパッタ電極62に加わる方法である。
In the second conventional example, as shown in FIG. 6, an autotransformer 63 is connected in series between an output of a DC power supply 61 and a sputter electrode 62, and a semiconductor switch 64 is periodically turned on to automatically turn on the autotransformer. When a voltage of the DC power supply 61 is applied between the start terminal 66 and the intermediate terminal 67 of the terminal 63, a voltage about 1.1 times the voltage of the DC power supply 61 is generated at the terminal 66 and the terminator 68 with the polarity shown in FIG. This is a method in which a reverse polarity pulse of about 0.1 times the voltage of the DC power supply 61 is applied to the sputter electrode 62 because the output has a polarity opposite to the DC power supply 61.

【0007】 第三の従来例は、図7に示すように、直
流電源71の出力とスパッタ電極72の間に直列に電圧
ブロック用インダクタ73を接続し、直流カット用コン
デンサ74とパルストランス75の2次巻線76を直列
に接続してスパッタ電極72に並列に接続する方法であ
る。パルストランス75の1次巻線77は半導体スイッ
チ78を通して直流電源71に並列に接続される。
In a third conventional example, as shown in FIG. 7, a voltage blocking inductor 73 is connected in series between an output of a DC power supply 71 and a sputter electrode 72, and a DC cut capacitor 74 and a pulse transformer 75 are connected. This is a method of connecting the secondary windings 76 in series and connecting them in parallel to the sputter electrode 72. The primary winding 77 of the pulse transformer 75 is connected in parallel to the DC power supply 71 through a semiconductor switch 78.

【0008】 半導体スイッチ78を周期的にオンさせ
ることにより1次巻線77に直流電源71の電圧を印加
し、2次巻線76に発生したパルス電圧を直流カット用
コンデンサ74を通してスパッタ電極72に逆極性パル
スとして印加する。電圧ブロック用インダクタ73は逆
極性パルス電圧が直流電源71側に吸収されるのを阻止
する。
The voltage of the DC power supply 71 is applied to the primary winding 77 by periodically turning on the semiconductor switch 78, and the pulse voltage generated in the secondary winding 76 is applied to the sputter electrode 72 through the DC cut capacitor 74. It is applied as a reverse polarity pulse. The voltage blocking inductor 73 prevents the reverse polarity pulse voltage from being absorbed by the DC power supply 71.

【0009】[0009]

【発明が解決しようとする課題】これら従来例の第一な
いし第三のいずれの回路もIGBT,FETなどの半導
体スイッチとインダクタ、オートトランス、パルストラ
ンスなどの磁気部品を使用している。このようなインダ
クタ、オートトランス、パルストランスなどを流れる電
流をスイッチングすると、オン期間にかかる電圧により
鉄芯の磁束が増加するので、オフ期間にこの磁束をもと
に戻すために逆電圧を発生させる回路、いわゆる磁気リ
セット回路が必要となる。
All of the first to third circuits of the prior art use semiconductor switches such as IGBTs and FETs and magnetic components such as inductors, autotransformers, and pulse transformers. When switching the current flowing through such inductors, auto transformers, pulse transformers, etc., the magnetic flux of the iron core increases due to the voltage applied during the on-period, so a reverse voltage is generated to restore this magnetic flux during the off-period. A circuit, a so-called magnetic reset circuit, is required.

【0010】 磁束のリセットは増加した磁束エネルギ
ーを消費する回路であり、損失となる。したがって、逆
パルス周波数を高周波化する場合、損失が非常に大きく
なる欠点がある。
The resetting of the magnetic flux is a circuit that consumes the increased magnetic flux energy, resulting in a loss. Therefore, when the reverse pulse frequency is increased, there is a disadvantage that the loss becomes very large.

【0011】 他に、磁束のリセット方法として、イン
ダクタに2次巻線を設けて、磁気エネルギーを電源に戻
す方法もあるが、回路構成が複雑となる。
As another method of resetting magnetic flux, there is a method of providing a secondary winding to an inductor and returning magnetic energy to a power source, but the circuit configuration becomes complicated.

【0012】 また、インダクタ回路はスイッチがオフ
するとき過電圧が発生するので、半導体スイッチング素
子は高耐圧である必要がある。通常はスナバ回路により
電圧を吸収するが、それでも電源電圧の2〜3倍必要で
あり、またスナバ回路は吸収電圧を抵抗器で損失させる
ため、抵抗器が大きくなり、小型化が困難である。
In addition, since an overvoltage occurs when the switch is turned off in the inductor circuit, the semiconductor switching element needs to have a high breakdown voltage. Normally, the voltage is absorbed by a snubber circuit, but it still needs to be two to three times the power supply voltage, and the snubber circuit causes the absorption voltage to be lost by the resistor, so that the resistor becomes large and it is difficult to reduce the size.

【0013】[0013]

【課題を解決するための手段】本発明は、主直流電源と
逆極性パルス用直流電源とを、それらの出力電圧が同極
性でかつ直列になるように接続し、その直列接続された
主直流電源と逆極性パルス用直流電源の両端間に逆並列
ダイオードを有する互いに直列の第1と第2の半導体ス
イッチを接続し、主直流電源の出力端子と逆極性パルス
用直流電源の出力端子との接続点と第1と第2の半導体
スイッチとの接続点間にスパッタ電極と電流制限用イン
ダクタを互いに直列になるように接続し、それらの第1
と第2の半導体スイッチを周期的に交互にオンさせるこ
とにより、第1の半導体スイッチがオンの時には主直流
電源からスパッタ電極に負極性定常電圧を供給し、第2
の半導体スイッチがオンの時には逆極性パルス用直流電
源からスパッタ電極に逆極性の正極パルスを加えること
を特徴とするスパッタ用電源である。
According to the present invention, a main DC power supply and a DC power supply for reverse polarity pulses are connected so that their output voltages are of the same polarity and in series, and the main DC power supplies connected in series are connected. A first and a second semiconductor switch having an anti-parallel diode connected in series between both ends of a power supply and a DC power supply for reverse polarity pulse are connected, and an output terminal of the main DC power supply and an output terminal of the DC power supply for reverse polarity pulse are connected. A sputter electrode and a current limiting inductor are connected between a connection point and a connection point between the first and second semiconductor switches so as to be in series with each other.
And the second semiconductor switch are periodically and alternately turned on, so that when the first semiconductor switch is turned on, a negative steady-state voltage is supplied from the main DC power supply to the sputter electrode, and the second semiconductor switch is turned on.
When a semiconductor switch is turned on, a positive polarity pulse of reverse polarity is applied to the sputter electrode from a DC power source for reverse polarity pulse.

【0014】 本発明により、従来問題となっていた磁
気回路のリセットは不要となり、直流回路のインダクタ
を用いないで逆極性パルスを発生させるのでスイッチン
グ素子の過電圧印加の問題もなくなり、高周波化による
損失も少なくできる。
According to the present invention, the reset of the magnetic circuit, which has been a problem in the past, becomes unnecessary, and a reverse polarity pulse is generated without using the inductor of the DC circuit. Can be reduced.

【0015】 また、原理上、半導体スイッチング素子
には電源電圧程度の電圧しか印加されず、出力−700
V〜−1000V程度のスパッタ用電源であれば、放電
開始電圧を−1500V程度としても、耐圧1000V程
度の耐量を持ったIGBTやFETを2個直列接続する
だけの構成ですむ利点もある。
In principle, only a voltage of about the power supply voltage is applied to the semiconductor switching element, and the output −700
With a sputtering power supply of about V to -1000 V, even if the discharge starting voltage is about -1500 V, there is an advantage that a configuration in which only two IGBTs or FETs with a withstand voltage of about 1000 V are connected in series is sufficient.

【0016】[0016]

【発明の実施の形態】図1は本発明の実施例である。1
は商用交流電源を入力とする整流器、2は整流された直
流電源で動作する高周波インバータである。3はインバ
ータ2の高周波出力電圧を所定の電圧に変換する二つの
2次巻線4と5を備えたトランスである。
FIG. 1 shows an embodiment of the present invention. 1
Is a rectifier having a commercial AC power supply as an input, and 2 is a high-frequency inverter operated by a rectified DC power supply. Reference numeral 3 denotes a transformer including two secondary windings 4 and 5 for converting a high-frequency output voltage of the inverter 2 into a predetermined voltage.

【0017】 第1の2次巻線4は整流器6とフィルタ
コンデンサ7に接続され、主直流電源として例えば定常
電圧の−700Vを発生する。第2の2次巻線5は整流
器8とフィルタコンデンサ9に接続され、逆パルス用直
流電源として逆電圧の+70Vを発生する。
The first secondary winding 4 is connected to the rectifier 6 and the filter capacitor 7 and generates, for example, a steady voltage of −700 V as a main DC power supply. The second secondary winding 5 is connected to the rectifier 8 and the filter capacitor 9 and generates a reverse voltage of +70 V as a reverse pulse DC power supply.

【0018】 二つの整流器6,8は同極性に直列接続
され、接続点は電流検出用抵抗器11を通してスパッタ
電極12のアノード極13に接続される。アノード極1
3は通常は装置筐体と同じ接地電位である。互いに直列
接続された半導体スイッチ、例えばIGBT15,16
が二つの直列接続された直流電源の両端間に接続され
る。IGBT15,16の接続点が電流制限用インダク
タ17を通してスパッタ電極12のターゲット材料であ
るカソード極14に接続される。
The two rectifiers 6 and 8 are connected in series with the same polarity, and the connection point is connected to the anode 13 of the sputter electrode 12 through the current detection resistor 11. Anode pole 1
3 is usually the same ground potential as the device housing. Semiconductor switches connected in series to each other, for example, IGBTs 15 and 16
Is connected between both ends of two DC power supplies connected in series. The connection point of the IGBTs 15 and 16 is connected through a current limiting inductor 17 to a cathode 14 which is a target material of the sputter electrode 12.

【0019】 すなわち、2個の直流電源のフィルタコ
ンデンサ7,9とIGBT15,16はハーフブリッジ
回路を構成し、いわゆる交流回路にスパッタ電極12と
電流制限用インダクタ17が接続される構成である。1
8はIGBT制御回路であり、IBGT15,16のゲ
ートにオン信号S1,S2を与える。同時に電流検出抵
抗11の検出信号が制御回路に加えられる。19,20
は各IGBT15,16に逆並列接続されたフライホイ
ールダイオードである。
That is, the filter capacitors 7 and 9 and the IGBTs 15 and 16 of the two DC power supplies form a half bridge circuit, and the sputter electrode 12 and the current limiting inductor 17 are connected to a so-called AC circuit. 1
Reference numeral 8 denotes an IGBT control circuit which supplies ON signals S1 and S2 to the gates of the IBGTs 15 and 16. At the same time, the detection signal of the current detection resistor 11 is applied to the control circuit. 19, 20
Is a flywheel diode connected in anti-parallel to each of the IGBTs 15 and 16.

【0020】 次に動作を説明する。図2は信号説明図
であり、オン信号S1、S2、スパッタ電極電圧Vs、ス
パッタ電流Isの時間的関係を示す。オン信号S1,S2
によりIGBT15,16は数kHzから100kHz程度
で周期的に交互にオンするが、IGBT16よりもIG
BT15のオンデユーティが大きい。IGBT16のオ
ン時間は数μs〜数十μsである。
Next, the operation will be described. FIG. 2 is an explanatory diagram of signals, and shows a time relationship among the ON signals S1 and S2, the sputter electrode voltage Vs, and the sputter current Is. ON signals S1, S2
IGBTs 15 and 16 are periodically and alternately turned on at a frequency of about several kHz to about 100 kHz.
The on-duty of the BT15 is large. The ON time of the IGBT 16 is several μs to several tens μs.

【0021】 IGBT15がオンし、IGBT16が
オフのとき、定常の負極性の電圧をカソード12に供給
する。IGBT15がオフし、IGBT16がオンする
と、数μs〜数十μsの間、逆極性パルス電圧がカソー
ド14に加えられる。
When the IGBT 15 is on and the IGBT 16 is off, a steady negative voltage is supplied to the cathode 12. When the IGBT 15 is turned off and the IGBT 16 is turned on, a reverse polarity pulse voltage is applied to the cathode 14 for several μs to several tens μs.

【0022】 IGBT15,16が同時にオンする期
間があると、直流電源を短絡するので、オン信号S1,
S2には休止期間として、半導体スイッチング素子がI
GBTの場合には0.5μs程度の時間が必要である。
この休止期間は短いほうがよく、FETの場合には、
0.1μs程度でも可能である。
If there is a period during which the IGBTs 15 and 16 are turned on at the same time, the DC power supply is short-circuited.
In S2, a semiconductor switching element is connected to I
In the case of GBT, a time of about 0.5 μs is required.
The shorter this pause period is, the better. In the case of FET,
A time of about 0.1 μs is also possible.

【0023】 次に異常放電した場合の保護方法を説明
する。図2に示す時刻tにスパッタ電極12間でアーク
放電が発生すると、スパッタ電流Isは負荷と直列に接続
された電流制限用インダクタ17により決まる電流上昇
率で増加する。その電流が設定レベルを超えると、電流
検出用抵抗器11の検出信号を制御回路18に加え、制
御回路18は出来る限り速やかに、例えば数μs後にオ
ン信号S1又はS2を終了させてIGBTの許容電流以
下でIGBT15又は16をオフさせる。
Next, a protection method in the case of abnormal discharge will be described. When an arc discharge occurs between the sputter electrodes 12 at the time t shown in FIG. 2, the sputter current Is increases at a current increasing rate determined by the current limiting inductor 17 connected in series with the load. When the current exceeds the set level, the detection signal of the current detection resistor 11 is applied to the control circuit 18, and the control circuit 18 terminates the ON signal S1 or S2 as soon as possible, for example, several μs later, and permits the IGBT to operate. The IGBT 15 or 16 is turned off under the current.

【0024】 この実施例では、電流制限用インダクタ
17がブリッジの交流回路にあるので、そのリセットは
IGBT15又は16の逆並列ダイオード19又は20
を通してそれぞれの電源電圧でリセットされるため、従
来例で示したようなインダクタンス回路のリセットのた
めの電力損失、IGBTの過電圧印加の問題はない。基
本的には、IGBTへの印加電圧は主直流電源と逆パル
ス用直流電源の電圧和で制限される範囲に収まる。
In this embodiment, since the current-limiting inductor 17 is in the AC circuit of the bridge, the reset is performed by the antiparallel diode 19 or 20 of the IGBT 15 or 16.
, And there is no problem of power loss for resetting the inductance circuit and application of an overvoltage of the IGBT as shown in the conventional example. Basically, the voltage applied to the IGBT falls within a range limited by the sum of the voltages of the main DC power supply and the reverse pulse DC power supply.

【0025】 なお、電流検出用抵抗器11が過電流を
検出した場合には、インバータ2側にも停止信号を送
り、インバータ2を速やかに停止させることが、過電流
保護の点からは望ましい。
When the current detecting resistor 11 detects an overcurrent, it is desirable from the viewpoint of overcurrent protection that a stop signal is also sent to the inverter 2 to stop the inverter 2 promptly.

【0026】 次に、図3に示す保護回路は、本発明で
ある図1の半導体スイッチング素子15,16に適用で
きるIGBT過電流保護用の回路例である。
Next, the protection circuit shown in FIG. 3 is an example of a circuit for IGBT overcurrent protection that can be applied to the semiconductor switching elements 15 and 16 of FIG. 1 according to the present invention.

【0027】 IGBT31のエミッタ極と直列に低抵
抗の抵抗器32、例えば0.06オームが接続され、抵
抗器32の両端に過電流検出用バイポーラトランジスタ
33のベース・エミッタ極が接続され、コレクタ極はI
GBT31のゲートに接続される。IGBT31の信号
源34とIGBT31のゲート間には直列に抵抗器35
が挿入される。
A low-resistance resistor 32, for example, 0.06 ohm is connected in series with the emitter electrode of the IGBT 31, and the base and emitter electrodes of the overcurrent detecting bipolar transistor 33 are connected to both ends of the resistor 32, and the collector electrode Is I
Connected to the gate of GBT31. A resistor 35 is connected in series between the signal source 34 of the IGBT 31 and the gate of the IGBT 31.
Is inserted.

【0028】 IGBT31に過電流、例えば10Aが
流れると抵抗器32の電圧がバイポーラトランジスタ3
3のベース・エミッタ電圧のしきい値0.6Vを越えて
オンするため、そのコレクタ・エミッタ間が低インピー
ダンスになり、IGBT31のゲート直列抵抗器35の
電圧降下でIGBT31のゲート電圧を低下させ、IG
BT31の両端のインピーダンスを高めてそのコレクタ
電流を10Aに制限する。IGBT31はこの間、損失
が増加するが、10Aの電流検出でゲート信号を遮断す
るか、前段の直流電源を構成するインバータを停止すれ
ば、損失は短時間ですみ、破壊には至らない。
When an overcurrent, for example, 10 A flows through the IGBT 31, the voltage of the resistor 32 becomes
3, the threshold voltage of the base-emitter voltage exceeds 0.6 V, so that the impedance between the collector and the emitter becomes low, and the gate voltage of the IGBT 31 is reduced by the voltage drop of the gate series resistor 35 of the IGBT 31; IG
The impedance at both ends of the BT 31 is increased to limit its collector current to 10A. During this time, the loss of the IGBT 31 increases, but if the gate signal is cut off by detecting the current of 10 A or the inverter constituting the DC power supply in the preceding stage is stopped, the loss is short and does not lead to destruction.

【0029】 次に、逆極性パルス電源を備えていない
既設のスパッタ用電源に逆極性パルス発生機能を付加す
る実施例について図4により説明する。
Next, an embodiment in which a reverse polarity pulse generation function is added to an existing sputtering power supply not provided with a reverse polarity pulse power supply will be described with reference to FIG.

【0030】 一点鎖線で区切られた範囲が追加回路4
0である。1は商用交流電源を入力とする整流器であ
る。2は整流された直流電源で動作する高周波インバー
タであり、既設の主電源41の出力電圧を検出しその1
0%程度の逆極性電圧をスパッタ電極へ印加するような
電圧を発生させる。3はインバータ2の高周波出力電圧
を変換するトランスであり、これらは主電源41のもの
よりも大幅に小型のものを用いることができる。
The range separated by the dashed line is the additional circuit 4
0. Reference numeral 1 denotes a rectifier having a commercial AC power supply as an input. Reference numeral 2 denotes a high-frequency inverter that operates on a rectified DC power supply, and detects an output voltage of an existing main power supply 41 to detect the output voltage.
A voltage for applying a reverse polarity voltage of about 0% to the sputter electrode is generated. Reference numeral 3 denotes a transformer for converting the high-frequency output voltage of the inverter 2, which can be significantly smaller than that of the main power supply 41.

【0031】 半導体スイッチング素子、たとえばIG
BTスイッチ15,16は既設の主電源41に直列に接
続される。IGBT15,16には逆並列ダイオード1
9,20が接続される。17は電流制限用インダクタ、
11は電流検出抵抗器、18は制御回路である。これら
の動作説明は図1の実施例と同様であり、説明を省略す
る。
A semiconductor switching element, for example, IG
The BT switches 15 and 16 are connected in series to an existing main power supply 41. IGBTs 15 and 16 have antiparallel diode 1
9, 20 are connected. 17 is a current limiting inductor,
11 is a current detection resistor, and 18 is a control circuit. The description of these operations is the same as that of the embodiment of FIG.

【0032】 なお、この実施例も図1と同様に新規な
逆極性パルス発生機能をもったスパッタ用電源とするこ
とができるのは言うまでもない。
It is needless to say that this embodiment can also be used as a sputtering power supply having a novel reverse polarity pulse generation function as in FIG.

【0033】 また、これら実施例においては半導体ス
イッチ16は半導体スイッチ15に比べて電流容量の小
さいものを用いることができる。
In these embodiments, a semiconductor switch 16 having a smaller current capacity than the semiconductor switch 15 can be used.

【0034】 上記の各種実施例では半導体スイッチン
グ素子をIGBTとして説明したが、FETや静電誘導
型半導体素子なども用いることができ、FETの場合に
はそのボディダイオードを利用することにより逆並列ダ
イオードを省略することができる。
In the above embodiments, the semiconductor switching element is described as an IGBT, but an FET or an electrostatic induction type semiconductor element can be used. In the case of an FET, an anti-parallel diode is used by using the body diode. Can be omitted.

【0035】[0035]

【発明の効果】以上の説明の通り、本発明では、直流電
源回路にブロック用インダクタやパルストランスなどの
磁気部品を用いないので、インダクタなどの残留励磁エ
ネルギーをリセットする必要がなく、したがって電力損
失を小さくできる。高周波化は半導体スイッチング素子
のスイッチング速度により決まるので高周波化と小型化
が容易であり、また、もれインダクタンスによる過電圧
印加によるスイッチング素子の劣化や破壊のおそれもな
い。
As described above, according to the present invention, no magnetic components such as a block inductor and a pulse transformer are used in the DC power supply circuit, so that it is not necessary to reset the residual excitation energy of the inductor and the like. Can be reduced. Since the increase in frequency is determined by the switching speed of the semiconductor switching element, it is easy to increase the frequency and reduce the size, and there is no risk of deterioration or destruction of the switching element due to application of an overvoltage due to leakage inductance.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明に係る第一の実施例を示す。FIG. 1 shows a first embodiment according to the present invention.

【図2】 図1の信号説明図を示す。FIG. 2 shows a signal explanatory diagram of FIG.

【図3】 過電流保護の実施例を示す。FIG. 3 shows an embodiment of overcurrent protection.

【図4】 逆極性パルス発生追加回路の実施例を示す。FIG. 4 shows an embodiment of a reverse polarity pulse generation additional circuit.

【図5】 従来の逆パルス発生回路の実施例を示す。FIG. 5 shows an embodiment of a conventional reverse pulse generation circuit.

【図6】 従来の逆パルス発生回路の実施例を示す。FIG. 6 shows an embodiment of a conventional reverse pulse generation circuit.

【図7】 従来の逆パルス発生回路の実施例を示す。FIG. 7 shows an embodiment of a conventional reverse pulse generation circuit.

【符号の説明】[Explanation of symbols]

1・・・整流器、2・・・高周波インバータ、3・・・
トランス、4,5・・・トランスの二次巻線、6,8・
・・整流器、7,9・・・コンデンサ、11・・・電流
検出用抵抗器、12・・・スパッタ電極、13・・・ア
ノード、14・・・カソード、15,16・・・半導体
スイッチ、17・・・電流制限用インダクタ、18・・
・制御回路、19,20・・・逆並列ダイオード、31
・・・IGBT、32,35・・・抵抗器、33・・・
バイポーラトランジスタ、34・・・IGBTの信号
源、40・・・逆極性パルス発生追加回路、41・・・
既設の主電源、51・・・直流電源、52・・・スパッ
タ電極、53・・・インダクタ、54・・・半導体スイ
ッチ、55・・・逆極性電圧源、61・・・直流電源、
62・・・スパッタ電極、63・・・オートトランス、
64・・・半導体スイッチ、66・・・始端子、67・
・・中間端子、68・・・終端子、71・・・直流電
源、72・・・スパッタ電極、73・・・インダクタ、
74・・・コンデンサ、75・・・パルストランス、7
6・・・パルストランスの二次巻線、77・・・パルス
トランスの一次巻線、78・・・半導体スイッチ、AC
・・・商用交流電源、S1・・・IGBT15用オン信
号、S2・・・IGBT16用オン信号、Vs・・・ス
パッタ電極電圧、Is・・・スパッタ電流、t・・・異
常放電開始時刻
1 ... rectifier, 2 ... high frequency inverter, 3 ...
Transformer, 4,5 ... Transformer secondary winding, 6,8
..Rectifiers, 7, 9 capacitors, 11 current-detecting resistors, 12 sputter electrodes, 13 anodes, 14 cathodes, 15, 16 semiconductor switches, 17 ... Inductor for current limiting, 18 ...
.Control circuit, 19, 20... Anti-parallel diode, 31
... IGBT, 32, 35 ... resistor, 33 ...
Bipolar transistor, 34 ... IGBT signal source, 40 ... Reverse polarity pulse generation additional circuit, 41 ...
Existing main power supply, 51 DC power supply, 52 sputter electrode, 53 inductor, 54 semiconductor switch, 55 reverse voltage source, 61 DC power supply,
62 ... sputter electrode, 63 ... auto transformer,
64: semiconductor switch, 66: start terminal, 67
..Intermediate terminals, 68 terminators, 71 DC power supply, 72 sputter electrodes, 73 inductors,
74: condenser, 75: pulse transformer, 7
6: secondary winding of pulse transformer, 77: primary winding of pulse transformer, 78: semiconductor switch, AC
... Commercial AC power supply, S1 ... IGBT15 ON signal, S2 ... IGBT16 ON signal, Vs ... Sputter electrode voltage, Is ... Sputter current, t ... Abnormal discharge start time

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】主直流電源と逆極性パルス用直流電源と
を、それらの出力電圧が同極性でかつ直列になるように
接続し、前記直列接続された主直流電源と逆極性パルス
用直流電源の両端間に逆並列ダイオードを有する互いに
直列の第1と第2の半導体スイッチを接続し、前記主直
流電源の出力端子と前記逆極性パルス用直流電源の出力
端子との接続点と前記第1と第2の半導体スイッチとの
接続点間にスパッタ電極と電流制限用インダクタを互い
に直列になるように接続し、前記第1と第2の半導体ス
イッチを周期的に交互にオンさせることにより、前記第
1の半導体スイッチがオンの時には前記主直流電源から
前記スパッタ電極に負極性定常電圧を供給し、前記第2
の半導体スイッチがオンの時には前記逆極性パルス用直
流電源から前記スパッタ電極に逆極性の正極パルスを加
えることを特徴とするスパッタ用電源。
A main DC power supply and a DC power supply for reverse polarity pulse are connected so that their output voltages are in the same polarity and in series, and the main DC power supply and the DC power supply for reverse polarity pulse are connected. A first and a second semiconductor switch having an anti-parallel diode connected in series between both ends thereof are connected to each other, and a connection point between an output terminal of the main DC power supply and an output terminal of the reverse polarity pulse DC power supply is connected to the first and second semiconductor switches. By connecting a sputter electrode and a current limiting inductor so as to be in series with each other between the connection points of the first and second semiconductor switches, and periodically turning on the first and second semiconductor switches, When the first semiconductor switch is on, the main DC power supply supplies a negative steady-state voltage to the sputter electrode;
Wherein a positive polarity pulse of a reverse polarity is applied to the sputtering electrode from the reverse polarity pulse DC power source when the semiconductor switch is turned on.
【請求項2】請求項1において、前記第1、第2の半導
体スイッチがFETからなるとき、それぞれの前記ダイ
オードは前記FETのボディダイオードであることを特
徴とするスパッタ用電源。
2. The sputtering power source according to claim 1, wherein when each of the first and second semiconductor switches comprises an FET, each of the diodes is a body diode of the FET.
JP32930099A 1999-11-19 1999-11-19 Power supply for sputtering Expired - Fee Related JP4079561B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32930099A JP4079561B2 (en) 1999-11-19 1999-11-19 Power supply for sputtering

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32930099A JP4079561B2 (en) 1999-11-19 1999-11-19 Power supply for sputtering

Publications (2)

Publication Number Publication Date
JP2001145371A true JP2001145371A (en) 2001-05-25
JP4079561B2 JP4079561B2 (en) 2008-04-23

Family

ID=18219930

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Country Link
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6914794B2 (en) 2002-12-03 2005-07-05 Origin Electric Company, Limited Power conversion device
JP2005318714A (en) * 2004-03-30 2005-11-10 Origin Electric Co Ltd Power supply device
JP2007116881A (en) * 2005-10-24 2007-05-10 Nippon Reliance Kk Ac power supply apparatus and arc control method in apparatus
JP2007143338A (en) * 2005-11-21 2007-06-07 Nippon Reliance Kk Ac power supply device and arc suppression method therein
JP2008505446A (en) * 2004-07-02 2008-02-21 アドバンスド エナジー インダストリーズ, インコーポレイテッド Apparatus and method for rapid arc extinction using early short circuit of arc current in plasma
JP2009176726A (en) * 2007-12-24 2009-08-06 Huettinger Electronic Sp Z Oo Method for limiting change of electric current flowing between plasma chamber and power supply, current change rate limiting device prepared between plasma chamber and power supply for limiting change of electric current flowing between plasma chamber and power supply, and current change rate limiting circuit
JP2009232542A (en) * 2008-03-21 2009-10-08 Shindengen Electric Mfg Co Ltd Power supply circuit for sputtering apparatus
CN103107714A (en) * 2011-11-10 2013-05-15 烟台龙源电力技术股份有限公司 Plasma ignition system and electrical power generating system thereof
JP2013110778A (en) * 2011-11-17 2013-06-06 Hitachi Computer Peripherals Co Ltd Power supply device and method of controlling power supply device

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6914794B2 (en) 2002-12-03 2005-07-05 Origin Electric Company, Limited Power conversion device
JP2005318714A (en) * 2004-03-30 2005-11-10 Origin Electric Co Ltd Power supply device
JP4498000B2 (en) * 2004-03-30 2010-07-07 オリジン電気株式会社 Power supply
JP2008505446A (en) * 2004-07-02 2008-02-21 アドバンスド エナジー インダストリーズ, インコーポレイテッド Apparatus and method for rapid arc extinction using early short circuit of arc current in plasma
JP2007116881A (en) * 2005-10-24 2007-05-10 Nippon Reliance Kk Ac power supply apparatus and arc control method in apparatus
JP2007143338A (en) * 2005-11-21 2007-06-07 Nippon Reliance Kk Ac power supply device and arc suppression method therein
JP2009176726A (en) * 2007-12-24 2009-08-06 Huettinger Electronic Sp Z Oo Method for limiting change of electric current flowing between plasma chamber and power supply, current change rate limiting device prepared between plasma chamber and power supply for limiting change of electric current flowing between plasma chamber and power supply, and current change rate limiting circuit
US8981664B2 (en) 2007-12-24 2015-03-17 TRUMPF Huettinger Sp. zo. o. Current limiting device for plasma power supply
JP2009232542A (en) * 2008-03-21 2009-10-08 Shindengen Electric Mfg Co Ltd Power supply circuit for sputtering apparatus
CN103107714A (en) * 2011-11-10 2013-05-15 烟台龙源电力技术股份有限公司 Plasma ignition system and electrical power generating system thereof
JP2013110778A (en) * 2011-11-17 2013-06-06 Hitachi Computer Peripherals Co Ltd Power supply device and method of controlling power supply device
TWI495250B (en) * 2011-11-17 2015-08-01 Hitachi Info & Telecomm Eng Power supply device and control method of power supply device

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