JP2001144385A - Printed wiring board and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provided a printed wiring board which reduces a level difference on the surface of an insulating layer, and also to provide a method for manufacturing the board. SOLUTION: Prior to lamination of a DFA layer 6 on a single-line pattern 3 and a solid pattern 4, only the solid pattern 4 is etched, and the thickness of the solid pattern 4 is made smaller than that of the line pattern 3. Thereafter the DFA 6 is laminated and pressed to obtain a printed wiring board. In the board, since the thickness of the solid pattern 4 is smaller than that of the line pattern 3, a level difference on the surface of the DFA layer 6 can be reduces. Accordingly, the surface of the board is substantially a flat surface.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board having a conductor layer including a single line pattern and a solid pattern and an insulating layer covering the conductor layer and a method of manufacturing the same. More particularly, the present invention relates to a printed wiring board in which a height difference generated on a surface of an insulating layer formed on a single line pattern and a solid pattern is reduced, and a method of manufacturing the same.

[0002]

2. Description of the Related Art An outline of a conventional method for manufacturing a printed wiring board will be described. First, a conductor pattern (single line pattern 3 and solid pattern 4 (see FIG. 8)) is formed on the substrate 2 and then covered with a DFA (adhesive) layer. The DFA layer is obtained by dispersing a fine filler in a thermosetting resin matrix and a solvent. And
This is pressed to semi-harden the DFA layer and flatten the surface thereof, and then, the main hardening for drying the DFA layer is performed to form the interlayer insulating layer 7. Thereby, a printed wiring board as shown in FIG. 8 is obtained. In addition, formation of a via hole, formation of an upper conductor pattern, and the like are performed as appropriate.

[0003]

However, in the above-described conventional method for manufacturing a printed wiring board, the interlayer insulating layer 7 formed on the single line pattern 3 and the solid pattern 4 is not provided.
As shown in FIG. 8, there was a problem that unevenness was generated on the surface and a height difference occurred. That is, even if the planarization is performed, the surface of the interlayer insulating layer 7 does not become flat, and the surface of the interlayer insulating layer 7 rises on the solid pattern 4. The reason is that the volume per unit area of the solid pattern 4 is larger than the volume per unit area of the single line pattern 3 and the DFA layer does not flow much, so that the interlayer insulating layer 7 on the solid pattern 4 rises. Conceivable. Here, if the press pressure is increased during flattening,
The height difference on the surface of the interlayer insulating layer 7 decreases. However, there is a possibility that the thickness of the interlayer insulating layer 7 becomes small and the interlayer insulating layer 7 does not function as an insulating layer. Therefore, it is difficult to make the press pressure higher than the current state. For this reason, at present, by increasing the pressing pressure on the surface of the DFA layer,
It is difficult to reduce the difference in height generated on the surface of the interlayer insulating layer 7.

[0004] Due to such a height difference generated on the surface of the interlayer insulating layer 7, the adhesion of an upper layer pattern formed above the interlayer insulating layer 7 may be deteriorated. In addition, the fact that there is a height difference means that the surface of the interlayer insulating layer 7 is partially inclined, so that the dimensional accuracy of the upper layer pattern tends to decrease. In the case of further multi-layering, there is a possibility that the height difference generated on the surface of the interlayer insulating layer formed on the upper layer is doubled. As described above, the difference in height generated on the surface of the interlayer insulating layer 7 has caused a decrease in the yield rate of the printed wiring board.

The present invention has been made in order to solve the above-mentioned problems, and an object of the present invention is to provide a printed wiring board capable of reducing a height difference generated on a surface of an insulating layer and a method of manufacturing the same.

[0006]

According to the printed wiring board of the present invention which has been made to solve the above problems, a conductor layer including a single line pattern and a solid pattern, an insulating layer covering the conductor layer, , The volume per unit area of the solid pattern is smaller than the volume per unit area of the single line pattern.

In this printed wiring board, the volume per unit area of the solid pattern is smaller than the volume per unit area of the single line pattern. Therefore, the swell of the surface of the insulating layer on the solid pattern is correspondingly small. For this reason, the height difference on the surface of the insulating layer, which has occurred on the single line pattern and the solid pattern, is also reduced. Therefore, the surface of the printed wiring board of the present invention is almost flat.

According to the printed wiring board of the present invention, in a printed wiring board having a conductor layer including a single line pattern and a solid pattern, and an insulating layer covering the conductor layer, the solid pattern has a single line pattern thickness. Thinner than the thickness of.

In this printed wiring board, the thickness of the solid pattern is smaller than the thickness of the single line pattern. Therefore,
The bulge on the surface of the insulating layer on the solid pattern is correspondingly small. For this reason, the height difference on the surface of the insulating layer, which has occurred on the single line pattern and the solid pattern, is also reduced. Therefore, the surface of the printed wiring board of the present invention is also almost flat.

According to the printed wiring board of the present invention, in the printed wiring board having the conductor layer including the single line pattern and the solid pattern, and the insulating layer covering the conductor layer, the solid pattern has slits formed therein. .

In this printed wiring board, a slit is formed in the solid pattern. Therefore, the volume per unit area of the solid pattern is smaller than the volume per unit area of the single line pattern. As a result, the bulge on the surface of the insulating layer on the solid pattern is correspondingly small. For this reason, the height difference on the surface of the insulating layer, which has occurred on the single line pattern and the solid pattern, is also reduced. Therefore, the surface of the printed wiring board of the present invention is also almost flat. In addition,
The volume per unit area of the solid pattern having the slit is calculated by dividing the volume of the solid pattern by the area of the solid pattern including the slit portion.

Further, according to the method of manufacturing a printed wiring board of the present invention, a printed wiring board is manufactured in which a conductor layer including a single line pattern and a solid pattern is formed, and then an insulating layer covering the conductor layer is formed. In the method, after forming a single line pattern and a solid pattern, a process for reducing the volume per unit area of the solid pattern to less than the volume per unit area of the single line pattern is performed, and then the insulating layer is formed.

In this method of manufacturing a printed wiring board, first, a single line pattern and a solid pattern are formed in one conductor layer. The formation of the single line pattern and the solid pattern may be performed by a known method such as a subtractive process. At this time, the volume per unit area of the single line pattern is the same as the volume per unit area of the solid pattern. Next, the volume per unit area of the solid pattern is made smaller than the volume per unit area of the single line pattern.

Then, an insulating layer is formed on the single line pattern and the solid pattern. For this reason, since the single line pattern and the solid pattern are covered with the insulating layer, the single line pattern and the solid pattern are insulated from other portions. The insulating layer is formed by laminating a film-like interlayer insulating material and then pressing, or by applying a liquid interlayer insulating material using a roll coater and then drying it. When the insulating layer is formed, the volume of the solid pattern per unit area is reduced, so that the insulating layer formed on the solid pattern enters the reduced volume. Thereby, the swelling of the surface of the insulating layer on the solid pattern is reduced. On the other hand, the insulating layer formed on the single line pattern hardly changes. For this reason, the height difference on the surface of the insulating layer, which has occurred on the single line pattern and the solid pattern, is reduced. Accordingly, a printed wiring board having an insulating layer which can be regarded as almost flat is manufactured.

Here, as a process for making the volume of the solid pattern smaller than the volume of the single line pattern, for example, the following method can be mentioned.

First, there is a method in which only the solid pattern is reduced in thickness by etching so that the volume per unit area of the solid pattern is smaller than the volume per unit area of the single line pattern. Specifically, only the solid pattern may be selectively etched after masking the single line pattern. Thereby, the thickness of the solid pattern becomes smaller than the thickness of the single line pattern, and the volume per unit area of the solid pattern becomes smaller than the volume per unit area of the single line pattern. Note that the etching here is a process performed to reduce the thickness of the conductive material of the solid pattern, and is not a process of removing all of the conductive material of the solid pattern.

Next, there is a method of forming a slit in the solid pattern so that the volume per unit area of the solid pattern is smaller than the volume per area of the single line pattern. Here, although one slit may be formed in the solid pattern, it is preferable to form a plurality of slits if possible. This is because the volume of the solid pattern can be further reduced. When a plurality of slits are formed, it is preferable that the slits are formed so as not to cross each other.
This is because, when the slits intersect with each other, air escape during the formation of the insulating layer becomes worse. The slit may be formed together when forming the solid pattern,
The slit may be formed after the solid pattern is formed.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments embodying a printed wiring board and a method of manufacturing the same according to the present invention will be described below in detail with reference to the drawings.

First, a wiring pattern (conductor pattern) including a single line pattern and a solid pattern is formed on a substrate. Therefore, a copper-clad laminate obtained by laminating a copper foil on a resinous insulating base material is prepared and used as a starting material. The copper foil of the copper-clad laminate is etched in a pattern by a known subtractive process. Then, as shown in FIG. 1, a single line pattern 3 (copper) and a solid pattern 4 (copper) having a predetermined shape are formed on the substrate 2. The line width W of the single line pattern 3 is about 100 μm, and the interval S between the single line pattern 3 and the solid pattern 4 is about 2 mm. The solid pattern 4 has an area of about 1 cm ² . At this time, the thickness of the single line pattern 3 and the thickness of the solid pattern 4 are the same, and the thickness of the copper foil is about 12 μm.
m, a copper plating layer having a thickness of about 15 μm is formed thereon to have a thickness of about 27 μm.

Next, only the solid pattern 4 is etched to reduce the thickness of the solid pattern 4. Specifically, an etching resist is formed on the single line pattern 3, and the solid pattern 4 is etched using a copper (II) chloride solution. Then, as shown in FIG. 2, the solid pattern 4 becomes thinner than the single line pattern. Here, when a through hole is formed in the printed wiring board, an etching resist is also formed on a portion of the through hole where the lid is plated, so that the portion of the lid plating is not etched.
This is because the portion of the through-hole that is covered with the lid is thin, and if this portion is etched, conduction may not be obtained. The single line pattern 3 may be etched together with the solid pattern 4 without forming an etching resist on the single line pattern 3.
It is preferable to selectively etch only.

In the present embodiment, the thickness of the solid pattern 4 is reduced from about 27 μm to about 17 μm by etching. Therefore, the solid pattern 4 is larger than the single line pattern 3.
Is about 10 μm thinner.

Here, instead of etching the solid pattern 4, several slits 8 may be provided in the solid pattern 4, as shown in FIG. By providing such a slit 8 in the solid pattern 4, the solid pattern 4
Can be made smaller than the volume per unit area of the single line pattern 3.

Subsequently, the adhesive dry film is laminated on the substrate 2. Lamination is performed by mixing a resin or a matrix with a solvent or a curing agent, and further dispersing a fine filler such as silica. Less than,
This is called "DFA". The specific composition is as follows. Resin matrix: 40 to 50 parts by weight of bisphenol A type epoxy resin 50 to 60 parts by weight of phenol novolak type epoxy resin Solvent: 30 to 50 parts by weight based on MEK (methyl ethyl ketone) resin matrix 100 Curing agent: imidazole Curing agent resin matrix 100
・ Filler: 15 to 25 parts by weight based on 100 parts of acicular filler or spherical filler resin matrix

A 50 μm thick DFA film is laminated on the substrate 2. The laminating step is performed by using a laminated film in which a DFA film is sandwiched between a base film and a cover film having good releasability, and pressure-bonding the substrate to the substrate from a surface on the base film side while peeling the cover film. The base film is also removed later. Laminating conditions are as follows: laminating speed: 0.5 to 3.0 m / min; laminating temperature: about 70 ° C .; laminating pressure: about 600 kPa. After lamination, the state shown in FIG. 4 is obtained. In this state, the single line pattern 3 and the solid pattern on the substrate 2 are covered with the DFA layer 6. Since the solid pattern 4 is thinner than the single line pattern 3, the swelling of the DFA layer 6 on the solid pattern 4 is also small. Therefore, the surface of the DFA layer 6 on the single line pattern 3 and the solid pattern 4 does not have much difference in height, and the DFA layer 6 is laminated in a substantially flat state.

Next, pressing is performed on the substrate 2 after the lamination process. This pressing step is performed by sandwiching the substrate 2 on which the DFA layer 6 is laminated using a pair of stainless steel plates at a higher temperature and a higher pressure than at the time of lamination. The pressing conditions are as follows: ・ Press temperature: 100 to 200 ° C. ・ Press pressure: 700 to 2000 kPa ・ Press time: 10 minutes to 20 hours When pressed, the state shown in FIG. 5 is obtained. In this state, the surface of the DFA layer 6 is in a flat state with no height difference. At this point, the DFA layer 6 is in a state where the solvent content has been reduced to about 1.5 parts by weight. Therefore, compared to the state shown in FIG. 4, the volume shrinks, and the thickness at a portion where there is no single line pattern 3 or a solid pattern is about 40 μm. The DFA layer 6 in this state is in a semi-cured state in which the viscosity is increased as compared to before the pressing.

Finally, in order to completely cure the semi-cured DFA layer 6, main drying is performed by a known method.
After the final drying step, the DFA layer 6 loses all the contained solvent and is completely cured, and becomes the interlayer insulating layer 7 (see FIG. 6).
Therefore, the flattened D by the press shown in FIG.
While the surface of the FA layer 6 is maintained, this is
Surface. The height difference of the unevenness on this surface is about 15 μm at the maximum, which is within a range that causes no problem. Thus, a printed wiring board having a flat surface insulating layer shown in FIG. 6 is manufactured. When the solid pattern 4 is provided with the slits 8 as shown in FIG. 3, the printed wiring board shown in FIG. 7 is manufactured. Also in this printed wiring board, the surface of the interlayer insulating layer 7 is flat.

As described above in detail, according to the method of manufacturing a printed wiring board according to the present embodiment, the DFA layer 6
Before laminating on the single line pattern 3 and the solid pattern 4, only the solid pattern 4 was etched to make the thickness of the solid pattern 4 thinner than that of the single line pattern 3, so that the DFA layer 6 was laminated. After that, the height difference generated on the surface of the DFA layer 6 is reduced. Therefore, it is possible to manufacture a printed wiring board whose surface can be regarded as a substantially flat surface, and it is possible to form an upper layer pattern and the like with high dimensional accuracy and good adhesion, thereby contributing to an improvement in the yield rate. .

The above-described embodiment is merely an example, and does not limit the present invention. Therefore, naturally, the present invention can be variously modified and modified without departing from the gist thereof. For example, in the above embodiment, the volume of the solid pattern 4 is made smaller than the volume of the single line pattern 3 by etching the solid pattern 4, but the same can be achieved by adjusting the plating conditions. That is, separate plating leads and power supplies for the single line pattern 3 and the solid pattern 4 are provided separately, and the magnitude of the current flowing in the single line pattern 3 and the magnitude of the current flowing in the solid pattern 4 during the plating process are changed. Specifically, the current flowing through the single line pattern 3 is made larger than the current flowing through the solid pattern 4. Thereby, the thickness of the plating layer attached to the single line pattern 3 becomes thicker than the thickness of the plating layer attached to the solid pattern 4. Therefore, the volume of the solid pattern 4 is smaller than the volume of the single line pattern 3. Therefore, the same effect as that described in the above embodiment can be obtained, and a printed wiring board having an insulating layer with a flat surface can be manufactured.

In the above embodiment, a copper (II) chloride solution is used as an etching solution, but a sulfuric acid hydrogen peroxide solution or the like may be used.

[0030]

As described above, according to the present invention, there is provided a printed wiring board for reducing a height difference generated on the surface of an insulating layer and a method for manufacturing the same.

[Brief description of the drawings]

FIG. 1 is a diagram showing a state where a wiring pattern is formed on a substrate.

FIG. 2 is a diagram showing a state where only a solid pattern is etched.

FIG. 3 is a diagram showing a state in which a slit is provided in a solid pattern.

FIG. 4 is a diagram showing a state in which a DFA film is laminated to cover a wiring pattern.

FIG. 5 is a view showing a state in which the DFA film is semi-cured by pressing and flattened.

FIG. 6 is a view showing a printed wiring board manufactured by the method for manufacturing a printed wiring board according to the present invention.

FIG. 7 is a diagram showing a printed wiring board manufactured by a method of providing a slit in a solid pattern.

FIG. 8 is a view showing a printed wiring board manufactured by a conventional method for manufacturing a printed wiring board.

[Explanation of symbols]

 2 Substrate 3 Single line pattern 4 Solid pattern 6 DFA layer 7 Interlayer insulating layer 8 Slit

Claims (6)

[Claims] 1. A printed wiring board having a conductor layer including a single line pattern and a solid pattern, and an insulating layer covering the conductor layer, wherein a volume per unit area of the solid pattern is a unit area of the single line pattern. A printed wiring board having a smaller volume per hit. 2. A printed wiring board having a conductor layer including a single line pattern and a solid pattern, and an insulating layer covering the conductor layer, wherein the thickness of the solid pattern is smaller than the thickness of the single line pattern. A printed wiring board characterized by the above. 3. A printed wiring board having a conductor layer including a single line pattern and a solid pattern, and an insulating layer covering the conductor layer, wherein a slit is formed in the solid pattern. Board. 4. A method for manufacturing a printed wiring board, wherein a conductor layer including a single line pattern and a solid pattern is formed, and then an insulating layer covering the conductor layer is formed. Forming the insulating layer after performing a process of reducing the volume per unit area of the solid pattern to be smaller than the volume per unit area of the single line pattern after the formation. . 5. The method of manufacturing a printed wiring board according to claim 4, wherein only the solid pattern is reduced in thickness by etching to reduce the volume per unit area of the solid pattern per unit area of the single line pattern. A method for manufacturing a printed wiring board, wherein the volume is smaller than the volume of the printed wiring board. 6. The method for manufacturing a printed wiring board according to claim 4, wherein a volume per unit area of the solid pattern is reduced by forming a slit in the solid pattern. A method for producing a printed wiring board, characterized in that the printed wiring board is made smaller.