JP2001121500A - Sealed semiconductor device and manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a sealed semiconductor device with high sealing degree. SOLUTION: This device is made to have a structure in which an n type reversal part 35 is provided on a part of a surface layer of a p type frame part 30 and a p+ type electric circuit 36 is provided on the n type inversion part 35. The p+ type electric circuit 36 is connected by a bridge 501 constituted of each p type electrode 32 and each metallic film. The p type frame part 30 and the p type electrode 32 are insulated across a groove part 600 and the p type electrode 32 is electrically connected with the p+ type electric circuit 36. The p type frame part 30 is formed by p type silicon, the n type inversion part 35 is inverted to an n type in conductivity by impurity and the p+ type electric circuit 36, is further made a p+ type by impurity. Because both of the n type inversion part 35 and the p+ type electric circuit 36 are formed in the vicinity of the surface layer of the p type frame part 30 in injection of impurity, the smoothness degree is extremely good, and projection and collapse may be neglected. Therefore, a joining with extremely excellent airtightness can be performed at the time of jointing with a cover part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a cavity formed by a semiconductor fine processing technique and shielded from the outside air. As a semiconductor device to which the present invention can be applied, for example, a vibration type detector serving as an angular velocity detector or an acceleration detector is assumed. Further, the present invention is suitable for, for example, a so-called SOI substrate, that is, a three-layer structure of a substrate, an insulating layer, and semiconductor silicon.

[0002]

2. Description of the Related Art FIG. 16 is a plan view showing a conventional vibration type detector 100. The vibration-type detector 100 uses a three-layer structure of a substrate, a sacrificial layer, and a conductive semiconductor layer, and mainly processes a conductive semiconductor layer to form a main part, and then partially removes the sacrificial layer. It is manufactured by forming a movable part and an electrode by removing the movable part.

In the vibration type detector 100 shown in FIG. 16, electrodes 80, 81, 82, 83, 84 and 85 and anchor portions 511, 512, 521, 522, 531 and 532,
A sacrificial layer remains under 541 and 542, and the substrate 1
It is fixed to. Other portions have the sacrificial layer removed and float from the substrate 1, and the comb electrodes 70, 71, 72, 7
3, 74 and 75 are electrodes 80, 81, 82, 83, 84
And 85, but other mass parts 10, beams 21, 22, 23 and 24, 410, 411 and 4
12, 420, 421 and 422, 430, 431 and 432, 440, 441 and 442, the links 301 and 302, 311, 312, 313 and 314, and the comb electrodes 60, 61, 62 and 63 correspond to the x-axis of FIG. It is possible to vibrate in the direction (vertical direction in the drawing) and the y-axis direction (horizontal direction in the drawing).

A vibration type detector 100 as shown in FIG.
By exciting in the axial direction and detecting the displacement due to the Coriolis force generated in the y-axis direction, it is possible to detect the angular velocity that is a factor of the Coriolis force. Specifically, the electrode 80
And 83 to apply an AC potential to excite the movable portion in the x-axis direction by electrostatic force between the comb electrodes 70 and 60 and between the comb electrodes 73 and 63. At this time, if an angular velocity Ω occurs around the z-axis, a displacement occurs in the y-axis direction due to the Coriolis force. Here, the displacement due to the Coriolis force generated in the y-axis direction from the change in the capacitance between the comb electrodes 61, 71 and 74 or the change in the capacitance between the comb electrodes 62, 72 and 75 is detected. Is what you do.

FIG. 17 shows an outline of a manufacturing process of the vibration type detector 100. As shown in FIG. 17A, a three-layer structure (SOI substrate) of a substrate 1, an insulating layer (sacrifice layer) 2 made of silicon dioxide, and a semiconductor layer 3 made of conductive silicon is prepared. Next, as shown in FIG. 17B, a mask is formed with undoped silicate glass (hereinafter referred to as USG) 4. Next, a trench is formed by reactive ion etching (RIE), and the sacrificial layer 2 is etched therefrom to form the movable portion 3.
1 and an electrode 32 are formed. By forming the movable portion 31 in a beam shape or a lattice shape, the lower sacrificial layer 2 can be removed.

[0006]

The vibration-type detector 100 shown in FIG. 16 is designed so that the movable portion is not affected by the surrounding viscosity.
It is desirable to keep in vacuum. Alternatively, in order to prevent deterioration due to ingress of water and oxidation, it is desirable to hold in argon or nitrogen. Thus, for example, a can package as shown in FIG. 18 has been held in vacuum or in argon or nitrogen. That is, the base 90 and the lid 9
This is intended to be hermetically sealed with a package having the electrode 1 and the electrode 92.

However, when the vibration-type detector 100 is manufactured by a semiconductor fine processing technique, dicing for separating each element is required. At this time, the main parts (movable parts and electrodes) were sometimes destroyed by the cooling water and the washing water, and the yield was poor. In addition, it is necessary to mount the elements one by one on a can package, and the operation cost is high.

The SOI substrate has a substrate 1 made of silicon having a thickness of 500 μm and an insulating layer (sacrifice layer) 2 made of silicon dioxide.
Is 2 to 4 μm, and the semiconductor layer 3 made of conductive silicon is 10 μm.
Some are commonly used. In the vibration type detector as shown in FIG. 1, the comb electrodes 60, 61, 62 and 63,
In addition, the entirety of 70, 71, 72, 73, 74, and 75 needs to be conductive, and it is desirable that the semiconductor layer 3 be entirely conductive in the first place as the SOI substrate. After the main part is formed, if the comb electrode part is doped with impurities to a depth of 10 μm, the level difference from the undoped part will be
An extremely large bump of about 300 nm occurs. Then, for example, a frame portion made of the conductive semiconductor layer 3 is formed so as to surround the main portion (the movable portion and the electrode) so as to surround the main portion (the movable portion and the electrode). It has been difficult to form a highly airtight junction while forming a layer.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to process a three-layer structure including a substrate, an insulating layer, and a conductive semiconductor layer, and bond the lid. An object of the present invention is to provide a hermetically sealed semiconductor device having a structure capable of separating each element after being made, and a manufacturing method thereof.

[0010]

According to a first aspect of the present invention, there is provided a semiconductor device having a three-layer structure including a substrate, an insulating layer, and a conductive semiconductor layer. After the frame portion of the conductive semiconductor layer and the main portion made of the conductive semiconductor layer are formed inside the frame portion, the lid portion is joined to the frame portion of the conductive semiconductor layer to connect with the outside. In a sealed semiconductor device in which a cavity is formed so as to maintain airtightness, a main portion and an external portion are provided on a surface layer of a frame portion of a conductive semiconductor layer to electrically connect the main portion and the outside, and the conductive semiconductor layer is provided. Is characterized by having at least one electric circuit portion electrically isolated from other portions of the frame portion.

According to a second aspect of the present invention, the electric circuit portion is of the same conductivity type as the conductive semiconductor layer or a conductive type having more carriers, and the electric circuit portion and the frame portion of the conductive semiconductor layer are different from each other. Are separated by a semiconductor layer of a conductivity type opposite to those of those conductivity types.

Further, the invention according to claim 3 is characterized in that a main part has a movable part formed by processing a conductive semiconductor layer. The invention described in claim 4 is characterized in that the movable portion is displaced by the electric power supplied by the electric circuit portion, or the displacement of the movable portion is transmitted to the outside by the electric circuit portion as an electric signal.

According to a fifth aspect of the present invention, there is provided an electrode for displacing a movable portion by electric power supplied by an electric circuit portion, or an electrode for transmitting the displacement of the movable portion as an electric signal to the outside by an electric circuit portion. Are electrically connected to the electric circuit portion and formed separately from the frame portion of the conductive semiconductor layer. Further, the invention described in claim 6 is:
The electrode is separated from the frame of the conductive semiconductor layer by a groove formed in the conductive semiconductor layer, and the electrode is
It is characterized in that it is electrically connected to the electric circuit portion by a conductive material formed on the upper portion of the groove. Here, an insulating material may be buried in the groove, or it may be simply a void. The conductive material may be a metal or any other conductive material.

According to a seventh aspect of the present invention, the conductive semiconductor layer is made of conductive silicon, at least the joint surface of the lid is made of glass, and the frame of the conductive semiconductor layer is made of silicon. And a lid portion having at least a bonding surface portion made of glass. Further, the invention according to claim 8 is characterized in that the three-layer structure including the substrate, the insulating layer, and the conductive semiconductor layer is an SOI substrate.

According to the ninth to sixteenth aspects of the present invention,
A method for manufacturing a semiconductor device according to the present invention. That is, the invention described in claim 9 corresponds to the invention described in claim 1 and has the following configuration. By processing a three-layer structure of a substrate, an insulating layer, and a conductive semiconductor layer, a frame portion of the conductive semiconductor layer and a main portion formed of the conductive semiconductor layer inside the frame portion are formed. In the method of manufacturing a sealed semiconductor device in which a hollow portion is formed so as to keep airtight with the outside by joining and forming a lid portion to a frame portion of the conductive semiconductor layer, The main part and the outside are electrically connected, and at least one electric path part electrically isolated from the other part of the frame part of the conductive semiconductor layer is provided.

The invention described in claim 10 corresponds to the invention described in claim 2. That is, a part of the surface of the conductive semiconductor layer is implanted with an impurity opposite to the conductivity type to form a semiconductor layer of the opposite conductivity, and a part of the surface of the semiconductor layer of the opposite conductivity is made conductive. An impurity is implanted so as to be of the conductivity type of the semiconductor layer to form an electric circuit portion.

The invention described in claim 11 corresponds to the invention described in claim 3. That is, the method includes a step of forming a movable portion by processing a conductive semiconductor layer as a main portion. The invention described in claim 12 corresponds to the invention described in claim 4. That is, the movable portion is formed so as to be displaced by electric power supplied by the electric circuit portion, or to be transmitted to the outside by the electric circuit portion as a displacement of the movable portion as an electric signal.

The invention described in claim 13 corresponds to the invention described in claim 5. That is, an electrode for displacing the movable portion by the electric power supplied by the electric circuit portion, or an electrode for transmitting the displacement of the movable portion as an electric signal to the outside by the electric circuit portion is electrically connected to the electric circuit portion. And is formed separately from the frame portion of the conductive semiconductor layer. Further, the invention according to claim 14 corresponds to the invention according to claim 6, wherein the electrode is separated from the frame of the conductive semiconductor layer by forming a groove in the conductive semiconductor layer. In addition, the electrode and the electric circuit portion are electrically connected by forming a conductive material on the upper portion of the groove portion. Here, an insulating material may be buried in the groove, or it may be simply a void. The conductive material may be a metal or any other conductive material.

The invention described in claim 15 corresponds to the invention described in claim 7. That is, it is characterized by being manufactured by joining a frame portion of a conductive semiconductor layer made of silicon and a lid portion having at least a joining surface portion made of glass by anodic bonding.

[0020] The invention according to claim 16 is the invention according to claim 7.
Corresponds to the invention described in (1). That is, SO as a three-layer structure
It is characterized by using an I substrate.

[0021]

An electric circuit portion is provided on the surface of the frame portion of the conductive semiconductor layer, which is electrically isolated from other portions of the frame portion of the conductive semiconductor layer. The hermetic semiconductor device can be easily formed by bonding (claims 1 and 9). Here, the provision of the electric circuit portion on the surface layer means that a part of the frame portion of the conductive semiconductor layer is formed into an electric circuit portion by devising a change in conductivity, such as forming a metal conductor film. do not do. In this method of manufacturing a sealed semiconductor device, each element can be sealed before dicing, so that cooling water or cleaning water during dicing does not come into contact with a main part inside the sealed interior. Therefore, the yield can be increased as a method of manufacturing the element (claim 9).

The electric circuit portion has the same conductivity type as that of the conductive semiconductor layer or a conduction type having more carriers, and the electric circuit portion and the frame portion of the conductive semiconductor layer are formed of a semiconductor having a conductivity type opposite to the conductivity type. Since they are isolated by the layer, the hermetic semiconductor device can be easily formed by joining with the lid (claims 2 and 10). Also in this case, the electric circuit portion provided on the surface layer of the conductive semiconductor layer and the semiconductor layer of the opposite conductivity type separating the conductive semiconductor layer form a part of the frame portion of the conductive semiconductor layer. This means that the electric circuit portion is formed by contrivance such as changing the length of the circuit, and does not mean that an insulator film is formed.

In such a semiconductor device, if the movable portion and the electrode are formed separately from the frame portion of the semiconductor layer in a hermetically closed cavity and connected to the outside by an electric circuit portion, for example, a vibration type detector can be easily formed. It can be formed (claims 3 to 5, claims 11 to 13). If the sealed cavity is kept in a vacuum or filled with an inert gas such as argon or nitrogen, the characteristics as a semiconductor device can be stabilized,
The life can be extended.

Since the semiconductor layer is made of silicon and at least the front part of the joint of the lid is made of glass, the joint between the lid and the frame of the semiconductor layer can be made to be anodic-bonded, so that the hermetic type having high airtightness can be easily obtained. It can be a semiconductor device (claims 7 and 14). Furthermore, if the main part and the electrode are formed from the SOI substrate, the conductive electrode can be formed only by etching, and the productivity can be improved (claims 8 and 16).

In the hermetically sealed semiconductor device as described above, after a plurality of elements are formed on a substrate having a three-layer structure, an integrated lid can be joined and then divided into individual elements.
It is suitable for mass production and can significantly reduce production costs.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiments.

[First Embodiment] FIG. 1 is a perspective view (partly in section) showing the structure of a main part of a vibration type detector 1000 according to a first embodiment of the present invention. FIG. 2 is a sectional view of a portion indicated by II in FIG. FIG.
FIG. 4 is a plan view showing the entirety (body part 300) of the vibration-type detector 1000 except for a lid part 700. The body portion 300 of the vibration detectors 1000 in FIG. 3, the vibration detectors 100 of Figure 16, the frame part 30 of the p-type is provided, the n-type six inverted portion 35 and p ⁺ -type path 36 Then, six p ⁺ -type electric paths 36 are formed at respective bridges 50 made of a tungsten film.
1 are connected to p-type electrodes 80 to 85, respectively. The p-type electrodes 80 to 85 in FIG.
Represents the electrode 32.

This will be described below with reference to FIG. Vibration detector 1
000 of the main body 300, a reversing section 35 of the n-type formed in a part of the surface layer of the p-type frame part 30, a structure in which a p ⁺ -type path 36 to the inverting portion 35 of the n-type, p ⁺ The electric circuit 36 is connected to the p-type electrode 32 by a bridge 501 made of a tungsten film. As shown in FIG. 1, the p-type frame portion 30 and the p-type electrode 32 are insulated from each other with a groove 600 therebetween, and the p-type electrode 32 is electrically connected only to the p ⁺ -type electric circuit 36. . The p-type frame portion 30 is made of p-type silicon, and the n-type inversion portion 35
The conductivity is inverted to that of the mold, and the p ⁺ -type electric path 36 is further turned to p ⁺ -type by impurities. As shown in FIG.
The implantation of the impurity is performed by the n-type inversion section 35 and the p ⁺ -type electric circuit 3.
6 is performed near the surface layer of the p-type frame portion 30, the smoothness thereof is extremely good, and the protrusion or depression may be ignored. Therefore, in the joining with the lid 700, an extremely airtight joining can be performed.

4 to 6 show an example of a manufacturing process of the vibration detector 1000. FIG. 4 to 6 are greatly simplified schematic diagrams.

FIG. 4 shows the main body 3 of the vibration type detector 1000.
00 manufacturing process. A three-layer structure (SOI substrate) of a substrate 1, an insulating layer (sacrifice layer) 2 made of silicon dioxide, and a p-type silicon layer 3 is prepared (FIG. 4A). Next, a part of the p-type silicon layer 3 is doped with an n-type impurity to form an n-type inversion part 35 (FIG. 4B). Further, a part of the surface layer of the n-type inversion portion 35 is doped with a p-type impurity to form a p ⁺ -type electric path 36 (FIG. 4C).

Next, USG 400 is formed as a mask for trench etching (FIG. 4D), and a trench (groove) 600 is formed (FIG. 4E). Since it is necessary to temporarily fill the trench 600 to form a tungsten film bridge, a silicon nitride film 401 is formed on one surface (FIG. 4).
(F)), and then removed to leave the silicon nitride 402 only in the groove 600 (FIG. 4G). Thus, the silicon nitride 40
2 to form a tungsten film bridge 501,
The p ⁺ -type electric path 36 is electrically connected to a portion of the p-type silicon layer 3 where an electrode is to be formed. An electrode pad 500 is formed on the outside of the p ⁺ type electric circuit 36 (FIG. 4H).

Next, USG 403 is formed (FIG. 4I) as a trench etching mask for forming a movable portion, a comb electrode, and the like, and a trench (groove) 610 is formed (FIG. 4J). . After that, a sacrificial layer 2 made of silicon dioxide
And silicon nitride 40 under tungsten film bridge 501
By removing 2 by etching, the main body 300 is formed. The main body 300 includes a frame 3 made of p-type silicon.
A ^{p.sup. +} -Type electric path 36 isolated by an n-type inversion part 35 is formed at 0, and has a fixed electrode 32 made of p-type silicon and a movable part inside a frame part 30 made of p-type silicon. .

FIG. 5 shows the cover 70 of the vibration type detector 1000.
0 manufacturing process. USG4 on silicon substrate 701
04 (FIG. 5 (a)) and USG40 by RIE.
4 is removed (FIG. 5B). USG4 after etching the silicon substrate 701 by anisotropic etching
04 is removed to form a bump for bonding (FIG. 5 (c)).
Next, glass is sputtered on the entire surface of the silicon substrate 701 on which the bonding protrusion is provided. Thus, the lid 700
Is formed (FIG. 5D).

FIG. 6 is a process diagram showing the joining and dicing of the main body 300 and the lid 700 of the vibration detector 1000. With the joining surface of the lid 700 being downward from above the main body 300, the raised portion of the lid 700 and the frame 30 made of p-type silicon of the main body 300 are anodically joined (FIG. 6).
(A)). Next, the joined lid portion 700 and main body portion 300 are diced for each element, and wire-bonded 502 to the electrode pad 500 to thereby form the vibration detector 1000.
Is formed.

[Second Embodiment] FIG. 7 is a perspective view (partly in section) showing a structure of a main part of a vibration type detector 1100 according to a second embodiment of the present invention. FIG. 8 is a cross-sectional view of a portion indicated by VII-VII in FIG. FIG. 9 is a plan view showing the whole (main body 310) of the vibration-type detector 1100 excluding the lid 710. The body portion 310 of the vibration detectors 1100 in FIG. 9, the vibration detectors 100 of Figure 16, the frame part 30 of the p-type is provided, the n-type six inverted portion 35 and p ⁺ -type path 36 Then, six p ⁺ -type electric paths 36 are formed at respective bridges 50 made of a tungsten film.
3 are connected to the p-type electrodes 80 to 85, respectively. The p-type electrodes 80 to 85 in FIG.
Represents the electrode 32.

This will be described below with reference to FIG. Vibration detector 1
100, an inverting portion 35 of the n-type formed in a part of the surface layer of the p-type frame part 30, a structure in which a p ⁺ -type path 36 to the inverting portion 35 of the n-type, p ⁺ -type path 36 Is a p-type electrode 3
2 and a bridge 503 made of a tungsten film. Bridge 50 made of tungsten film
3, a lower space between the p-type frame portion 30 and the p-type electrode 32 is occupied by the insulating material 38. The insulating material 38 may be single or may be filled with a semiconductor or the like after forming an insulating film.

The p-type electrode 32 is electrically connected only to the p ⁺ -type electric circuit 36. The p-type frame portion 30 is made of p-type silicon, the n-type inversion portion 35 has conductivity inverted to n-type by impurities, and the p ⁺ -type electric circuit 36 is further converted to p ⁺ type by impurities. Has become. As shown in FIG. 8, the impurity is implanted because both the n-type inversion part 35 and the p ⁺ -type electric path 36 are formed near the surface layer of the p-type frame part 30, and the smoothness thereof is extremely good. Uplift or depression is negligible. Therefore, in the joining with the lid 700, an extremely airtight joining can be performed.

FIGS. 10 to 12 show a vibration type detector 110.
0 shows an example of the manufacturing process. 10 to 12 are greatly simplified schematic diagrams.

FIG. 10 shows a manufacturing process of the main body 310 of the vibration type detector 1100. A three-layer structure (SOI substrate) including a substrate 1, an insulating layer (sacrifice layer) 2 made of silicon dioxide, and a p-type silicon layer 3 is prepared (FIG. 10A). Then n
The n-type inversion part 35 is formed by doping a part of the p-type silicon layer 3 with a p-type impurity (FIG. 10B).

Next, USG 400 is formed as a mask for trench etching (FIG. 10C), and a trench (groove) 600 is formed (FIG. 10D). Since it is necessary to fill the trench 600 to form a tungsten film bridge, the entire surface layer is oxidized to form an oxide film 409 (FIG. 10E). Next, the polysilicon 39 is buried in the groove portion 600 covered with the oxide film 409, and is smoothed, and the oxide film 409 covering the semiconductor layer 3 is removed (FIG. 10F).

Next, a part of the surface layer of the n-type inversion portion 35 is doped with a p-type impurity to form a p ⁺ -type electric path 36 (FIG. 10G). Next, polysilicon 39 and oxide film 409
A tungsten film bridge 503 is formed across the insulating material 38 made of p, and the p ⁺ -type electric path 36 and the p-type silicon layer 3 are formed.
Is electrically connected to the portion forming the electrode. An electrode pad 500 is formed on the outside of the p ⁺ type electric circuit 36 (FIG. 10H).

Next, USG 403 is formed as a trench etching mask for forming the movable portion and the comb-tooth electrode and the like (FIG. 10 (i)), and a trench (groove) 610 is formed (FIG. 10 (j)). . After that, if the sacrificial layer 2 made of silicon dioxide is removed by etching, the main body 310 is formed. The main body 310 includes a p ⁺ -type electric circuit 36 isolated by an n-type inversion section 35 in a frame 30 made of p-type silicon.
Is formed, and has a fixed electrode 32 made of p-type silicon and a movable portion inside a frame portion 30 made of p-type silicon.

FIG. 11 shows the cover 7 of the vibration type detector 1100.
00 manufacturing process. FIG. 11 shows the vibration type detector 1 of FIG.
000 lid 700 is the same as the manufacturing process. USG 404 is formed on a silicon substrate 701 (FIG. 11).
(A)), unnecessary portions of the USG 404 are removed by RIE (FIG. 11B). After etching the silicon substrate 701 by anisotropic etching, the USG 404 is removed to form a bump for bonding (FIG. 5C). Next, glass is sputtered on the entire surface of the silicon substrate 701 on which the bonding protrusion is provided. Thus, the lid 700 is formed (FIG. 11D).

FIG. 12 is a process diagram showing the joining and dicing of the main body 310 and the lid 700 of the vibration type detector 1100. With the joining surface of the lid 700 being downward from above the main body 310, the raised portion of the lid 700 is anodically joined to the frame 30 made of p-type silicon of the main body 310 (FIG. 6).
(A)). Next, the joined lid portion 700 and main body portion 310 are diced for each element, and wire-bonded 502 to the electrode pad 500, whereby the vibration type detector 1100 is formed.
Is formed.

[Modification] In the above embodiment, the p ⁺ -type electric circuit 36 also forms a bonding surface with the lid 700. In general, however, the anodic bonding of the p ⁺ -type silicon surface to the glass surface is a degree of adhesion. There is a difficulty in the point. FIGS. 13 and 14 show modified examples for the improvement.

FIG. 13 is a plan view and a sectional view showing a main part of a sealed semiconductor device according to a first modification. The p ⁺ -type electric path 36 is formed as a thin line near the joint surface with the lid 700. FIG. 14 is a plan view and a cross-sectional view illustrating a main part of a sealed semiconductor device according to a second modification.
The p ⁺ -type electric path 36 is formed in a lattice shape near the joint surface with the lid 700.

[Application Example] The sealed semiconductor device of the present invention comprises:
Suitable for batch mass production. An outline is shown in FIG. As shown in FIG. 15, a main body of a plurality of elements is formed on an SOI substrate to form a wafer 330. The lid 770 has a shape in which the lids of the plurality of elements are connected. After these are anodically bonded, the bonded wafer 330 and the lid 770 are bonded.
It is clear that individual sealed semiconductor devices can be obtained by dicing all together. As described above, according to the present invention, a hermetically sealed semiconductor device can be formed by batch processing, and a large component such as a can package is not used.

As can be understood from any of the embodiments described above, the sealed semiconductor device according to the present invention has a very small air-tightness due to anodic bonding, with very small protrusions or depressions at the bonding surface. Can be. In the method of manufacturing a sealed semiconductor device according to the present invention, dicing is performed after forming a lid, so that a sealed semiconductor device can be manufactured with extremely high yield without breaking internal movable parts and electrodes, and mass production can be performed in a large scale. can do. This also has the effect of stabilizing the characteristics of each sealed semiconductor device.

In the above embodiment, the cavity sealed by the lid and the SOI substrate may be evacuated, and may be filled with argon, nitrogen or other inert gas, or any fluid. When the movable part is held in a vacuum, the damping due to the viscous effect can be reduced, so the Q value is increased,
This is more preferable because the driving force (excitation power) can be reduced.

In the above embodiment, the connection between the electric path formed on the surface layer of the frame and the electrode is made of tungsten, but the metal film may be made arbitrarily. For example, in the case of an SOI substrate having p-type silicon, hydrofluoric acid (aqueuos HF) is generally used as an etchant for an insulating layer (sacrifice layer) made of silicon dioxide. , Cobalt, nickel, platinum, copper, gold and the like may be used.

In addition, the configuration of each layer in the above-described embodiment is merely an example, and each layer can be made of any appropriate material. In the above embodiment, an example using an SOI substrate having p-type silicon has been described. However, a semiconductor layer forming a main portion may be n-type silicon, or any other conductive semiconductor. Similarly, the insulating layer is not limited to silicon dioxide, and the substrate can be arbitrary.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a main part of a sealed semiconductor device according to a first specific example of the present invention.

FIG. 2 is a cross-sectional view showing a main part of the sealed semiconductor device according to the first specific example of the present invention.

FIG. 3 is a plan view of a sealed semiconductor device according to a first specific example of the present invention.

FIG. 4 is a first process chart showing an outline of a method of manufacturing a sealed semiconductor device according to a first specific example of the present invention;

FIG. 5 is a second process chart showing an outline of the method for manufacturing the sealed semiconductor device according to the first specific example of the present invention;

FIG. 6 is a third process chart showing an outline of the method for manufacturing the sealed semiconductor device according to the first specific example of the present invention;

FIG. 7 is a perspective view showing a main part of a sealed semiconductor device according to a second specific example of the present invention;

FIG. 8 is a sectional view showing a main part of a sealed semiconductor device according to a second specific example of the present invention;

FIG. 9 is a plan view of a sealed semiconductor device according to a second specific example of the present invention.

FIG. 10 is a first process chart schematically showing a method of manufacturing a sealed semiconductor device according to a second specific example of the present invention.

FIG. 11 is a second process chart showing an outline of a method for manufacturing a sealed semiconductor device according to a second specific example of the present invention;

FIG. 12 is a third process chart showing an outline of a method for manufacturing a sealed semiconductor device according to a second specific example of the present invention;

FIGS. 13A and 13B are a plan view and a cross-sectional view illustrating a main part of a sealed semiconductor device according to a first modification of the present invention. FIGS.

FIGS. 14A and 14B are a plan view and a cross-sectional view illustrating a main part of a sealed semiconductor device according to a second modification of the present invention.

FIG. 15 is a schematic view showing a step of mass-producing a large number of sealed semiconductor devices by applying the present invention.

FIG. 16 is a plan view showing the structure of a conventional vibration type detector.

FIG. 17 is a process chart showing an outline of a conventional method for manufacturing a vibration-type detector.

18A and 18B are a plan view and a cross-sectional view illustrating a package of a conventional vibration-type detector.

[Explanation of symbols]

100 Conventional Vibration Detector 60, 61, 62, 63 Movable Part Side Comb Electrode 70, 71, 72, 73, 74, 75 Fixed Part Side Comb Electrode 80, 81, 82, 83, 84, 85 Fixed Part Electrode 1 Substrate 2 Silicon dioxide insulating layer (sacrifice layer) 3 P-type silicon layer (conductive semiconductor layer) 30 Frame section 31 Movable section 32 Electrode 35 Inverting section 36 Electrical path section 38 Insulating material 39 Polysilicon 4, 400, 403, 404 USG mask 401, 402 Silicon nitride 409 Oxide film (SiO ₂ ) 500 Pad electrode 501, 503 Tungsten film bridge 600 Groove 701 Silicon substrate 702 Glass film

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Yoshiteru Omura 41-Cho, Yokomichi, Nagakute-cho, Aichi-gun, Aichi Prefecture Inside Toyota Central R & D Laboratories Co., Ltd. 41, Yokomichi, Toyota Central Research Laboratory Co., Ltd. (72) Inventor Motohiro Fujiyoshi 41, Yoji, Chukuji, Nagakute-cho, Aichi-gun, Aichi Prefecture 1, Toyota Motor Central Research Laboratories Co., Ltd. (72) Inventor Yutaka Nonomura Aichi No. 41, Nagakute-cho, Aichi-gun

Claims (16)

[Claims] A three-layer structure including a substrate, an insulating layer, and a conductive semiconductor layer is processed to form a frame portion of the conductive semiconductor layer and a conductive semiconductor layer inside the frame portion. And after forming the main portion consisting of, in the hermetic semiconductor device in which a cavity is formed to keep the airtight with the outside by joining the lid to the frame of the conductive semiconductor layer, At least one of the main portions provided on the surface of the frame portion of the semiconductor layer and electrically connected to the outside and electrically isolated from other portions of the frame portion of the conductive semiconductor layer. A hermetically sealed semiconductor device having two electric circuit portions. 2. The electric circuit portion is of the same conductivity type as the conductive semiconductor layer or a conduction type having more carriers, and the electric circuit portion and the frame portion of the conductive semiconductor layer are formed of the conductive type. 2. The hermetically sealed semiconductor device according to claim 1, wherein the hermetically sealed semiconductor device is isolated by a semiconductor layer of a conductivity type opposite to that of the semiconductor device. 3. The sealed semiconductor device according to claim 1, wherein the main portion has a movable portion formed by processing the conductive semiconductor layer. 4. The apparatus according to claim 3, wherein the movable portion is displaced by electric power supplied by the electric circuit portion, or the displacement of the movable portion is transmitted as an electric signal to the outside by the electric circuit portion. The sealed semiconductor device as described in the above. 5. An electrode for displacing the movable portion by electric power supplied by the electric circuit portion, or an electrode for transmitting the displacement of the movable portion as an electric signal to the outside by the electric circuit portion, Electrically connected to the electrical circuit,
5. The sealed semiconductor device according to claim 4, wherein the semiconductor device is formed separately from a frame portion of the conductive semiconductor layer. 6. The electrode is separated from a frame of the conductive semiconductor layer by a groove formed in the conductive semiconductor layer, and the electrode is formed by a conductive layer formed on the groove. The sealed semiconductor device according to claim 5, wherein the sealed semiconductor device is electrically connected to the electric circuit portion by a material. 7. The conductive semiconductor layer is made of conductive silicon, and at least a bonding surface portion of the lid is made of glass, and a frame portion of the conductive semiconductor layer made of silicon and the at least bonding surface portion. 7. The hermetically sealed semiconductor device according to claim 1, wherein the semiconductor device is joined to a lid made of glass. 8. The semiconductor device according to claim 1, wherein the three-layer structure including the substrate, the insulating layer, and the conductive semiconductor layer is an SOI substrate. The sealed semiconductor device as described in the above. 9. A three-layer structure of a substrate, an insulating layer, and a conductive semiconductor layer is processed to form a frame of the conductive semiconductor layer;
A sealed type in which a main portion made of a conductive semiconductor layer is formed inside the frame portion, and a lid portion is joined to the frame portion of the conductive semiconductor layer to form a cavity so as to keep airtight with the outside. In the method for manufacturing a semiconductor device, the main portion and the outside are electrically connected to a surface layer of the frame portion of the conductive semiconductor layer, and the other portion of the frame portion of the conductive semiconductor layer is A method for manufacturing a hermetically sealed semiconductor device, comprising providing at least one electrically isolated electrical path. 10. A part of the surface of the conductive semiconductor layer,
An impurity of the opposite conductivity type is implanted into a semiconductor layer of the opposite conductivity, and an impurity is implanted into a part of the surface of the semiconductor layer of the opposite conductivity so as to have the conductivity type of the conductive semiconductor layer. The method for manufacturing a sealed semiconductor device according to claim 9, wherein the electric circuit portion is formed by performing the following. 11. The sealed semiconductor device according to claim 9, further comprising a step of forming a movable portion by processing the conductive semiconductor layer as the main portion. Production method. 12. The movable portion is formed so as to be displaced by electric power supplied by the electric circuit portion or to transmit the displacement of the movable portion as an electric signal to the outside by the electric circuit portion. The method for manufacturing a sealed semiconductor device according to claim 11. 13. An electrode for displacing the movable portion with electric power supplied by the electric circuit portion, or an electrode for transmitting the displacement of the movable portion as an electric signal to the outside by the electric circuit portion, 13. The method of manufacturing a sealed semiconductor device according to claim 12, wherein the semiconductor device is electrically connected to an electric circuit portion and is formed separately from a frame portion of the conductive semiconductor layer. 14. The electrode is separated from a frame portion of the conductive semiconductor layer by forming a groove in the conductive semiconductor layer, and the electrode and the electric circuit portion are formed above the groove. The method for manufacturing a sealed semiconductor device according to claim 13, wherein the semiconductor device is electrically connected by forming a conductive material on the semiconductor device. 15. The manufacturing method according to claim 9, wherein the frame portion of the conductive semiconductor layer made of silicon and the lid portion having at least a bonding surface portion made of glass are bonded by anodic bonding. The method for manufacturing a sealed semiconductor device according to any one of the above items. 16. The method for manufacturing a sealed semiconductor device according to claim 9, wherein an SOI substrate is used as the three-layer structure.