JP2001110974A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve reliability by improving the pulling strength of a lead in a semiconductor device of a bottom lead type, and to improve the joint strength of a wire joint part at the lead side by wire bonding. SOLUTION: The semiconductor device consists of a tab 1e for supporting a semiconductor chip 2, a sealing part 3 that is formed while the semiconductor chip 2 is resin-sealed, a plurality of leads 1a that are arranged around the tab 1e and are provided with an inner part 1b being buried into the sealing part 3 and an outer part 1c being exposed inside the reverse side 3a of the sealing part 3, and a bonding wire 4 for electrically connecting a pad 2a of the semiconductor chip 2 and the leads 1a. The inner part 1b of the lead 1a is formed while being inclined to the tab 1e so that a covering part 3b for covering a surface 1d at the side to be packaged of the inner part 1b of the lead 1a out of the sealing part 3 becomes thinner toward the exposure direction of the lead 1a, thus improving the pull strength of the lead 1a from the sealing part 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technology, and more particularly to a technology effective when applied to improving the lead pull-out strength in a small bottom lead type semiconductor device.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
Upon completion, they were examined by the inventor, and the outline is as follows.

[0003] Resin-sealed CS for miniaturization and weight reduction
As an example of P (Chip Scale Package), QFN (Quad F
There is a small package called lat Non-leaded Package).

[0004] The QFN has a plurality of thin plate-shaped leads including an outer portion and an inner portion, and the outer portion is an area array terminal type arranged on the back surface (mounting surface) of the sealing portion. Things.

[0005] In the QFN, the outer portion is formed flat to secure a mounting area.

That is, the back surface of the sealing portion and the outer portion formed on the flat surface are formed on substantially the same surface (such a structure is hereinafter referred to as a bottom lead type).

[0007] For the structure of the QFN, for example,
It is described in Nikkan Kogyo Shimbun, March 1, 1997, "Surface Mount Technology 1997 / March Issue / Vol. 7, No. 3," p.

[0008]

However, in the QFN of the above-mentioned technology, since the leads are flat and short, the pull-out strength of the leads is not sufficient, so that the leads may fall off from the sealing portion. The lack of reliability poses a problem.

In addition, since it is necessary to ensure the amount of protrusion (stand-off) of the outer portion of the lead on the back surface of the sealing portion, molding using a film or polishing and deburring the lead surface is performed. Producing the outer portion of the lead from the back surface of the sealing portion is expensive, such as forming the standoff by plating after exposing the lead.

Further, as a measure for preventing the lead from being pulled out, a half-etching process is performed on the lead, thereby forming a step in the inner part to improve the pulling strength, or improving the pulling strength by forming an offset bend in the lead. Although measures have been devised to reduce the size, there is a problem that the external shape becomes large and the cost increases.

An object of the present invention is to provide a semiconductor device and a method of manufacturing the same, which improve the reliability by improving the pull-out strength of the lead and improve the bonding strength of the wire bonding portion on the lead side by wire bonding. is there.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0013]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the semiconductor device of the present invention comprises a tab for supporting a semiconductor chip, a sealing portion formed by sealing the semiconductor chip with a resin, and a periphery of the tab, wherein A plurality of leads each having an embedded inner portion and an outer portion exposed in a surface of the sealing portion on the semiconductor device mounting side, and electrically connecting a surface electrode of the semiconductor chip and the corresponding lead; And a connecting member that covers the inner surface of the lead on the mounting side of the lead in the sealing portion so that the lead becomes thinner toward the direction in which the lead is exposed. It is formed so as to be inclined from the end toward the outer part.

Thus, the stress at the time of pulling out the lead can be dispersed by the inclination of the lead, and therefore, the pull-out strength of the lead can be improved.

As a result, the reliability of the semiconductor device can be improved.

Further, a method of manufacturing a semiconductor device according to the present invention
The semiconductor device includes an inner portion embedded in a sealing portion of the semiconductor device and an outer portion exposed in a surface of the sealing portion on the semiconductor device mounting side, and is formed to be inclined from a chip side end toward the outer portion. A step of preparing a lead frame having a plurality of leads; a step of joining a tab of the lead frame to a semiconductor chip; and a surface electrode of the semiconductor chip and the inner part of the lead of the lead frame corresponding thereto. Electrically connecting the semiconductor chip with a connecting member, and sealing the semiconductor chip with a resin, so that a covering portion of the sealing portion covering a surface of the inner portion on a mounting side is thinner in a direction in which the leads are exposed. The lead is inclined from the chip side end toward the outer part, and the outer part is exposed in a surface on the semiconductor device mounting side to form the sealing part. And that step, and a step of separating a plurality of said leads from the frame portion of the lead frame.

[0018]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, members having the same functions are denoted by the same reference numerals, and the repeated description thereof will be omitted.

FIG. 1 shows a semiconductor device (QFN) according to the present invention.
FIG. 2 is a perspective view showing an example of the embodiment of the structure of FIG. 1, FIG. 2 is a sectional view showing the structure of the semiconductor device shown in FIG. 1, FIG. 3 is a bottom view showing the structure of the semiconductor device shown in FIG. And (b) are partial enlarged plan views showing the structure of the tab in the semiconductor device shown in FIG. 1, FIG. 5 is a manufacturing process flow chart showing an example of an embodiment of a method of manufacturing a semiconductor device according to the present invention, and FIG. 5 is a side view showing an example of the structure of a lead frame or a semiconductor device in each step shown in FIG. 5, (a) is a lead frame manufacturing step, (b) and (c) are die bonding steps,
FIG. 7D is a cross-sectional view showing an example of the structure of the semiconductor device in each step shown in FIG. 5A, FIG. 7A is a sealing step, FIG. 7B is a cutting step, and FIG. FIG.
FIGS. 2A and 2B are diagrams illustrating an example of a mounting state of the semiconductor device illustrated in FIGS. 1A and 1B on a mounting board, wherein FIG. 1A is a plan view and FIG.

The semiconductor device according to the present embodiment shown in FIGS. 1 to 3 is a small-sized, resin-sealed type and a surface-mount type. In this embodiment, Q is an example of the semiconductor device.
FN7 will be described.

The QFN 7 is a small package that is slightly larger than the semiconductor chip 2, has a relatively small number of pins, and is mainly incorporated in portable electronic equipment. As shown in FIG. A plurality of leads 1a that are electrically connected to board-side terminals of a mounting board 9 (see FIG. 8) such as a printed board are provided in a surface on the semiconductor device mounting side (hereinafter, referred to as a back surface 3a) of the sealing portion 3 formed by the above. Area array type in which the outer portion 1c is arranged.

The semiconductor chip 2 incorporated in the QFN 7 is, for example, a microcomputer, a logic, an ASIC (Ap
application Specific Integr
chip for the added circuit)
It is not limited to these.

Referring to FIG. 1 to FIG.
7 (semiconductor device) will be described.

The QFN 7 is of the area array type, and the outer portions 1c of the plurality of leads 1a are arranged so as to slightly protrude from the back surface 3a of the sealing portion 3 as shown in FIG. It is a bottom lead type.

The structure of the QFN 7 will be described.
Semiconductor chip 2 having semiconductor integrated circuit formed on main surface 2b
A sealing portion 3 formed by sealing the semiconductor chip 2 with a resin, and a tab 1e supporting the
A plurality of leads 1a each having an inner portion 1b embedded in the sealing portion 3 and an outer portion 1c exposed in the back surface 3a (the surface on the semiconductor device mounting side) of the sealing portion 3;
Pad 2a, which is the surface electrode, and the corresponding lead 1
and a bonding wire 4 serving as a connecting member for electrically connecting the lead 1a to the mounting portion 3b of the sealing portion 3 that covers the surface 1d of the inner portion 1b of the lead 1a on the mounting side.
The lead 1a is moved from the chip side end 1g to the outer part 1 with respect to the tab 1e so that the lead 1a becomes thinner in the direction of exposure.
It is formed to be inclined toward c.

The lead 1a in the QFN 7 has both functions of an inner lead (inner portion 1b) and an outer lead (outer portion 1c).

As a result, as shown in the vertical section (vertical section) of each lead 1a shown in FIG.
b is slightly inclined with respect to the back surface 3a of the sealing portion 3, that is, the surface parallel to the back surface 1h of the tab 1e (having a C shape), and as shown in FIG. Each lead 1a protrudes as an outer portion 1c along the outer periphery.

Further, the lead 1a is formed from the inner part 1b to the outer part 1c in a flat shape without bending.

Therefore, as for the external shape, as shown in FIG. 1, the outer portion 1c of each lead 1a has a side surface 3c and a back surface 3a below each side surface 3c in four directions of the sealing portion 3 (see FIG. 3). Are slightly juxtaposed with respect to both surfaces.

As a result, after assembling the QFN 7, when a pull-out test of each lead 1a from the sealing portion 3 is performed, the lead 1a is inclined with respect to both the back surface 3a and the side surface 3c of the sealing portion 3. Since they are arranged, the pull-out strength of the lead 1a can be improved, and therefore, the lead 1a can be prevented from easily falling off from the sealing portion 3.

In the QFN 7 of the present embodiment, the angle of inclination of the inner portion 1b of the lead 1a with respect to a surface parallel to the back surface 3a of the sealing portion 3 is used when bonding the bonding wire 4 as shown in FIG. This is almost the same as the tip angle of the capillary 6 shown in d). For example, the angle of the inclination is about 2 to 5 °.

As a result, the gap between the tip of the capillary 6 and the lead 1a can be reduced at the time of wire bonding, so that the pressing force at the time of cutting the wire can be improved, and as a result, the crimp strength of the wire joint 4a on the lead 1a side can be reduced. Can be improved.

In the QFN 7 of the present embodiment, the thickness of the tab 1e is about 1/2 of the thickness of the lead 1a as shown in FIG.

This is because the back surface 1h of the tab 1e is etched away during the manufacture of the lead frame 1 shown in FIG. 6A, whereby the position of the tab 1e with respect to the sealing portion 3 is raised. The back 1 of the tab 1e
The sealing portion 3 can be formed also on the h side.

Therefore, the position of the tab 1e in the height direction does not change in the QFN 7 shown in FIG.
8, the tab 1e is completely embedded in the sealing portion 3, so that when the QFN 7 is mounted on the mounting substrate 9, as shown in FIG. The board wiring can also be routed to the lower position.

Further, the tab 1e of the QFN 7 of the present embodiment.
Is a small tab having a circular planar shape as shown in FIG. 4A, or a small X-shaped cross tab as shown in FIG. 4B. That is, the size of the tab 1e is much smaller than the size of the semiconductor chip 2, and as a result,
One type of tab 1e can mount a plurality of sizes of semiconductor chips 2 and can increase the contact area between the semiconductor chip 2 and the sealing portion 3 on the back surface 2c side thereof. The adhesion between the semiconductor chip 2 and the sealing portion 3 can be improved, and the separation between the sealing portion 3 and the semiconductor chip 2 can be prevented.

The semiconductor chip 2 is fixed to the tab 1e by a die bond material 5 such as an epoxy adhesive.

The material of the lead frame 1 having the tabs 1e and the leads 1a is, for example, copper (Cu), iron (F).
e) or an alloy of iron and nickel (Fe-Ni), and the thickness thereof is, for example, about 0.1 to 0.2 mm. It is not limited.

Further, the bonding wire 4 (connection member) for electrically connecting the pad 2a of the semiconductor chip 2 and the corresponding inner portion 1b of the lead 1a is, for example,
Gold wire.

The sealing portion 3 is formed by resin sealing by a molding method, and a sealing resin used at this time is, for example, a thermosetting epoxy resin.

Next, a method of manufacturing the QFN 7 according to the present embodiment will be described with reference to a manufacturing process flow chart shown in FIG.

First, an inner portion 1b embedded in the sealing portion 3 of the QFN 7 and an outer portion 1c exposed in the back surface 3a of the sealing portion 3 are provided.
c is formed on the back surface 3a of the sealing portion 3 (the tab 1).
e, a lead frame 1 having a plurality of leads 1a formed to be inclined with respect to the back surface 1h) and the side surface 3c.
Is prepared (step S1 in FIG. 5).

In the present embodiment, the inclination angle of the inner portion 1b with respect to a surface parallel to the back surface 3a of the sealing portion 3 is formed to be substantially the same as the tip angle of the capillary 6 which is a wire bonding tool. The case will be described.

However, the angle of inclination of the inner portion 1b does not necessarily have to coincide with the tip angle of the capillary 6.

As for the step of forming the inner portion 1b of the lead 1a, the lead frame 1 is formed by bending using a bending die 8 as shown in FIG.

Here, the tab 1e of the lead frame 1 shown in FIG. 6 is a large tab larger than the area of the semiconductor chip 2, and is a type of the lead frame 1 in which the tab 1e is not half-etched. The procedure for assembling the QFN 7 is the same as that shown in FIG. 6 whether the tab 1e is a small tab or a tab 1e that has been half-etched.

Further, the lead frame 1 is a long and narrow multiple unit capable of manufacturing a plurality of QFNs 7 from one lead frame 1.

That is, in one lead frame 1,
A plurality of package regions corresponding to one QFN 7 are formed, and the inner portion 1b of each lead 1a is subjected to a tilting process.

Thereafter, a semiconductor chip 2 having a semiconductor integrated circuit formed on the main surface 2b is prepared, and die bonding (also referred to as chip mounting or pellet bonding) shown in step S2 is performed.

That is, the tab 1e of the lead frame 1 and the semiconductor chip 2 are joined.

Here, as shown in FIG. 6B, first, the die bonding material 5 is discharged from the potting nozzle 10 onto the tab 1e of the lead frame 1 and applied to the tab 1e.

Thereafter, the tab 1e of the lead frame 1 and the back surface 2c of the semiconductor chip 2 are joined.

That is, as shown in FIG. 6C, the semiconductor chip 2 is fixed to the tab 1e of the lead frame 1 via the die bond material 5 with the main surface 2b facing upward.

The die bonding material 5 is, for example, an adhesive, but a film sheet having an adhesive layer is used.
This may be stuck on the tab 1e to fix the semiconductor chip 2.

Thereafter, wire bonding shown in step S3 is performed.

That is, first, as shown in FIG. 6D, the pads 2a of the semiconductor chip 2 and the bonding wires 4 are connected, and then, the tip of the capillary 6 is pressed against the inner portion 1b to be pressed on the inner portion 1b. Bonding wire 4
Connect.

At this time, in the present embodiment, the inner portion 1b of the lead 1a is inclined at substantially the same angle as the tip angle of the capillary 6 with respect to the back surface 3a of the sealing portion 3, so that the capillary 6 The gap between the tip and the lead 1a can be reduced.

Therefore, the pressing force at the time of cutting the wire can be improved, and as a result, the wire bonding portion 4a on the lead 1a side can be improved.
Can improve the crimp strength.

As a result, as shown in FIG. 6D, the pads 2a of the semiconductor chip 2 and the corresponding inner portions 1b of the leads 1a of the lead frame 1 are electrically connected by bonding wires as connection members. Is done.

Thereafter, the resin sealing shown in step S4 is
As shown in FIG. 7A, the process is performed using a mold 11. Here, molding is performed by a transfer molding method.

At this time, the inner portion 1b of the lead 1a is arranged so as to be inclined from the chip side end portion 1g toward the outer portion 1c, whereby the surface 1d on the mounting side of the inner portion 1b is mounted.
Is formed so that the covering portion 3b of the sealing portion 3 covering the lead 1a gradually becomes thinner in the direction in which the leads 1a are exposed.

Thus, the outer portion 1c is exposed on the outer periphery of the back surface 3a of the sealing portion 3 to form the sealing portion 3.

The resin sealing is not limited to the transfer molding method, but may be performed by a vacuum printing sealing method (liquid resin coating method) or the like.

After the resin sealing, the cutting shown in step S5 is performed to cut the leads 1a of the lead frame 1, thereby connecting the plurality of leads 1a to the frame portion 1f of the lead frame 1.
Separate from

At this time, as shown in FIG. 7B, the lead 1a is cut and separated from the frame 1f of the lead frame 1 by a cutting method using a cutting die 12.

It is to be noted that, instead of the cutting method using the cutting die 12, a cutting and separating method from the lead frame 1 may be performed by an individualizing method by dicing cut.

Thus, the QFN 7 shown in FIGS. 1 to 3 can be assembled.

FIGS. 8A and 8B show an example of a completed QFN 7 mounting form.

That is, the QFN 7 is a QFP (Quad Flat
A package 13 and a BGA (Ball Grid Array) 14 are mounted on the mounting board 9.

According to the QFN 7 (semiconductor device) and the method of manufacturing the same according to the present embodiment, the following operational effects can be obtained.

That is, a small Q of the bottom lead type
In the FN7, the covering portion 3b of the sealing portion 3 covering the surface 1d of the inner portion 1b of the lead 1a on the mounting side is the lead 1a.
The lead 1a is formed so as to be inclined from the chip side end 1g toward the outer part 1c so as to become thinner in the direction of exposure, thereby dispersing the stress at the time of pulling out the lead due to the inclination of the lead 1a. Accordingly, the pull-out strength of the lead 1a can be improved.

Here, the test for pulling out the lead 1a is as follows.
The stress is distributed by inclining the inner portion 1b of the lead 1a embedded in the sealing portion 3 in the direction parallel to the direction parallel to the back surface 3a of the sealing portion 3 and the direction perpendicular thereto.
Thereby, the pull-out strength of the lead 1a can be improved.

As a result, the reliability of QFN 7 can be improved.

Further, the lead 1 embedded in the sealing portion 3
By inclining the inner portion 1b of the lead 1a
Compared to the case where is simply flat, since the volume of the inner portion 1b of the lead 1a embedded in the sealing portion 3 increases, the contact area between the inner portion 1b of the lead 1a and the sealing portion 3 increases. The pull-out strength of the lead 1a can be improved.

The lead 1a is connected to its chip end 1g.
Is formed so as to be inclined toward the outer portion 1c from the outside, so that the outer portion 1c can be projected and exposed on the back surface 3a of the sealing portion 3.

As a result, the stand-off of the outer portion 1c (the amount of protrusion of the outer portion 1c on the back surface 3a of the sealing portion 3).
Costly QFN manufacturing, such as a mold using a film to ensure the quality and a stand-off by plating, can be omitted.

Therefore, the manufacturing cost of the small QFN 7 of the bottom lead type can be reduced, and as a result, the QFN 7 which is inexpensive and has improved lead-out strength of the lead 1 a can be realized.

As a result, the bottom lead type small QFN 7 can be further reduced in weight and size, and can be easily manufactured even if the lead 1a is formed shorter.

The lead 1a is connected to the chip end 1g.
And the angle of the inclination is the same as the tip angle of the capillary 6 used when bonding the bonding wire 4, so that the tip of the capillary 6 and the lead 1a during wire bonding are inclined. Can be reduced.

Therefore, the pressing force at the time of cutting the wire can be improved, and as a result, the wire bonding portion 4a on the lead 1a side can be improved.
Can improve the crimp strength.

Thus, the bonding strength of the wire bonding portion 4a on the lead 1a side can be improved, and as a result, the reliability of the QFN 7 can be improved.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments of the invention, and does not depart from the gist of the invention. It is needless to say that various changes can be made.

For example, in the above embodiment, the lead 1a
The inner part 1 remains flat without bending
Although the case where the portion from b to the outer portion 1c is formed and arranged so as to be inclined has been described, various shapes of the lead 1a can be considered.

Therefore, the QF of another embodiment shown in FIG.
N7 indicates that the outer portion 1c of the lead 1a has a flat surface 1i exposed on the same surface as the back surface 3a (the surface on the semiconductor device mounting side) of the sealing portion 3.

That is, a bend is formed in the lead 1a,
Although the inner portion 1b is inclined with respect to the back surface 1h of the tab 1e and the back surface 3a of the sealing portion 3, a bend (bend) is formed in the middle of the lead 1a, whereby the outer portion 1c is sealed. The flat surface 1i is exposed on the same surface as the back surface 3a of the portion 3. In this case, the outer portion 1c
May have a shape that does not protrude from the side surface 3 c of the sealing portion 3.

In this way, the QFN of the above-described embodiment can be used.
The same operation and effect as those of 7 can be obtained.

Further, the bend formed in the middle of the lead 1a may be formed to be curved, and the same operation and effect as those of the QFN 7 of the above embodiment can be obtained.

In the above embodiment, the QFN
7 is a thin type half-etched tab 1e,
Although the case of the small tab structure has been described, various thicknesses, shapes, and sizes of the tab 1e can be considered.

Therefore, the QFN of another embodiment of FIG.
7, the thickness of the tab 1e is the same as the thickness of the lead 1a,
When the lead 1a is inclined, only the lead 1a is inclined and the tab 1e is left as it is.

The QFN 7 according to another embodiment of FIG.
Sets the thickness of the tab 1e equal to the thickness of the lead 1a, and forms the tab 1e together with the lead 1a when the lead 1a is inclined.
Also have a structure that is pushed upward.

In the QFN 7 shown in FIGS. 10 and 11, the pull-out strength of the lead 1a can be improved, and the bonding strength of the wire bonding portion 4a can be improved.

In the above embodiment, the tab 1e is
Although the case of the small tab structure which is much smaller than the size of the semiconductor chip 2 has been described, the tab 1 according to another embodiment shown in FIG.
“e” is formed in a frame shape, and the outer peripheral portion of the semiconductor chip 2 is supported by the tab frame portion 1j.

As a result, in the small QFN 7 of the bottom lead type, the adhesion between the semiconductor chip 2 and the sealing portion 3 can be improved, so that chip peeling can be prevented.

As a result, the reliability of the QFN 7 can be improved.

Further, in the above-described embodiment, the case where the lead frame 1 in which the lead 1a is pre-tilted is prepared when preparing the lead frame 1 has been described.
Preparing the lead frame 1 that has not been tilted,
After loading the lead frame 1, in the die bonding step of the manufacturing process of the QFN 7, the lead 1a may be subjected to a tilting process using a load at the time of die bonding.

That is, at the same time that the tab 1e and the semiconductor chip 2 are joined, the lead 1a is formed with an inclination from the chip side end 1g toward the outer part 1c. This is to perform a tilting process.

As a result, the tab 1e of the lead frame 1
And the semiconductor chip 2 and the inclination of the lead 1a can be processed at the same time, so that the manufacturing process of the QFN 7 can be simplified.

As a result, the manufacturing cost of QFN 7 can be reduced.

In the above embodiment, the case where the semiconductor device is a small-sized QFN 7 has been described. However, the semiconductor device is a resin-sealed type and a bottom lead type which is assembled using the lead frame 1. At the same time, a coating 3b of the sealing portion 3 is formed on the surface 1d of the inner portion 1b of the lead 1a on the mounting side, so that the coating 3b gradually becomes thinner in the direction in which the lead 1a is exposed. As long as the semiconductor device is suitable, a short lead type QFP other than the QFN 7 may be used.

[0100]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). In the small semiconductor device of the bottom lead type, the leads are formed so as to be inclined such that the coating portion covering the mounting side of the inner portion of the lead in the sealing portion becomes thinner in the direction in which the lead is exposed. By doing so, it is possible to disperse the stress at the time of pulling out the lead, thereby improving the pull-out strength of the lead. As a result, the reliability of the semiconductor device can be improved.

(2). By inclining the inner portion of the lead embedded in the sealing portion, the volume of the lead embedded in the sealing portion is increased as compared with a case where the lead is simply flat, so that the distance between the inner portion of the lead and the sealing portion is increased. The contact area increases, which can also improve the lead pull-out strength.

(3). Since the lead is formed to be inclined, the outer portion can be projected and exposed on the surface of the sealing portion on the mounting side. As a result, costly manufacturing such as a mold using a film or a standoff by plating is not required, so that the manufacturing cost of a bottom-lead type semiconductor device can be reduced. This makes it possible to realize a semiconductor device that is inexpensive and has improved lead withdrawal strength. As a result, a small-sized bottom lead type semiconductor device can be further reduced in weight and size.

(4). Because the lead is inclined and the angle of the inclination is the same as the tip angle of the capillary,
The pressing force at the time of cutting the wire can be improved, and as a result, the crimp strength of the wire joint on the lead side can be improved. Thereby, the bonding strength of the wire bonding portion on the lead side can be improved, and as a result, the reliability of the semiconductor device can be improved.

(5). When forming the inclination on the lead, by performing the inclination processing on the lead in the die bonding process, the joining of the tab of the lead frame and the semiconductor chip and the inclination processing on the lead can be performed at the same time. Thereby, the manufacturing process of the semiconductor device can be simplified. As a result, the manufacturing cost of the semiconductor device can be reduced.

[Brief description of the drawings]

FIG. 1 is a perspective view showing an example of an embodiment of a structure of a semiconductor device (QFN) according to the present invention.

FIG. 2 is a cross-sectional view showing a structure of the semiconductor device shown in FIG.

FIG. 3 is a bottom view showing the structure of the semiconductor device shown in FIG. 1;

FIGS. 4A and 4B are partially enlarged plan views showing the structure of a tab in the semiconductor device shown in FIG. 1;

FIG. 5 is a manufacturing process flow chart showing one example of an embodiment of a method of manufacturing a semiconductor device according to the present invention.

6 (a), (b), (c), (d) are side views showing an example of the structure of a lead frame or a semiconductor device for each step shown in FIG. 5, and (a) is a lead frame. Manufacturing process,
(B) and (c) are die bonding steps, and (d) is a wire bonding step.

FIGS. 7A and 7B are cross-sectional views showing an example of the structure of the semiconductor device in each step shown in FIG. 5, in which FIG. 7A is a sealing step and FIG. 7B is a cutting step.

8A and 8B are diagrams showing an example of a mounting state of the semiconductor device shown in FIG. 1 on a mounting board, wherein FIG. 8A is a plan view and FIG. 8B is a side view.

FIG. 9 is a cross-sectional view illustrating a structure of a semiconductor device according to another embodiment of the present invention.

FIG. 10 is a cross-sectional view illustrating a structure of a semiconductor device according to another embodiment of the present invention.

FIG. 11 is a cross-sectional view illustrating a structure of a semiconductor device according to another embodiment of the present invention.

FIG. 12 is a partially enlarged plan view showing a structure of a tab in a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Lead frame 1a Lead 1b Inner part 1c Outer part 1d Surface to be mounted 1e Tab 1f Frame 1g Chip side end 1h Back 1i Flat surface 1j Tab frame 2 Semiconductor chip 2a Pad (surface electrode) 2b Main surface 2c Back surface REFERENCE SIGNS LIST 3 sealing portion 3a back surface (surface on the semiconductor device mounting side) 3b covering portion 3c side surface 4 bonding wire (connection member) 4a wire bonding portion 5 die bonding material 6 capillary 7 QFN (semiconductor device) 8 bending die 9 mounting substrate 10 potting nozzle Reference Signs List 11 mold die 12 cutting die 13 QFP 14 BGA

Claims (7)

[Claims] 1. A resin-sealed semiconductor device, comprising: a tab for supporting a semiconductor chip; a sealing portion formed by resin-sealing the semiconductor chip; A plurality of leads including an inner portion embedded in a sealing portion and an outer portion exposed in a surface of the sealing portion on the semiconductor device mounting side, and a surface electrode of the semiconductor chip and the corresponding lead. A connection member that electrically connects the lead, so that a covering portion of the sealing portion that covers a surface of the lead on a mounting side of the inner portion is thinner in a direction in which the lead is exposed. Is formed so as to be inclined from the chip side end toward the outer part. 2. A resin-encapsulated semiconductor device, comprising: a tab for supporting a semiconductor chip; a sealing portion formed by resin-sealing the semiconductor chip; A plurality of leads including an inner portion embedded in a sealing portion and an outer portion exposed in a surface of the sealing portion on the semiconductor device mounting side, and a surface electrode of the semiconductor chip and the corresponding lead. A bonding wire that is a connection member for electrical connection, wherein a covering portion of the sealing portion that covers a surface of the lead on a mounting side of the inner portion is thinned in a direction in which the lead is exposed. Wherein the lead is inclined from the end on the chip side toward the outer part, and the angle of the inclination is the same as the tip angle of a capillary used when bonding the bonding wire. The semiconductor device according to symptoms. 3. The semiconductor device according to claim 1, wherein the outer portion of the lead has a flat surface exposed on the same surface as a surface of the sealing portion on the semiconductor device mounting side. A semiconductor device. 4. The semiconductor device according to claim 1, wherein said tab is formed in a frame shape, and an outer peripheral portion of said semiconductor chip is supported by a tab frame portion. apparatus. 5. A method of manufacturing a resin-sealed semiconductor device, comprising: an inner portion embedded in a sealing portion of the semiconductor device; and an outer portion exposed in a surface of the sealing portion on a semiconductor device mounting side. A step of preparing a lead frame having a plurality of leads formed to be inclined from a chip side end toward the outer part; a step of joining a tab of the lead frame to a semiconductor chip; and A step of electrically connecting a surface electrode of the chip and the inner part of the lead of the lead frame corresponding thereto with a connecting member; and sealing the semiconductor chip with a resin, and mounting the inner part on the mounting side of the inner part. The lead is inclined from the chip-side end toward the outer part so that the covering part of the sealing part covering the surface becomes thinner in the direction in which the lead is exposed,
A semiconductor, comprising: exposing the outer portion in a surface on the semiconductor device mounting side to form the sealing portion; and separating the plurality of leads from a frame portion of the lead frame. Device manufacturing method. 6. A method of manufacturing a resin-sealed semiconductor device, comprising: an inner portion embedded in a sealing portion of the semiconductor device; and an outer portion exposed in a surface of the sealing portion on a semiconductor device mounting side. A step of preparing a lead frame having a plurality of leads formed to be inclined at the same angle as the tip angle of the capillary for wire bonding from the chip side end toward the outer part; and a tab of the lead frame. Bonding the tip of the capillary to the inner portion to perform wire bonding, thereby forming a surface electrode of the semiconductor chip and the corresponding inner portion of the lead of the lead frame. A step of electrically connecting with a bonding wire as a connecting member; and a step of sealing the semiconductor chip with a resin to mount the inner portion on a mounting side. As cover portion of the sealing portion covering the surface becomes thinner toward the exposed direction of the lead, placing the lead from its tip end portion is inclined toward the outer portion,
A semiconductor, comprising: exposing the outer portion in a surface on the semiconductor device mounting side to form the sealing portion; and separating the plurality of leads from a frame portion of the lead frame. Device manufacturing method. 7. A method of manufacturing a resin-encapsulated semiconductor device, comprising: an inner portion embedded in a sealing portion of the semiconductor device; and an outer portion exposed in a surface of the sealing portion on a semiconductor device mounting side. Preparing a lead frame having a plurality of leads including: a step of joining a tab of the lead frame to a semiconductor chip, and forming an inclination on the lead from the chip side end toward the outer part. A step of electrically connecting a surface electrode of the semiconductor chip and the corresponding inner part of the lead of the lead frame by a connecting member, and sealing the semiconductor chip with a resin to form the inner part. The lead is directed from the chip-side end to the outer part so that the covering part of the sealing part covering the surface on the mounting side of the lead becomes thinner in the direction in which the lead is exposed. By obliquely arranged,
A semiconductor, comprising: exposing the outer portion in a surface on the semiconductor device mounting side to form the sealing portion; and separating the plurality of leads from a frame portion of the lead frame. Device manufacturing method.