JP2001109128A - Pattern data forming method for lithography and method for manufacturing semiconductor device and apparatus for manufacturing semiconductor device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for forming pattern data for lithography which forms light exposure pattern data and a charge particle drawing pattern data by separating a pattern suitable for light exposure and a pattern inadequate for the same. SOLUTION: This method for forming the pattern data for lithography consists in inputting design pattern data (st 1), extracting the pattern satisfying at least either one condition that the region of the design pattern data irradiated with energy rays is above the prescribed width W1 or the spacing between the region of the design pattern data irradiated with the energy ray and another region adjacent thereto is above the prescribed width S1 as the pattern data for light exposure from the design pattern data (st 7, 5) and extracting the charge particle drawing pattern data by removing the light exposure pattern data extracted from the design pattern data (st6).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for generating lithographic pattern data used for manufacturing a semiconductor integrated circuit or a liquid crystal panel, a method for manufacturing a semiconductor device using the same, and a semiconductor manufacturing apparatus used for the method for manufacturing a semiconductor device. .

[0002]

2. Description of the Related Art For pattern formation of a semiconductor integrated circuit or the like,
A lithography technique is used, and light, an electron beam, and the like are used to form a latent image. Electron beam lithography involves filling with a point beam or several μm at most.
A pattern of about m × several μm is connected and drawn on a resist on a wafer, and although its fine workability can be expected, it is not suitable for mass production technology in terms of throughput.

On the other hand, in photolithography, an exposure mask is irradiated with an exposure light onto an enlarged mask composed of a light-transmitting portion and a light-shielding portion, and the pattern is drawn by a lens and transferred to a resist on a wafer. A single exposure can form a pattern in an area of about 20 mm × 20 mm, and is widely used for mass production because of its high throughput. However, the processing dimension required in recent years has become smaller than the wavelength of the exposure light, and has become smaller than the resolution limit of a binary mask composed of a light-shielding portion and a light-transmitting portion having the same phase.

[0004] This resolution limit can be represented by hλ / NA. Here, λ is the wavelength of the exposure light source, NA is the numerical aperture of the lens, h is a process-dependent constant, and is about 0.6 when a binary mask is used. For example, when NA = 0.65 and wavelength λ = 248 nm, the resolution limit and the separation resolution limit are 230 nm, and there is a problem that a pattern having a dimension smaller than that cannot be formed with sufficient accuracy.

As described above, methods for solving the problem of low throughput of electron beam writing and the problem of resolution of light exposure are as follows.
A method of forming a pattern by forming a latent image on the same resist by both light exposure and electron beam drawing and then performing development processing (mix and match within the same resist) is described in Microelectronic Engineering, Vol. 27 (199).
5) Pages 231-234 (Microelectronni)
c Engineering, vol. 27 (199
5) pp. 231 to 234). In the above-mentioned paper, a latent image is formed by electron beam lithography on a pattern with a small line width and light exposure on the other pattern, and a latent image is formed by overlapping a boundary portion between electron beam lithography and light exposure. A method of classifying a pattern formed by light exposure and a pattern formed by electron beam lithography is described in JP-A-1-293613. Japanese Patent Laid-Open No. 1-293613 describes that patterns of various common functional blocks are processed by light exposure, and patterns unique to each circuit are processed by electron beam drawing.

On the other hand, there is a phase shift technique as a method for responding to miniaturization of required processing dimensions by optical lithography. Phase shift technologies include a Levenson-type phase shift technology that improves the resolution by giving a phase difference between adjacent light-transmitting parts, and a halftone-type phase shift technology that uses a translucent film with a phase difference in the light-shielding part. Etc. In the above-mentioned Levenson-type phase shift technique, an automatic phase assignment system for determining which light transmission pattern is provided with a thin film (shifter) for giving a phase difference is disclosed in JP-A-5-341498 and JP-A-6-308714. Has been described.
The Levenson-type phase shift has a high effect of improving the resolution, and the process-dependent constant h can be reduced to an apparent half. Therefore, in the case of a binary mask, h = 0.
However, by using the Levenson-type phase shift, h can be improved to 0.3, and the resolution can be improved. However, when phase assignment is performed on a given design pattern, phase assignment inconsistency may occur depending on the layout of the pattern. Here, the phase assignment inconsistency refers to a place where the same phase is assigned even though the light transmitting parts are close to each other. For example,
As shown in FIG. 2, the light-transmitting pattern pt is
1, pt2, and pt3 are close to each other by a distance less than the resolution limit of the other two light-transmitting patterns.
In order to eliminate the phase arrangement inconsistency, a restriction on the pattern design occurs, and the design is often difficult.

To solve this problem, Japanese Patent Laid-Open Publication No. HEI 4-15581
No. 2 discloses a method of making use of the fine workability and high throughput of the phase shift technique, and further resolving design restrictions significantly. Japanese Patent Application Laid-Open No. 4-155812 discloses a method of forming a pattern by combining fine pattern exposure using a phase shift technique and electron beam drawing of a phase assignment inconsistency.

[0008]

The prior art described in the above-mentioned microelectronic engineering describes that only a thin line portion having a certain dimension or less is extracted to draw an electron beam. Japanese Patent Application Laid-Open No. 293613 describes that light exposure / electron beam drawing is divided according to the function of a pattern. However, extraction of a pattern unsuitable for light exposure in consideration of the space size of the pattern and the step shape of the lower layer is described. Not. In addition, regarding the combination of the light exposure / electron beam drawing, the electron beam drawing area and the light exposure area are overlapped by a certain width, and the change in the amount of shrinkage of the latent image due to the difference in the pattern width or the like is not taken into consideration. There is no description of a method for preventing an increase in unnecessary data or a variation in pattern size caused by performing drawing and exposure more than necessary.

Further, Japanese Patent Application Laid-Open No. Hei 5-341498 discloses that
Only the phase assignment inconsistency is presented to the designer, but no solution is described. In addition, Japanese Unexamined Patent Publication No.
In Japanese Patent No. 308714, a pattern deformation is applied to a phase assignment inconsistency, and a shape different from the designed pattern input by the designer at the beginning is realized on the wafer. Japanese Patent Laid-Open No. 4-155812 describes a manufacturing process for pattern formation, but does not describe automatic data creation.

A first object of the present invention is to provide a lithographic pattern data generating method for generating a light exposure pattern data and a charged particle drawing pattern data by separating a pattern suitable for light exposure and an inappropriate pattern. It is in.

A second object of the present invention is to provide a lithographic pattern data generating method for solving a case where inconsistency occurs in the phase assignment of a light exposure mask used for pattern formation using a phase shift technique. It is in.

A third object of the present invention is to provide a semiconductor manufacturing apparatus for performing light exposure and charged particle drawing.

A fourth object of the present invention is to provide a method for manufacturing a semiconductor device using the above-described method for generating pattern data for lithography.

[0014]

In order to achieve the first object, a method of generating pattern data for lithography according to the present invention comprises the steps of: inputting design pattern data; Is the predetermined width W1
A light exposure pattern extraction step of extracting a pattern that satisfies at least one of the conditions where the distance between mutually adjacent areas irradiated with energy rays of the design pattern data is equal to or more than a predetermined width S1 from the design pattern data as light exposure pattern data. And a charged particle drawing pattern extraction step of extracting the charged particle drawing pattern data by removing the light exposure pattern data extracted from the design pattern data.

After the charged particle drawing pattern extracting step, an enlarging step of enlarging the extracted charged particle drawing pattern data, an extracting step of extracting a common part of the expanded charged particle drawing pattern data and design pattern data,
A correction step may be provided in which the extracted common part is added to the charged particle drawing pattern data to obtain corrected charged particle drawing pattern data.

In order to achieve the first object,
According to the lithography pattern data generation method of the present invention, the design pattern data input step and the region irradiated with the energy beam of the design pattern data are equal to or more than a predetermined width W1 and are adjacent to each other where the energy beam of the design pattern data is irradiated. An extraction step of extracting a pattern having an interval smaller than a predetermined width S1 from the design pattern data as the first pattern data, and enlarging the first pattern data to enlarge the first pattern data. A light exposure pattern extracting step of extracting light exposure pattern data based on the pattern data and the design pattern data, and a charged particle drawing pattern extraction of extracting the charged particle drawing pattern data by removing the light exposure pattern data extracted from the design pattern data And a process.

It is preferable that the extraction step is performed by removing the design pattern data from the pattern obtained by enlarging the design pattern data, performing a frame calculation, and reducing the design pattern data.

In any of the above cases, the predetermined width W1 and the predetermined width S1 are as follows: When both h and k are constants, W1 = h × (exposure light wavelength) / (exposure apparatus lens numerical aperture) S1 = k × (exposure light wavelength) / (lens numerical aperture of the exposure apparatus). When the phase shift technique is not used, the value of the constant h is in the range of 0.5 ≦ h ≦ 0.8, and the value of the constant k is , 0.
It is preferable to set the range of 5 ≦ k ≦ 0.8.

In order to achieve the first object,
In the method for generating pattern data for lithography of the present invention, an input step of design pattern data and a pattern in which an interval between mutually adjacent regions irradiated with energy rays of the design pattern data is a predetermined width S1 or more as light exposure pattern data. A light exposure pattern extraction step of extracting from the design pattern data, and a charged particle drawing pattern extraction step of extracting the charged particle drawing pattern data by removing the light exposure pattern data extracted from the design pattern data. is there.

In the light exposure pattern extracting step, the design pattern data is enlarged, framed, and the second pattern is extracted by removing the design pattern data from the first pattern obtained by reducing the size. It is preferable to extract the region adjacent to the second pattern as a third pattern, and remove the third pattern from the design pattern data. The first pattern obtained by the enlargement and reduction needs to be the same size as the design pattern data.

In this case, when k is a constant, the predetermined width S1 is given by S1 = k × (exposure light wavelength) / (lens numerical aperture of the exposure apparatus), and the value of the constant k is 0.5 ≦ k It is preferable to set the range of ≦ 0.8.

In order to achieve the second object,
In the method of generating pattern data for lithography according to the present invention, the input step of the design pattern data and the area irradiated with the energy rays of the design pattern data are equal to or less than a predetermined width W2 and adjacent to each other where the energy rays of the design pattern data are irradiated. A light exposure pattern extraction step of extracting a pattern in which the interval between the regions to be performed is equal to or greater than a predetermined width S1 from the design pattern data as light exposure pattern data, and providing a phase difference to each opening obtained by the light exposure pattern data. A phase assignment step of allocating two types of phases, and a charged particle drawing pattern extraction step of extracting charged particle drawing pattern data by removing the light exposure pattern data extracted from the design pattern data. .

Further, the light exposure pattern extracting step includes:
Design pattern data is enlarged, framed, reduced,
It is preferable to further enlarge the pattern data to have the same size as the design pattern data, and to extract an area where the design pattern data matches the pattern data.

The predetermined width W2 and the predetermined width S1 are as follows: When both g and k are constants, W2 = g × (exposure light wavelength) / (exposure apparatus lens numerical aperture) S1 = k × (exposure light wavelength ) / (Lens numerical aperture of the exposure apparatus), where the value of the constant g is in the range of 0.25 ≦ g ≦ 0.4, and the value of the constant k is in the range of 0.25 ≦ k ≦ 0.4. Is preferred.

In order to achieve the second object,
According to the lithography pattern data generation method of the present invention, the design pattern data input step and the area where the energy beam of the design pattern data is irradiated have a predetermined width W1 or more and the energy beam is irradiated on the adjacent areas. Extracting a pair of regions in which at least a portion having an interval of less than or equal to a predetermined width S1 exists, and two types of phases so as to provide a phase difference between one region and the other region of the pair of regions. , A contradiction point detecting step of detecting two regions where a contradiction has occurred in the phase allocation result, and expanding the pattern between the two detected regions to obtain the design pattern data and the expanded pattern. And a pattern extraction step of extracting charged particle drawing pattern data based on the light exposure pattern data.

In the pattern extracting step, the enlarged pattern is removed from the design pattern data to obtain light exposure pattern data, and an area where the design pattern data matches the enlarged pattern is extracted to be charged particle drawing pattern data. Is preferred. Alternatively, the light exposure pattern data may be removed from the design pattern data to obtain charged particle drawing pattern data. The above two types of phases may be assigned by assigning one type of phase to the region connected to one.

In this case, the predetermined width W1 and the predetermined width S1
When h and k are both constants, W1 = h × (exposure light wavelength) / (exposure device lens numerical aperture) S1 = k × (exposure light wavelength) / (exposure device lens numerical aperture) It is preferable that the value of the constant h be in the range of 0.25 ≦ h ≦ 0.4 and the value of the constant k be in the range of 0.25 ≦ k ≦ 0.4.

In order to achieve the second object,
According to the lithography pattern data generation method of the present invention, the design pattern data input step and the area where the energy beam of the design pattern data is irradiated have a predetermined width W1 or more and the energy beam is irradiated on the adjacent areas. An extraction step of extracting a portion having an interval of not more than a predetermined width S1, a division step of dividing this area corresponding to a portion having a width of not more than S1, one of the divided areas, A phase allocation step of allocating two types of phases so as to give a phase difference to another divided area adjacent at an interval equal to or less than S1, a contradiction point detection step of detecting a region where a contradiction has occurred in the phase allocation result, The pattern between the detected contradictory areas is enlarged, and based on the design pattern data and the enlarged pattern, the light exposure pattern data and the charged particle drawing pattern are enlarged. It is obtained to perform a pattern extraction step of extracting the over data. A region where inconsistency occurs and which coincides with the design pattern data (unallocated divided region) may be added to the charged particle drawing pattern data.

In this case, the predetermined width W1 and the predetermined width S1
When h and k are both constants, W1 = h × (exposure light wavelength) / (exposure device lens numerical aperture) S1 = k × (exposure light wavelength) / (exposure device lens numerical aperture) It is preferable that the value of the constant h be in the range of 0.25 ≦ h ≦ 0.4 and the value of the constant k be in the range of 0.25 ≦ k ≦ 0.4.

Further, in order to achieve the first object,
The method of generating pattern data for lithography according to the present invention includes a step of inputting design pattern data and pattern data of a lower layer layout; a step of generating step pattern data representing a step portion region from the pattern data of the lower layer layout; A charged particle drawing pattern extraction step of extracting charged particle drawing pattern data based on the pattern data and the design pattern data; and a light exposure pattern extraction step of extracting a pattern obtained by removing the charged particle drawing pattern data extracted from the design pattern data. Is performed. The input of the design pattern data may be performed after the step pattern data generation step.

It is preferable that the charged particle drawing pattern extracting step enlarges or reduces the step pattern data and extracts a portion where the enlarged or reduced step pattern data and the design pattern data match. further,
It is also preferable that the charged particle drawing pattern extracting step extracts a portion where the step pattern data matches the design pattern data. The above-mentioned enlargement or reduction is from −2 μm to 2 μm on the sample to be drawn or exposed to light.
It is preferable that the thickness be in the range of μm (excluding 0 μm).

Further, in the charged particle drawing pattern extracting step, the step pattern data is enlarged or reduced to form second step pattern data, and the second step pattern data is reduced or enlarged compared to the step pattern data. Then, it is also preferable that the third step pattern data is extracted, and a portion matching the second step pattern data, the third step pattern data, and the design pattern data is extracted. In this case, when the step pattern data is enlarged, the second step pattern data is reduced more than the above-mentioned step pattern data, and conversely, when the step pattern data is reduced, the second step pattern data is replaced with the above-mentioned step pattern data. It is necessary to enlarge it more than the pattern data. In addition, the reduction is -2 μm on the sample to be charged particle scribed or light exposed.
It is preferable that the thickness be in the range of m to 2 μm.
At this time, one may be 0 μm, while the other is 0 μm.
It must not be μm.

Further, in order to achieve the first object,
The method of generating pattern data for lithography of the present invention comprises the steps of: inputting design pattern data and pattern data of a lower-layer layout; extracting the concave pattern data having a width exceeding a desired value from the pattern data of the lower-layer layout; A step pattern data generating step of generating step pattern data by enlarging the pattern data of step S, a charged particle drawing pattern extracting step of extracting charged particle drawing pattern data based on the step pattern data and the design pattern data, and design pattern data And a light exposure pattern extraction step of extracting the light exposure pattern data by removing the charged particle drawing pattern data extracted from.

The area where the charged particle drawing pattern obtained by the above-described charged particle drawing pattern data and the light exposure pattern obtained by the light exposure pattern data are connected to or close to each other is processed as follows. Is also good.

That is, a region where the charged particle drawing pattern obtained by the charged particle drawing pattern data is connected to the light exposure pattern obtained by the light exposure pattern data is extracted, and the light exposure pattern in contact with the region is extracted by the charged particle. The light exposure pattern data may be extended into the drawing pattern and corrected. The extension of the light exposure pattern into the charged particle drawing pattern is preferably extended in accordance with the width of the portion of the light exposure pattern that is in contact with the above-described region. In addition, it is preferable that the extension be performed by adding a convex portion having a width smaller than the width of the portion of the light exposure pattern that is in contact with the above-mentioned region to the tip of the light exposure pattern.

Further, a region where the charged particle drawing pattern obtained by the charged particle drawing pattern data is connected to the light exposure pattern obtained by the light exposure pattern data is extracted, and the charged particle drawing pattern in contact with this region is extracted by light. The charged particle drawing pattern data may be extended into the exposure pattern and modified. The extension of the charged particle drawing pattern into the light exposure pattern is preferably performed by adding a convex portion having a width smaller than the width of the portion of the charged particle drawing pattern that is in contact with the above-described region to the tip of the charged particle drawing pattern.

Further, a region where the charged particle drawing pattern obtained by the charged particle drawing pattern data and the light exposure pattern obtained by the light exposure pattern data are extracted is extracted. A region where the light exposure pattern within a desired range from the boundary of the particle drawing pattern is divided into first meshes, and a region where the charged particle drawing pattern within a desired range from the boundary is located is the same size as the first mesh. The mesh is divided into second meshes, and the region where the charged particle drawing pattern is located outside a desired range from the boundary is divided into third meshes larger than the first and second meshes, and the light exposure pattern in each mesh is divided. And the area ratio of the charged particle drawing pattern is calculated, and the irradiation amount of the charged particle drawing in the desired second mesh is set to the surrounding second amount.
May be corrected based on the irradiation amount of the charged mesh drawing of the mesh and the irradiation amount of the light exposure of the first mesh adjacent to the surrounding second mesh.

Further, a step of extracting a region where the charged particle drawing pattern obtained by the charged particle drawing pattern data and the light exposure pattern obtained by the light exposure pattern data are close to each other; The area where the charged particle drawing pattern in a desired range is located from the boundary of the charged particle drawing pattern is divided into meshes of a desired size, the area ratio of the charged particle drawing pattern in the mesh is calculated, and the area ratio is a desired value. Is exceeded, the step of enlarging the size of the mesh and repeating the calculation of the area ratio of the charged particle drawing pattern in the mesh again is performed.

In order to achieve the third object,
The semiconductor manufacturing apparatus of the present invention includes a plurality of means for irradiating a first energy beam, a plurality of means for performing a first heat treatment on a sample to be processed irradiated with the first energy beam, a first energy beam. A plurality of means for irradiating a second energy ray having an energy different from the above, a plurality of means for performing a second heat treatment on the sample to be processed irradiated with the second energy ray, and transporting the sample to each of the above means And a control means for deciding which of the above-mentioned means to convey the sample to be processed.

The control means may make the above-mentioned determination based on the time until the processing of the sample to be processed being processed by each of the above-mentioned means and the processing time of each of the above-mentioned samples to be newly processed. preferable. Preferably, the first energy ray is a charged particle beam, and the second energy ray is a light beam. At this time, the control unit is configured to irradiate the second energy beam based on a specific state of each of the plurality of second energy beam irradiation units, for example, a distortion of a lens constituting the unit. It is preferable to correct the irradiation condition of the first energy beam before or after the sample is irradiated.

In order to achieve the fourth object,
The method for manufacturing a semiconductor device according to the present invention includes the steps of forming a light exposure mask based on the light exposure pattern data according to any one of the above, and irradiating the sample to be processed with light using the light exposure mask, A step of drawing charged particle on the sample to be processed based on the charged particle drawing pattern data or the corrected charged particle drawing pattern data. Light irradiation and charged particle drawing may be performed in any order.

[0042]

Embodiments of the present invention will be described below. In each of the embodiments, a KrF excimer projection exposure apparatus having a wavelength of 248 nm, NA of 0.6 and σ 0.5 was used for light exposure, and an electron beam lithography apparatus having an acceleration voltage of 50 kV was used for electron beam lithography. The present invention can be similarly implemented by using a projection exposure apparatus under conditions or an electron beam lithography apparatus having another acceleration voltage. Further, under the light exposure condition, when a Levenson mask is used, h = 0.3, and the resolution limit and the separation resolution in light exposure are 130 nm from hλ / NA. On the other hand, when a mask other than the Levenson mask is used, since h = 0.6, the resolution limit and the separation resolution limit are 250 nm. As described above, the constant h greatly changes depending on the process used or the resist characteristics.

(Embodiment 1) Here, a case will be described in which a thin line which is difficult to be resolved by light exposure is formed by an electron beam lithography apparatus using a gate processing step. FIG. 3 shows design pattern data d1 composed of patterns p1 and p2 representing the energy beam irradiation region. In the design pattern d1, the width of the pattern p1 is 150 nm, the width of the other pattern p2 is 250 nm or more, and the pattern interval is all 300 n.
m or more. The wavelength of the projection exposure apparatus used is 24
Since the thickness is 8 nm and the NA is 0.6, the resolution limit and the separation resolution limit in light exposure using a Cr mask are about 250 n.
m. For this reason, a pattern having a width of 250 nm or more forms a latent image by light exposure, and a pattern smaller than 250 nm forms a latent image by electron beam lithography.

The data generation is performed according to the flowchart of FIG. First, from the design pattern data d1 input in the design pattern data input st1, st7 in FIG.
In step (1), a pattern resolvable by light exposure is extracted. Here, since all the pattern intervals are dimensions that can be separated and resolved by light exposure (interval S1 or more), a pattern satisfying only the pattern width condition of 250 nm or more (width W1 or more) is extracted, and light exposure mask pattern data generation st5 is performed. Generated light exposure mask pattern data d2. Next, the mask pattern data d2 for light exposure is removed from the input design pattern data d1, and a pattern p1 finer than 250 nm is removed.
I asked. The electron beam lithography apparatus used here has a maximum misalignment of 30 nm as a possibility of misalignment.
A pattern p3 enlarged by m was obtained, and a pattern p4 serving as a common area between the pattern data composed of the pattern p3 and the design pattern data d1 was generated as charged particle drawing data d4 by charged particle drawing data generation st6.

As another method for preventing misalignment, the direction where the pattern p2 exists in the portion where the pattern p1 is connected to the pattern p2, here the pattern p1
May be performed, and a charged particle drawing data may be generated by adding a pattern p5 as shown in FIG. 4 to the pattern p1.

Next, pattern transfer is performed using the pattern data divided into the light exposure region and the charged particle drawing region in this way, and the result of pattern formation is shown in FIG.
Shown in First, a silicon oxide film was formed as a gate oxide film over the high-concentration impurity layer 4801 formed by ion implantation. Further, a polycrystalline silicon film 4802 was formed by using a CVD (chemical vapor deposition) method. The steps up to here are the same as those of a normal transistor manufacturing method.

Next, a chemically amplified negative resist NEB22 manufactured by Sumitomo Chemical Co., Ltd.
μm thickness, and the first heat treatment is performed at 100 ° C. for 2 hours.
For 5 minutes to form a resist layer 4803. Further, it is selectively irradiated with an irradiation amount of 8 μC / cm ^{2 by} an electron beam drawing apparatus,
After forming the first acid generating portion in the resist, a second heat treatment is performed at 100 ° C. for 2 minutes to form a first resist reacting portion 480.
4 was obtained. Here, as the region to be drawn by the electron beam, a region of p4 in FIG.

Next, as a second energy ray, exposure was performed at a dose of 20 mJ / cm ² using a mask by a KrF excimer laser stepper as a light exposure apparatus. At this time, a mask is prepared in advance in accordance with the pattern data of p2 in FIG. 3, and a second acid generator is formed in the resist by excimer laser light passing through a region that is not shielded by the mask. By performing the heat treatment step at 95 ° C. for 2 minutes, a second resist reaction portion 4805 was formed. Here, by setting the temperature of the third heat treatment step lower than the temperature of the second heat treatment step, the influence on the first resist reaction part is reduced. But the third
Since the sensitivity of the first resist reaction portion is improved by performing the heat treatment step, the irradiation amount of the electron beam irradiation of the first energy beam irradiation is previously set to 10 μC / C when only the normal second heat treatment step is performed. It can be optimized by making it less than cm ² .

Further, a resist pattern 4806 was formed by immersion in a 2.38% aqueous solution of tetramethylammonium hydroxide. Using this resist pattern 4806 as a mask, dry etching is performed to remove the resist, thereby obtaining d in FIG.
This makes it possible to form a pattern 4807 according to the first design pattern. Subsequent steps were able to form a semiconductor device by advancing the steps based on a normal semiconductor device manufacturing method.

(Embodiment 2) Here, a case will be described in which electron beam lithography is performed using an element isolation process in a place where the distance between drawing regions that cannot be resolved by light exposure is small. This embodiment will be described with reference to the flowchart in FIG. Consider a case in which a pattern including a thin line portion having a width of 100 nm sandwiched between the high energy beam irradiation regions p6 and p7 is formed of a positive resist as in the design data d6 of FIG. Wavelength 248 nm,
The minimum size of the space that can be separated and resolved by an exposure apparatus with an NA of 0.6 is about 250 nm. Therefore, it was decided to extract only between narrow patterns having a width smaller than 250 nm and draw an electron beam.

First, the following processing was performed to extract a pattern having a pattern interval of 250 nm or more. st4
At 501, design pattern data d6 is input, and then st
The design pattern data d6 input in 4502 is
A pattern enlarged by / 2 nm was obtained, and a framed figure calculation was performed in st4503 to obtain pattern data d7 composed of patterns p9 and p10. Furthermore, st4504
Then, the pattern data d8 obtained by reducing the pattern data d7 by 250/2 nm was obtained, and the design pattern data d6 was removed therefrom at st4505 to obtain a pattern p13 as an area of 250 nm or less.

Next, the pattern p13 is set to 2 in st4506.
A pattern p14 enlarged by 50/2 nm was obtained. Here, the reason why the enlarged dimension is set to 250/2 nm is to make the interval between the light exposure patterns 250 nm or more. If the minimum interval at the time of design is known, (250-
(Minimum interval at design)) / 2 may be an enlarged dimension. s
At t4507, the pattern p14 was removed from the design data d6 to generate light exposure mask pattern data d11.
The electron beam drawing data d12 is obtained by obtaining a common area of the pattern data d10 and the design pattern data d6 in st4508, and becomes patterns p18 and p19.

In the electron beam lithography process using the electron beam lithography data obtained by the above processing, the positive resist RE-5000P
(Hitachi Chemical; trade name) forms a latent image on the wafer coated with the electron beam drawing data d12 by an electron beam drawing apparatus, and furthermore, the latent image is exposed by light exposure using a mask created based on the mask pattern data d11. Was formed and developed to form a designed pattern on the wafer.

(Embodiment 3) Here, a case will be described in which a continuous pattern is not divided into light exposure and electron beam drawing with the same element separation pattern as in Embodiment 2.

This embodiment will be described with reference to the flowchart of FIG. In the same manner as in the second embodiment, design pattern data d6 is input at st4601 for the same design pattern data as in the second embodiment shown in FIG.
A pattern with a nm enlargement is obtained, a framed figure calculation is performed in st4603, and pattern data d8 reduced by 250/2 nm is obtained in st4604. Next, by extracting the design pattern data d6 and the common area P8 in st4605, a light exposure mask pattern d14 shown in FIG. 6 was obtained. Further, in st4606, this was removed from the design pattern data d6 to obtain electron beam drawing data d13.

In this embodiment, a continuous pattern is drawn with the same energy beam. This causes an alignment error when different energy rays are used, and may degrade the performance of the semiconductor device. Therefore, by irradiating a continuous pattern with the same energy beam, such a possibility can be reduced. This embodiment is particularly effective in reducing the influence of the alignment error.

(Embodiment 4) Here, a case will be described where, when processing a gate layer, a dense and narrow pattern is formed by light exposure using a phase shift technique, and an isolated fine pattern is formed by electron beam drawing.

This embodiment will be described with reference to the flowchart of FIG. As shown in FIG. 7, in the design data d15 defining the energy beam irradiation region, a region in which the patterns p20 and p21 having a width of 180 nm are arranged at an interval of 180 to 200 nm, a pattern p24 having a width of 190 nm and a pattern p24 having a width of 250 nm. The pattern p23 is 600n with the adjacent pattern
Consider a case where there are regions that are spaced apart by m or more. The dense pattern region can be formed with a sufficient focus latitude even with a pattern having a width of 190 nm using a device having KrF and NA = 0.6 by using phase shift exposure that provides a phase difference of 180 degrees between adjacent patterns. is there. However, although the isolated pattern is wider than the dense pattern, the phase shift effect cannot be obtained because there is no adjacent pattern, and the focus latitude is reduced. Therefore, a portion having a distance of 500 nm or more from a pattern having a width of 190 nm or less was extracted and used as electron beam drawing data. The procedure is as follows.

First, design pattern data d15 is input in st4701, and the pattern is
/ 2 nm, and a frame calculation was performed in st4703 to obtain pattern data d16. Next, st4704
To change the pattern data d16 to (500/2 + 190/2)
The pattern data d17 was obtained by reducing the size by nm. Further, in st4705, the pattern data d17 is
The pattern data is expanded by 2 nm to obtain pattern data d18, and st
In step 4706, a common pattern of the pattern data d18 and the design pattern data d15 is extracted and used as mask pattern data d19 formed by light exposure. Further, in st4707, with respect to the pattern data d19, the phase was arranged between patterns close to 500 nm or less to obtain phase shift mask data. In st4708, the electron beam drawing data d20 was obtained by removing the pattern data d19 from the design pattern data d15.

The electron beam drawing data d obtained by the above processing
A latent image is formed by electron beam lithography using a mask 20, a latent image is formed by light exposure using a phase shift mask created based on the mask pattern data d19, and a pattern designed by subsequent development processing is formed on a wafer. Could be formed.

(Embodiment 5) Here, an ASIC (Applicat
FIG. 8 shows a case where one phase is assigned to a continuous light transmitting portion in a combination of light exposure and electron beam drawing using a Levenson type phase shift mask using a pattern in an ion specific integrated circuit). An example is described.

Here, the light exposure is performed at a wavelength of 248 nm,
Since a KrF excimer projection exposure apparatus with NA of 0.6 and σ 0.5 is used, h = 0.3 when a Levenson-type phase shift mask is used, and the resolution limit and the separation solution in light exposure from hλ / NA are obtained. The image limit is 130 nm at 260 nm except for the Levenson type phase shift mask. In the present embodiment, a design is made so that a pattern of 130 nm or less, which is difficult to resolve by light exposure, is not generated, and almost all patterns are formed by light exposure. In addition, even if a Levenson-type phase shift mask is used, a pattern having a low effect of improving resolution is formed by electron beam lithography. By setting the minimum design rule to a resolution limit of 130 nm or more in light exposure as described above, most patterns can be formed by light exposure, so that the electron beam drawing area is reduced, and higher productivity is achieved. Can be raised. For example, a pattern can be formed without special restrictions when designing a circuit of a semiconductor device.

FIG. 9 shows a flowchart of the process. First, a designed pattern is read in st1 (design pattern data input). Next, the shortest distance between any two translucent patterns is calculated in st2 (extraction of a close pattern pair), and all the pairs of patterns whose distance is equal to or smaller than a predetermined dimension L (resolution limit dimension in a binary mask) are determined. Ask. When the eight light-transmitting patterns (pt4 to pt11) shown in FIG. 8 were input, combinations of patterns adjacent to each other across a space of 250 nm or less were extracted as shown in FIG.
Phase assignment in an arbitrary order is performed to the 11 adjacent pairs in st3 (phase assignment). Here, phase assignment is performed from a close pair having a long opposing side length, and a phase of 0 degrees is set to pt4, pt6, pt8, and pt10 as pattern 2;
Pt5, pt7, p
Assigned to t9 and pt11 (FIG. 11). Next, st4
In (extraction of contradictory portions), the patterns between the translucent patterns to which the same phase has been assigned, while being a combination of patterns forming adjacent pairs, are shown in FIG.
1, extracted as er2.

In st5 (light exposure pattern data generation), the pattern pt10 in contact with the contradictory points er1 and er2
And pt4, and a pattern in which the interval between pt10 and pt6 is 250 nm or more. That is, the contradictory part er
A pattern er obtained by enlarging 1, er2 by 250/2 nm
By removing 1 ′ and er2 ′ (see FIG. 12) from the input design pattern data (FIG. 8), a pattern as shown in FIG. 13 was obtained. Here, the enlargement width is uniformly 250 / 2n.
The reason for setting m is that it takes time to obtain the pattern width of each contradictory part and change the enlargement width, or to obtain the minimum contradictory part pattern width. The pattern in FIG. 13 is a pattern in which a latent image is formed by light exposure, and is used as phase shift mask creation data by adding phase assignment information to the pattern shape data in FIG.

Next, the enlarged pattern er1 'of the contradictory part,
er2 ′ and the input design pattern (FIG. 8)
The electron beam drawing patterns eb1, eb2, eb3, eb extracted in st6 (charged particle drawing data generation) shown in FIG.
4 was used as electron beam drawing data.

A phase shift mask was created using the data (mask pattern data in FIG. 13) generated in the light exposure pattern data generation st5, and a latent image was formed on a wafer coated with a resist by a projection exposure apparatus using the mask. . further,
The electron beam drawing patterns eb1, eb2, eb3, eb4 generated in the charged particle drawing data generation st6 (see FIG. 14).
Was drawn by an electron beam drawing apparatus. As described above, after the latent image was formed by the two processes of light exposure and electron beam lithography, the development process was performed, and the input design pattern could be formed on the wafer. Here, the light exposure was performed first, but a similar pattern could be formed by performing the electron beam drawing first and then performing the light exposure.

Further, in the charged particle drawing data generation st6, as shown in FIG. 15, the electron beam drawing patterns eb1, eb2, eb3, eb4 once generated are converted into a size in consideration of the amount of misalignment between light exposure and electron beam drawing. Patterns eb1 ', eb2', eb3 ', e enlarged by 20 nm
b4 'is created and an overlapping pattern eb with the design pattern is created.
When 1 ″, eb2 ″, eb3 ″, eb4 ″ are generated and used for electron beam lithography, it is possible to prevent thinning when misalignment occurs at the boundary between the light exposure unit and the electron beam lithography unit. Was completed.

(Embodiment 6) Here, using a pattern of an ASIC, of a combination of light exposure and electron beam lithography using a Levenson-type phase shift mask, a continuous light-transmitting portion pattern is divided into a plurality of portions to determine the phase. FIG.
The pattern shown in FIG. Also in this example, a design was made so that a pattern of 130 nm or less, which is difficult to resolve by light exposure, was not generated.

FIG. 24 shows a flowchart of the process. First, the designed pattern data is read in st1 (design pattern data input). Next, in st11 (extraction of a pair of adjacent sides), a pair of sides (partial sides) adjacent to each other with the light-shielding portion of 250 nm or less interposed therebetween is extracted. In the pattern of FIG.
As shown in FIG. 17, adjacent sides li1 to li26, which are partial sides of the input pattern, were obtained, and 13 pairs of adjacent sides were obtained.
Further, in st12 (pattern division), the adjacent side li1
The input pattern is divided by a side having a length of ~ li26 or less, and a division pattern that includes each adjacent side is determined. In this example, the adjacent sides li1 to li1 obtained in FIG.
Using li26, as shown in FIG.
p1 to pp29 were obtained.

Next, based on the relationship between the adjacent side pair and the divided pattern including the adjacent side pair, a combination of the adjacent divided patterns is performed in st2 (extraction of the adjacent pattern pair). That is,
The combination of FIG. 19 was obtained. Based on this result, phase assignment to the divided pattern pair is performed in st13 (proximity pattern phase assignment). Here, as in the fifth embodiment, the phases are determined in descending order of the adjacent side length, but the phases may be determined by other methods. As shown in FIG. 20, the phase assignment results for the divided patterns are divided patterns pp1 and pp
3, pp5, pp7, pp16, pp17, pp18,
The phases of 0 degrees are set to pp19, pp23, and pp28, and the divided patterns pp9, pp11, pp12, pp13, and pp1
4, pp20, pp21, pp24, pp25, pp2
6, 180 degree phase was assigned to pp27.

A phase assignment inconsistency between the divided patterns including the adjacent side and a contradiction occurring when a phase is assigned to an unassigned divided pattern are extracted in st4 (contradiction extraction). In this example, first, inconsistent portion patterns er5 and er6 in the result of st13 (proximity pattern phase assignment)
I got Also, the divided patterns pp2, pp not assigned to the phase
4, pp6, pp8, pp10, pp15, pp22,
Of pp29, pp2, pp4, pp6, and pp29 are 0
Since the divided patterns pp10 and pp22 are assigned a phase of 180 degrees, a phase of 180 degrees is assigned to the divided patterns adjacent thereto. In the division patterns pp8 and pp15, phases of 0 degrees and 180 degrees are assigned to the adjacent division patterns.
er8. (FIG. 21) Next, in light exposure pattern data generation st5, the phase contradiction pattern is removed from the input design data to create phase shift mask data. For the contradiction pattern er5, er6 generated during the phase assignment to the adjacent pattern, the contradiction pattern er5, er6 is enlarged by 250/2 nm and removed from the input design pattern as in the fifth embodiment. Further, the phase contradiction patterns er7 and er8 were removed from the input design pattern to obtain a pattern as shown in FIG.

Further, charged particle drawing data generation st6
Then, the light exposure pattern data as shown in FIG. 22 is removed from the input design pattern (FIG. 16), and the obtained pattern is
The pattern in the common area with the input design pattern is enlarged by 0 nm and the electron beam drawing data eb5, eb6, eb
7 and eb8 were created (see FIG. 23). Here, the above 3
The expansion width of 0 nm is a value determined in consideration of the amount of misalignment between the light exposure and the electron beam drawing and the spread of the light-shielding portion generated between the light-transmitting patterns having a phase difference of 180 degrees.

A latent image is formed on a wafer coated with a resist in an electron beam lithography process using electron beam lithography data obtained by the above processing, and a phase shift mask created based on light exposure pattern data is used. Thus, a latent image was formed by light exposure, and a development process was performed to form a designed pattern on the wafer.

(Embodiment 7) In this embodiment, when pattern transfer is performed only by light exposure using the wiring layer process, a lower step portion having an insufficient depth of focus is extracted from the lower layer pattern data, and electron beam drawing is performed. The case of performing is described.

This is a case where a resist pattern having the shape of the pattern p31 shown in FIG. 26B is formed on the lower layer structure formed in the shape of the lower layer pattern p30 shown in FIG. Such a structure occurs particularly when performing multilayer wiring.

FIG. 27A shows a line segment AB in FIG.
26B, a film to be processed 8 is deposited to a thickness of 0.05 μm on the lower structure 5 having the shape of the lower pattern p30 formed on the substrate 10 in the state shown in FIG. In this case, the resist 4 is coated with 0.7 μm. As shown in FIG. 27A, the thickness of the resist 4 partially varies due to the influence of the lower step of 0.3 μm. FIG. 27 (a)
When the resist 4 is exposed to light, the focal position differs between a region having a pattern in the lower layer and a region not having the pattern. As a result, when the focal position is set in a region where a pattern is present in the lower layer, a pattern cannot be formed in a region where there is no pattern in the lower layer due to insufficient depth of focus. Conversely, if the focal position is set in a region where there is no pattern in the lower layer, it becomes impossible to form a pattern in a region where there is a pattern in the lower layer. In such a case, it is possible to obtain a desired pattern by dividing into a light exposure region and an electron beam irradiation region in a region where the lower layer pattern structure is present and a region where the lower layer pattern structure is not present.
This is because a larger depth of focus can be obtained in electron beam lithography than in the light exposure method.

FIG. 25 shows a flowchart of a process for dividing an electron beam drawing / light exposure pattern. First, st20
After fetching the lower layer pattern data by (Import lower layer pattern data), st1 (input design pattern data)
Import design pattern data with. Next, in st21 (step difference extraction), an area where a step occurs is extracted based on the lower layer pattern data. Here, since a certain area of the lower layer pattern p30 is convex, the lower layer pattern p30 is enlarged by 1 μm as a predetermined value X, and the frame processing is performed.
An enlarged lower layer pattern p32 shown in (b) was obtained. Here, the predetermined value X changes depending on the thickness and viscosity of the resist, the number of rotations at the time of resist application, and the size of the step in the lower layer data. The pattern p32 obtained by enlarging becomes a portion where a step is generated.

Next, st6 (generation of electron beam drawing data)
Then, as shown in FIG. 26C, an overlapping pattern p33 of the enlarged pattern data p32 and the design pattern data p31 was obtained to generate electron beam drawing data. Further, in st5 (light exposure mask pattern data generation), the electron beam drawing pattern p33 was removed from the design pattern data, and light exposure patterns p34 and p34a could be extracted.

FIG. 27B is a cross-sectional view taken along a line AB resulting from pattern formation based on the above data. As shown in FIG. 27B, the lower layer structure 5 causes large irregularities in the resist. The resist pattern 6 could be formed by drawing the pattern p33 in the portion where it was difficult to apply an electron beam, and the resist pattern 7 by light-exposing the other flat portions of the patterns p34 and p34a.

According to the above-described method, even if a step occurs, the pattern is not unresolved or the dimensional accuracy does not decrease due to insufficient focus, and the yield can be improved.

Further, from the light exposure patterns p34 and p34a in FIG. 26C, a small light exposure pattern p34a in contact with the electron beam drawing pattern p33 can be extracted and used as an electron beam drawing pattern. This is because the obtained electron beam drawing pattern p33 is set to a predetermined value, for example, 0.5 here.
It can be obtained by performing enlargement by μm, performing a frame calculation, then reducing by 0.5 μm, and extracting a common area with the pattern data p31. By doing so, for example, it is possible to prevent the light exposure area from becoming a fine pattern. Further, since the pattern is divided into three as shown in FIG. Although a shot was necessary, by making it as shown in FIG. 28, electron beam drawing can be performed with one shot, and an improvement in throughput can be expected.

(Embodiment 8) Here, a case will be described in which the pattern is the same as that of Embodiment 7, but the lower layer structure formed by the lower layer pattern is concave. In the case where the structure formed by the lower layer pattern p30 in FIG. 26A is a groove, FIG. 29A shows a cross-sectional shape along a line AB after resist application.
The flowchart of the process uses FIG. 25 described above. When the lower layer structure has a concave shape, that is, when there is a groove, the film thickness of the resist 4 is increased inside the groove. Therefore, the thick film portion of the resist 4 is extracted as a step, and the resist pattern formed in this region is drawn by an electron beam. In the seventh embodiment, the lower layer pattern data is enlarged by 1 μm as the predetermined value X, but in the present embodiment, X = 0 and the lower layer pattern data p3
0 was extracted as a region where the resist film thickness was large. Hereinafter, as in Example 7, the overlapping portion between the lower layer pattern p30 and the design pattern data p31 was used as electron beam drawing data, and the electron beam drawing data was removed from the design pattern data to obtain a light exposure pattern.

FIG. 29B is a cross-sectional view taken along line AB resulting from pattern formation based on the above data. The resist pattern 6 in the groove between the lower structures 5 is drawn by an electron beam. The other portions of the resist pattern 7 are exposed to light,
High precision and good shape could be formed.

(Embodiment 9) In optical lithography, there is a problem of halation in which reflected light from a step portion is concentrated and the pattern size changes. As a countermeasure, it is conceivable to perform electron beam drawing to form a pattern at a location where halation occurs. Here, a case will be described in which, in the wiring layer forming step, the contour of the lower layer pattern is extracted as a base step region, that is, a region where halation occurs, and a pattern formed in that region is formed by electron beam drawing.

The lower layer pattern p35 shown in FIG.
A pattern p39 shown in FIG. FIG. 31A is a cross-sectional view taken along line CD of FIG.
Shown in FIG. 30 (a) shows that copper is used as a base structure 5.
4 μm, and a silicon oxide film having a thickness of 0.
This is a case where 3 μm is deposited and the resist 4 is applied to a thickness of 0.5 μm. In order to extract the step portion in FIG.
From the pattern obtained by enlarging the pattern p35 by 0.3 μm as the predetermined value X, the pattern p35 is set to 0.
Pattern p38 from which the pattern reduced by 3 μm is removed
Was extracted (FIG. 30 (b)). Next, an area where the pattern p39 and the pattern p38 where the pattern is to be formed overlaps was set as an electron beam drawing pattern p40, and a pattern obtained by removing the electron beam drawing pattern p40 from the pattern p35 was set as a light exposure pattern p41.

FIG. 31B is a cross-sectional view in which a pattern is formed based on the above data. Resist pattern 6 on step
By electron beam lithography, and the resist pattern 7
By forming a latent image by light exposure, it was possible to form a pattern without the problem of halation.

(Embodiment 10) As another embodiment, in a case where a concave structure having a small width among the lower layer structures is embedded and a concave structure having a large width remains as a step, a step region is extracted and the step region is extracted. A method of drawing only a resist pattern formed on a region by electron beam will be described. FIG. 44 shows a flowchart of the process.

In the step of forming a film on the lower layer structure by CVD (Chemical Vapor Deposition) and the subsequent CMP (Chemical Mechanical Polishing), fine grooves among the concave grooves of the lower layer are buried and flattened, A gentle step occurs in the large groove. Therefore, a case will be described in which only large recesses are extracted as step portions from the lower layer pattern data in the wiring step, and a pattern formed thereon is drawn by electron beam drawing.

FIG. 32A shows a lower layer pattern composed of a pattern p42 forming a narrow groove and a pattern p43 forming a thick groove, and a pattern p45 formed here. FIG. 33 shows a process flow of the cross-sectional structure along the line segment EF. In FIG. 33A, the patterns p42 and p
In a lithography and etching process using the lower layer 43, the lower layer structure 5 having a narrow groove and a thick groove is processed. A film 8 to be processed is deposited thereon by CVD (FIG. 33).
(B)) Then, as a result of performing CMP, FIG.
As shown in (1), there was almost no groove with a small line width, and a groove step remained in a portion exceeding a certain line width. Here, since the film thickness to be processed is 0.2 μm, the width of twice or less, that is, the groove of 0.4 μm or less is completely flattened and the step is eliminated. Strictly speaking, the width of the groove where the unevenness of the step is eliminated changes depending on the process conditions such as the film thickness and film quality of the film to be processed, but it may be generally twice or less.

A method of extracting the step portion of the structure formed up to here will be described. 32A in advance at st4401.
Of the lower layers p42 and p43 are input. Next s
At t4402, the pattern was reduced by １ ／ (here, 0.2 μm) the maximum width of the groove to be flattened, and further, at st4403, only the pattern p43 was extracted by being enlarged by the previous reduced dimension. Grooves having a width of 0.2 μm or less disappeared in the first reduction process, and grooves larger than the original width of 0.2 μm could be extracted by further enlarging.

FIG. 33 is a sectional view showing the result of depositing a second film 9 to be processed by the following process and applying a resist 4.
(D). A gradual change in the film thickness occurs around the groove where the step remains, and the step is substantially widened. In consideration of this, the pattern p43 is set to 0.1 in st4404.
With the pattern p44 obtained by enlarging by μm as a step region, of the pattern p45 to be formed, a portion formed on the pattern p44 is a charged particle drawing pattern, and the other portions are formed by light exposure. That is, st4
At 405, design pattern data is input, and at step 4406, a charged particle drawing pattern is generated. At st4407, the charged particle drawing pattern is removed from the design pattern data to generate a light exposure mask pattern.

FIG. 33E is a sectional view after pattern formation.
Shown in The resist pattern 6 was formed by electron beam lithography, and the resist pattern 7 was formed by light exposure.

In this embodiment, the area of the input pattern data as the lower layer pattern data is the groove area. Contrary to the present embodiment, even when the region representing the lower layer pattern data is convex, only the thick pattern portion is detected as a step region by the same processing.

(Embodiment 11) In this embodiment, a method of extending the mask size of the light exposure pattern and the electron beam drawing pattern data according to the pattern size of the light exposure / electron beam drawing area will be described. The method according to the present embodiment is effective when a continuous pattern is formed on the same resist using different energy beams of light and electron beams.

FIG. 34A shows a case where there is no misalignment ideally. However, in many cases, pattern transfer is performed by different energy beam irradiation methods,
A connection shift occurs due to an influence of interlayer alignment error or the like. FIG. 34B shows a case where pattern separation occurs, and FIG. 34C shows a case where pattern overlap occurs.

As shown in FIG. 35, in order to prevent a failure from occurring even if such a connection shift occurs, a mask pattern extension section 20 for designing mask data of a region to be exposed to light longer than design data is used. Provide. In FIG. 35, the extension dimension of the light exposure pattern toward the electron beam drawing area is changed according to the width of the light exposure pattern so as to enable high-precision connection. This is because the shrinkage of the pattern front end portion increases as the design dimension of the pattern formed by light exposure decreases. If the pattern is simply extended by the same length, disconnection occurs at the connection portion of the thin pattern, and the pattern becomes thick at the connection portion of the thick pattern. In particular, this tendency becomes remarkable when the wavelength for performing the light exposure is shortened. By referring to the relationship between the pattern size of the light-exposed portion and the extension width as shown in FIG. 36, by changing the pattern extension amount, it is possible to form a high-accuracy pattern in which the problem of connection misalignment is reduced. That is, as shown in FIG. 36, the pattern extension amount may be the same even when the pattern size of the light-exposed portion is reduced to 0.5 μm, but the pattern extension amount is monotonously increased as the pattern becomes thinner than 0.5 μm. Is preferred.

(Embodiment 12) In the above embodiment, the pattern of the light exposure area is simply extended, but the provision of a projection is also effective. An example in which a projection is provided will be described with reference to FIG. When the connection shift shown in FIG. 34 (c) is shifted in the direction in which the two energy beam irradiations overlap, the pattern of the overlapping portion of the electron beam drawing unit and the light exposure unit is thickened by simply extending the pattern. And may stick to adjacent patterns. In particular, this is a problem when the pattern is dense at the light exposure / electron beam drawing connection portion. In this case, as shown in FIG. 37, the portion where the pattern of the light exposure portion in the light exposure / electron beam drawing connection portion is extended is formed as the protrusion 21, thereby reducing the overlapping portion of the pattern. Can be reduced. FIG. 38 shows a typical example of the shape of the projection 21.
Of these, the shapes shown in FIGS. 38A and 38B were particularly effective.

(Embodiment 13) In this embodiment, a method of extending the pattern data of the electron beam drawing area to the light exposure area in the connection method at the connection portion of the light exposure / electron beam drawing area will be described. As shown in FIG. 39, by extending the pattern data of the electron beam drawing area into the light exposure area at the connection part of the light exposure / electron beam drawing area, no disconnection occurs even if a connection shift occurs. The shape of the extended pattern may be either the pattern of the electron beam drawing area as it is, or a convex shape narrower than the width of the electron beam drawing area may be extended into the light exposure area. Then, a convex projection was used. By the latter method, it is possible to prevent the width of the pattern dimension from being increased by irradiating both energy rays of the light exposure and the electron beam.

In electron beam writing, in the case of a concave projection as shown in FIG. 38 (a), when using a variable rectangular type electron beam writing apparatus, the number of shots is reduced by two from that of normal writing. The number of shots must be increased, but in the case of the convex type, only one shot is added. By using the convex shape as described above, the increase in the number of shots can be minimized, and the effect on the connection deviation is high.

(Embodiment 14) In this embodiment, the proximity effect correction (irradiation amount correction) in the vicinity of the light exposure region and the charged particle region will be described with reference to FIG. Proximity effect correction of a conventional electron beam lithography apparatus divides a drawing area into predetermined small areas (mesh), calculates a drawing pattern area in the mesh, and determines a self-mesh (a certain mesh) and its own mesh. Interpolation processing of the pattern area density is performed between nine neighboring meshes, and proximity effect correction is performed by changing the irradiation amount in the mesh according to a set value prepared in advance (for example, JP-A-59-139625).
This method is currently widely used as a proximity effect correction using an area density map.

If there is a light exposure region in a part of the same resist layer, it is necessary to correct the proximity effect of the electron beam drawing region in consideration of the proximity effect to the electron beam drawing region by light exposure.
At an acceleration voltage of 20 to 50 kV, which is usually used in electron beam lithography, the range over which the proximity effect reaches is about several tens of μm. Further, in the light exposure, the degree of the proximity effect greatly changes within the range where the proximity effect is exerted. Therefore, the mesh size for calculating the pattern area in the light exposure region is reduced, and the mesh size of the electron beam drawing region within the range where the proximity effect of the light exposure is affected is reduced.

That is, as shown in FIG. 40 (a), in the area within 2 μm from the boundary of the light exposure / electron beam drawing area (both the light exposure / electron beam drawing area), the mesh size for calculating the pattern area is calculated. Is 0.2 μm, and in the electron beam drawing area separated from the light exposure / electron beam drawing area boundary by 2 μm or more, 5 μm, which is almost the same as the mesh size when only electron beam drawing is performed.
m, the area calculation is not performed in the light exposure region separated from the light exposure / electron beam drawing region boundary by 2 μm or more. FIG. 40B is an enlarged view of a region within 2 μm from the boundary of the light exposure / electron beam drawing region in FIG.

After the calculation of the pattern area ratio in each mesh, in the electron beam writing area of the 5 μm square mesh, only the influence in the electron beam writing area is considered in the same manner as in the proximity effect correction of normal electron beam writing. Thus, the irradiation amount of each mesh was determined.
On the other hand, in the electron beam drawing area of the 0.2 μm square mesh, the proximity effect correction amount of only the influence in the electron beam drawing area
The irradiation amount was determined from the total value of the proximity effect correction amount in the light exposure region of the μm square mesh.

By the above-mentioned method, it is possible to form a pattern with high dimensional accuracy without any pattern deformation or the like due to excessive irradiation or insufficient irradiation in the vicinity of the electron beam irradiation area and the light exposure area. Was.

(Embodiment 15) In this embodiment, when the pattern is designed to be divided into the light exposure data and the electron beam drawing data, the design is such that the influence of the proximity effect due to other energy rays does not easily occur. The method will be described with reference to the flowchart in FIG.

First, light exposure / electron beam drawing area boundary extraction s
At t22, a boundary region between the light exposure region and the electron beam drawing region is searched for. Next, in the area ratio calculation st23 of the extraction region, the pattern area ratio near the light exposure / electron beam drawing boundary in the electron beam drawing region is obtained. At this time, the entire area ratio may be obtained, but in order to shorten the calculation time, the area ratio of a region near the boundary, here, within 10 μm from the light exposure region in the electron beam drawing region, was obtained. The mesh used to determine the area ratio of the electron beam drawing area was 5 μm square. Next, st24
To determine whether the area ratio of the electron beam drawing area exceeds 40%,
If it exceeds, an abnormality is displayed in st25, a predetermined value, in this case, the area of the 5 μm electron beam drawing region is enlarged in st26, and the process returns to st23 to newly calculate the area ratio of the electron beam drawing region. This is repeated until the area ratio falls below 40%. Alternatively, when the area ratio of the electron beam drawing area exceeds 40%, a display may be made so that the designer can recognize it, and the electron beam drawing area may be enlarged by the designer himself.

With the above method, it is possible to reduce the influence of the proximity effect due to the electron beam drawing in the light exposure area. The proximity effect in the electron beam drawing area depends on the acceleration voltage, but several tens μm.
m is also affected. However, the effect decreases as the distance increases. Further, the influence of the proximity effect largely depends on the area ratio at which writing is performed, and the influence of the proximity effect increases as the area ratio increases. Therefore, by connecting patterns in a region lower than a certain drawing area ratio as in the present embodiment, it is possible to reduce the influence of the proximity effect on the light exposure region due to electron beam drawing.

In this embodiment, only the effect of electron beam lithography on the light exposure area is reduced. However, in order to reduce the effect of light exposure in the electron beam lithography area, the influence of the electron exposure on the electron beam lithography area is reduced. The area ratio of the predetermined area may be obtained, and similarly, when a design exceeding a certain area ratio or division is performed, a display may be made to a designer.

Embodiment 16 A semiconductor manufacturing apparatus according to the present invention will be described with reference to FIG. FIG. 43 is a flowchart of the process. As shown in FIG. 42, the present apparatus includes a first wafer holder 11, an electron beam drawing unit as a first energy beam irradiation unit 12, and a KrF excimer laser stepper (sequential (Transfer type transfer unit), heat treatment units 13 and 15 variable from room temperature to 300 ° C., second wafer holding table 17, and control for managing respective processes of transport unit 16 for continuously performing the respective processes. It is composed of a unit 18.

The electron beam drawing unit of the first energy beam irradiation unit 12 draws an area where transfer is difficult with a KrF xima laser stepper. For example, the pattern area to be drawn is the pattern defined by the first to eleventh embodiments. On the other hand, the KrF excimer laser of the second energy beam irradiation unit 14 performs pattern transfer by using a mask designed in advance. Then, the control unit 18 transports the wafer from the wafer holding table 11 to the first energy beam irradiation unit 12, the heat treatment unit 13, the second energy beam irradiation unit 14, the heat treatment unit 15, and the wafer holding table 17 using the transfer unit 16 using the transfer unit 16. Is done. Further, the control unit 18 predicts the centralized management and end time of each processing unit, and distributes the substrates to be processed. In particular, the transfer of the substrate to be processed to the first energy beam irradiation unit is started such that the processing waiting time between the processings becomes equal to or less than a certain time. With such an apparatus configuration, particularly, the acid generated in the resist by the first energy ray irradiation can reduce the time from the first heat treatment to the time of performing the second heat treatment step or reduce the time to a predetermined time. It becomes possible. By doing so, even in a method of mixing the same layer of light and electron beams having different processing speeds, it is possible to shorten or keep the laying time, which is particularly problematic in a chemically amplified resist, and to improve the dimensional accuracy. A high pattern can be formed.

As shown in FIG. 42, in this embodiment, a plurality of first energy beam irradiation units, a plurality of heat treatment units, and a plurality of second energy beam irradiation units are provided. In the heat treatment step, the temperature performed in the first heat treatment part and the temperature performed in the second heat treatment part are often different, and the type of resist,
In particular, since there are two types, a positive type in which the energy beam irradiation unit dissolves in the developer and a negative type in which the energy beam irradiation unit does not dissolve in the developer, the temperature change is frequently performed in one heat treatment unit, and the throughput decreases, Problems such as low controllability occur. However, this problem is solved by providing a plurality. In this embodiment, an electron beam was used as the first energy beam irradiation unit, and a KrF excimer laser stepper was used as the second energy beam irradiation unit. The processing speed of the electron beam irradiation unit is lower than the processing speed of the KrF excimer laser stepper. Therefore, by providing a plurality of electron beam irradiation units on one stepper, the processing speed per unit time can be increased, and the operating rate of each energy beam irradiation unit can be increased. Further, here, two steppers as the second energy beam irradiation unit were installed. This is because the processing time of the stepper can be processed in a substantially constant processing time regardless of the design data. However, the processing time of the electron beam irradiation unit varies greatly depending on the design data. May be shorter than the processing time of one stepper. Therefore, this problem can be solved by providing a plurality of steppers.

On the other hand, when a plurality of electron beam irradiation units and a plurality of steppers are installed as described above, one of the devices is in a state of waiting for processing, and the operating rate is reduced. In that case, it is also possible to operate each energy beam irradiation unit independently. In that case, the wafer is directly transported from the holding table 11 to the second energy beam irradiation unit 14, or is subjected to the process of the first energy beam irradiation device 12 and the heat treatment process by the first heat treatment unit 13. Transport to The control at this time is possible by registering the processing in the control unit 18 in advance.

At this time, when the interrupt stepper exposure has already been performed and there is a wafer in the electron beam lithography apparatus, (1) when the electron beam lithography end time is later than the stepper exposure time; , (2)
When the electron beam drawing end time is earlier than the stepper exposure time;
After the stepper exposure of the wafer during the electron beam drawing, the stepper exposure is performed. The prediction of each energy beam irradiation time is stored and managed by a catalog name.

Further, when a plurality of steppers are used, each stepper causes a cause of deterioration of positioning accuracy due to lens distortion. Therefore, conversion of pattern data by an electron beam is performed according to the shape of each stepper distortion. In this case, the control unit determines which stepper to use for exposure before drawing the electron beam, and adds the lens distortion correction data of the stepper to the drawing data. The correction data is recorded in the control unit 18 or a new external storage device in advance, and the data is accessed and corrected at the time of electron beam drawing. By doing so, it becomes possible to irradiate an electron beam corresponding to each stepper lens distortion, so that an improvement in alignment accuracy can be expected.

Next, the processing flow will be described with reference to FIG. In this embodiment, four types are prepared as shown in FIG. 49, and the processing time of each type is known in advance. First,
When the type A is input, from the drawing result drawn before,
Charged particle drawing processing from the control unit, heat treatment after charged particle drawing,
The information on the light exposure processing and the heat treatment after light exposure and the respective processing times A _EB , A _EB-PEB , A _L , and A _L-PEB are read out, and the processing start and end times are predicted, and the processing is performed. The process starts (st4301). Next, in st4302, selection is made as to whether or not to perform charged particle drawing. However, the type A becomes YES to perform charged particle drawing, and proceeds to st4303. In st4303, since the type A is the first processing type in the present embodiment, the processing is not overlapped with another type and the processing proceeds to the next processing without waiting time. Then st43
At 05, it is distributed to each charged particle drawing apparatus, and st4306
Heat treatment. Further, in st4307, it is determined whether or not to perform light exposure. The type A performs the next light exposure processing in st4308 in order to perform light exposure. Then, a heat treatment after light exposure is performed in st4309, and the processing ends.

Next, a case will be described in which the above-described processing is performed and, at the same time, the processing of the type B is started. Type B
From the drawing result previously drawn in st4301, information that the control unit performs charged particle drawing processing, heat treatment after charged particle drawing, light exposure processing, and heat treatment after light exposure, and further, each processing time B _EB , B _EB-PEB , B _L , B _L-PEB
Is read. At this time, priority is given to the type A currently being processed, and a time is set so that the waiting time of each of the charged particle drawing processing, the heat treatment after the charged particle drawing, the light exposure processing, and the heat treatment after the light exposure is within a predetermined time. The distribution is also performed. The predetermined time can be set to, for example, 10 minutes or less, or the end time of the post-light exposure heat treatment after the end of charged particle drawing can be set to, for example, 2 hours or less. The predetermined time varies depending on the type of resist, heat treatment conditions after energy beam irradiation, and dimensional accuracy required for each product. At this time, if the waiting time of each process of the type B exceeds the predetermined time, after waiting for the charged particle drawing in st4303 to be performed later, the process is started when the waiting time becomes shorter than the predetermined time. For example, the processing of the type B is started after T _X minutes of the type A, the waiting time of each processing time is 0 minutes, the number of the charged particle drawing apparatuses is two, and the other processing apparatuses are each one. _{If, B EB + B EB-PEB} + T X ≦ A EB B EB + B EB-PEB + B L + T X ≦ A EB + A EB-PEB B EB + B EB-PEB + B L + B L-PEB + T X ≦ A EB + A EB _-PEB
When the + all A _L is met, the electron beam lithography process varieties B during processing for electron beam lithography process varieties A is finished, that overlap in subsequent varieties A in the process, B are both the same device Since there is no processing, the processing of the type B is started without the processing waiting time in st4303.

[0117] Alternatively _{B EB + T X ≦ A EB} + A EB-PEB B EB + B EB-PEB + T X ≦ A EB + A EB-PEB + A L B EB + B EB-PEB + B L + T X ≦ A EB + A EB-PEB + A _L + A
_When all of the _L-PEBs are satisfied, the processing of the type B is always started after the processing of the type A is completed.
The processing is started without the processing waiting time in 4303.

However, if none of the above two conditions is satisfied, the processing wait time T _ST in st4303 is set so that the processing of the types A and B does not overlap in the same apparatus. Backlog T _ST at this time is _{B EB + T X + T ST} ≦ A EB + A EB-PEB B EB + B EB-PEB + T X + T ST ≦ A EB + A EB-PEB + A L B EB + B EB-PEB + B L + T _X + T _ST ≤ A _EB + A _EB-PEB + A
_Make settings to satisfy all conditions of _L + A _L-PEB . This setting of T _ST is performed in st430.

Next, it is determined whether or not to perform charged particle drawing in st4302, but the type B proceeds to st4303 with YES to perform charged particle drawing. In the steps below this, the processing time is estimated in advance in st4301 and the processing is awaited in st4303.
Each processing waiting time becomes equal to or less than a predetermined value, and dimensional accuracy can be increased.

By performing the above calculations and processes even in the case of performing the processes of the types C and D, the waiting time of each process or the time between the first energy ray irradiation process and the last heat treatment is set within a predetermined time. It becomes possible to.

For the varieties A and B, both charged particle drawing and light exposure were performed. In the case of type C, a method of performing only charged particle drawing and performing processing without performing light exposure will be described. In this case, as in the case of the product type B, the processing times C _EB and C _EB-PEB are read from the drawing result previously drawn in st4301 by the control unit. Next, in st4302, it is determined whether or not to perform charged particle drawing. However, the type C becomes YES to perform charged particle drawing, and proceeds to st4303. After that, the process proceeds to st4307 as in the case of the type B. In st4307, it is determined whether or not to perform light exposure. The type C only performs charged particle drawing, and does not perform light exposure.

In the case of the type D, only the light exposure is performed and the charged particle drawing is not performed. When the processing of the type D is started, in st4301, each processing time D _EB and D _EB-PEB are read from the drawing result drawn previously by the control unit. Next st
At 4302, whether or not to perform charged particle drawing is determined.
Proceed to 4310. At this time, priorities are given to the processes A, B, and C which are currently being processed, and the time distribution is performed so that the processing waiting time from the light exposure process to the post-light exposure heat treatment is within a predetermined time. If the processing time is exceeded, a light exposure processing wait is performed in st4310, so that the processing wait time from the light exposure processing to the heat treatment is adjusted to be within a predetermined time.

By performing the above-described flow, the processing time from the first energy ray irradiation processing to the end of the last energy ray irradiation processing can be shortened. This makes it possible to suppress dimensional fluctuation due to a long processing wait time, and to obtain high dimensional accuracy.

By using the apparatus configuration as in this embodiment, the operation rate of each energy beam irradiation apparatus is increased, the number of substrates to be processed per unit time is improved, and high dimensional accuracy and high positional accuracy are realized. Becomes possible.

[0125]

According to the method of generating pattern data for lithography of the present invention, a pattern suitable for light exposure and an inappropriate pattern can be separated to generate light exposure pattern data and charged particle drawing pattern data. Was. Further, according to the pattern data generation method for lithography of the present invention, it was possible to eliminate inconsistency in the phase assignment of the light exposure mask used for pattern formation using the Levenson-type phase shift technique. Further, according to the semiconductor manufacturing apparatus of the present invention, light exposure and charged particle drawing can be performed efficiently. Further, according to the method for manufacturing a semiconductor device of the present invention, a highly reliable semiconductor device can be manufactured.

[Brief description of the drawings]

FIG. 1 is a flowchart of pattern data generation according to a first embodiment of the present invention.

FIG. 2 is a plan view of a conventional light exposure mask.

FIG. 3 is a plan view showing a pattern data generation procedure according to the first embodiment of the present invention.

FIG. 4 is a plan view of corrected electron beam drawing data according to the first embodiment of the present invention.

FIG. 5 is a plan view showing a pattern data generation procedure according to a second embodiment of the present invention.

FIG. 6 is a plan view showing a pattern data generation procedure according to a third embodiment of the present invention.

FIG. 7 is a plan view showing a pattern data generating procedure according to a fourth embodiment of the present invention.

FIG. 8 is a pattern plan view of design pattern data according to a fifth embodiment of the present invention.

FIG. 9 is a flowchart of pattern data generation according to a fifth embodiment of the present invention.

FIG. 10 is a diagram showing a combination of proximity pattern pairs according to the fifth embodiment of the present invention.

FIG. 11 is a pattern plan view showing a phase shift assignment result and a contradictory part according to the fifth embodiment of the present invention.

FIG. 12 is a pattern plan view showing a phase shift assignment result and a contradictory part according to the fifth embodiment of the present invention.

FIG. 13 is a pattern plan view showing a phase shift assignment result according to the fifth embodiment of the present invention.

FIG. 14 is a pattern plan view showing a phase shift assignment result according to the fifth embodiment of the present invention.

FIG. 15 is a pattern plan view showing a phase shift assignment result according to the fifth embodiment of the present invention.

FIG. 16 is a pattern plan view of design pattern data according to a sixth embodiment of the present invention.

FIG. 17 is a plan view showing a proximity pattern pair of design pattern data according to a sixth embodiment of the present invention.

FIG. 18 is a plan view showing a divided pattern according to the sixth embodiment of the present invention.

FIG. 19 is a diagram showing a combination of proximity pattern pairs according to the sixth embodiment of the present invention.

FIG. 20 is a pattern plan view showing a phase shift assignment result according to the sixth embodiment of the present invention.

FIG. 21 is a pattern plan view showing a phase shift assignment result and a contradictory part according to the sixth embodiment of the present invention.

FIG. 22 is a plan view illustrating a phase mask for light exposure according to a sixth embodiment of the present invention.

FIG. 23 is a plan view illustrating a pattern of electron beam drawing data according to a sixth embodiment of the present invention.

FIG. 24 is a flowchart of pattern data generation according to the sixth embodiment of the present invention.

FIG. 25 is a flowchart of pattern data generation according to the seventh embodiment of the present invention.

FIG. 26 is a plan view showing a pattern data generating procedure according to a seventh embodiment of the present invention.

FIG. 27 is a sectional view of a structure formed by the pattern shown in the seventh embodiment of the present invention.

FIG. 28 is a plan view of a pattern according to a seventh embodiment of the present invention.

FIG. 29 is a sectional view of a structure formed by the pattern shown in Embodiment 8 of the present invention.

FIG. 30 is a plan view showing a pattern data generation procedure according to a ninth embodiment of the present invention.

FIG. 31 is a sectional view of a structure formed by the pattern shown in the ninth embodiment of the present invention.

FIG. 32 is a plan view showing a pattern data generation procedure according to the tenth embodiment of the present invention.

FIG. 33 is a sectional view of a structure formed by the pattern shown in the tenth embodiment of the present invention.

FIG. 34 is a plan view illustrating a connection shift between an electron beam drawing area and a light exposure area.

FIG. 35 is a plan view illustrating connection between an electron beam drawing area and a light exposure area according to an eleventh embodiment of the present invention.

FIG. 36 is a diagram illustrating a relationship between a pattern dimension of an optical exposure unit and an extension width.

FIG. 37 is a plan view illustrating connection between an electron beam drawing area and a light exposure area according to a twelfth embodiment of the present invention.

FIG. 38 is a plan view illustrating connection between an electron beam drawing area and a light exposure area according to a twelfth embodiment of the present invention.

FIG. 39 is a plan view illustrating connection between an electron beam drawing area and a light exposure area according to a thirteenth embodiment of the present invention.

FIG. 40 is a plan view illustrating a mesh for calculating an area ratio of proximity effect correction between a light exposure unit and an electron beam drawing unit according to a working example 40 of the invention.

FIG. 41 is a flowchart for explaining Embodiment 15 of the present invention;

FIG. 42 is a schematic plan view of a semiconductor manufacturing apparatus according to Embodiment 16 of the present invention.

FIG. 43 is a flowchart of a process using the semiconductor manufacturing apparatus according to the sixteenth embodiment of the present invention.

FIG. 44 is a flowchart of pattern data generation according to the tenth embodiment of the present invention.

FIG. 45 is a flowchart of pattern data generation according to the second embodiment of the present invention.

FIG. 46 is a flowchart of pattern data generation according to the third embodiment of the present invention.

FIG. 47 is a flowchart of pattern data generation according to the fourth embodiment of the present invention.

FIG. 48 is a plan view showing a pattern data generation procedure according to the first embodiment of the present invention.

FIG. 49 is a view for explaining processing of the sixteenth embodiment of the present invention;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Light shielding part 2 ... Pattern (Allocate 0 degree phase) 3 ... Pattern (Allocate 180 degree phase) 4 ... Resist 5 ... Lower layer structure 6 ... Resist pattern (electron beam drawing) 7 ... Resist pattern (light exposure) 8) Film to be processed 9 ... Second film to be processed 10 ... Substrate 11 ... First wafer holder 12 ... First energy beam irradiation unit 13, 15 ... Heat treatment unit 14 ... Second energy beam irradiation unit 16 ... Transfer section 17 ... Second wafer holding table 18 ... Control section 20 ... Mask pattern extension section 21 ... Protrusion d1 to d20 ... Pattern data eb1 to eb4 ... Electron beam drawing pattern eb1 'to eb4' ... Electron beam drawing pattern ( Eb1 "to eb4" eb5 to eb8 ... electron beam drawing patterns er1, 2, 5 to 8 ... phase assignment contradiction er1 'to 2' ... phase assignment contradiction (part of enlarged pattern) li1 to li26: Proximity sides pp1 to pp29: Divided patterns pt1 to pt11, pt20 to pt25: Light transmission patterns p1-p32, p35, p38, p42 to p45: Patterns p33, p40, p46: Electron beam drawing patterns p34, p41, p47: Light exposure pattern

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H095 BA08 BB02 BB10 BB33 2H097 AA03 BB01 BB10 CA16 LA10 LA12 5F046 AA05 AA09 AA25 CB17 5F056 AA22 AA31 CA04 CB03 CB40 CD02 FA08

Claims (34)

[Claims] An inputting step of the design pattern data and a step of determining whether an area irradiated with the energy ray of the design pattern data is equal to or more than a predetermined width W1 or an interval between mutually adjacent areas irradiated with the energy ray of the design pattern data. A light exposure pattern extracting step of extracting a pattern satisfying at least one condition of a predetermined width S1 or more from the design pattern data as light exposure pattern data, and removing the extracted light exposure pattern data from the design pattern data. A charged particle drawing pattern extraction step of extracting charged particle drawing pattern data. 2. An expanding step of enlarging the extracted charged particle drawing pattern data after the charged particle drawing pattern extracting step, and extracting a common part of the expanded charged particle drawing pattern data and the design pattern data. 2. The lithographic pattern data according to claim 1, further comprising: an extracting step of adding the extracted common portion to the charged particle drawing pattern data to obtain corrected charged particle drawing pattern data. Generation method. 3. The step of inputting the design pattern data, wherein the region irradiated with the energy beam of the design pattern data is a region having a predetermined width W1 or more and adjacent to each other to be irradiated with the energy beam of the design pattern data. Extracting, from the design pattern data, a pattern whose interval is smaller than the predetermined width S1 as first pattern data; expanding the first pattern data; and extracting the expanded first pattern data. A light exposure pattern extraction step of extracting light exposure pattern data based on the design pattern data, and a charged particle drawing for extracting the charged particle drawing pattern data by removing the extracted light exposure pattern data from the design pattern data And a pattern extracting step. 4. The method according to claim 3, wherein the extracting step is performed by enlarging the design pattern data, performing a frame calculation, and removing the design pattern data from a pattern obtained by reducing the design pattern data. A method for generating pattern data for lithography. 5. The predetermined width W1 and the predetermined width S1 are defined as follows: W1 = h × (exposure light wavelength) / (lens numerical aperture of exposure apparatus) S1 = k × (exposure) The value of the constant h is in the range of 0.5 ≦ h ≦ 0.8, and the value of the constant k is in the range of 0.5 ≦ k ≦ 0.8. 5. The lithography pattern data generation method according to claim 1, wherein the lithography pattern data is a range. 6. A design pattern data input step, wherein a pattern in which an interval between adjacent regions irradiated with energy rays of the design pattern data is equal to or greater than a predetermined width S1 is defined as light exposure pattern data from the design pattern data. A photolithography pattern extraction step for extracting, and a charged particle drawing pattern extraction step for extracting the charged particle drawing pattern data by removing the extracted light exposure pattern data from the design pattern data. Pattern data generation method. 7. The light exposure pattern extracting step includes: expanding the design pattern data, performing a frame calculation, and removing the design pattern data from the first pattern obtained by reducing the size of the design pattern data. 7. The lithographic pattern according to claim 6, wherein the pattern is extracted by extracting the area adjacent to the second pattern as a third pattern, and removing the third pattern from the design pattern data. Data generation method. 8. The predetermined width S1 is given by: S1 = k.times. (Exposure light wavelength) / (lens numerical aperture of the exposure apparatus) where k is a constant, and the value of the constant k is 0.5 ≦ 8. The method according to claim 6, wherein k is in a range of 0.8. 9. A design pattern data input step, and a step of irradiating an energy beam of the design pattern data with a predetermined width W2 or less and an interval between mutually adjacent regions irradiated with the energy beam of the design pattern data. Is a predetermined width S
A light exposure pattern extraction step of extracting one or more patterns as light exposure pattern data from the design pattern data; and two types of phase shifts so as to give a phase difference to each opening obtained by the light exposure pattern data. Lithography pattern data, comprising: a charged particle drawing pattern extraction step of removing the extracted light exposure pattern data from the design pattern data to extract a charged particle drawing pattern data. Generation method. 10. The predetermined width W2 and the predetermined width S1 are as follows: when both g and k are constants, W2 = g × (exposure light wavelength) / (lens numerical aperture of the exposure apparatus) S1 = k × (exposure The value of constant g is in the range of 0.25 ≦ g ≦ 0.4, and the value of constant k is in the range of 0.25 ≦ k ≦ 0.4. 10. The lithography pattern data generation method according to claim 9, wherein the range is a range. 11. The light exposure pattern extracting step includes: expanding, framing, reducing, and further expanding the design pattern data to obtain pattern data having the same size as the design pattern data; 11. The lithography pattern data generation method according to claim 9, wherein the step (a) is performed by extracting an area that matches the pattern data. 12. The step of inputting design pattern data, wherein the region irradiated with the energy beam of the design pattern data has a predetermined width W1 or more, and the interval between the adjacent regions irradiated with the energy beam is a predetermined width. Extracting a pair of regions in which at least a portion equal to or less than S1 exists, and allocating two types of phases so as to provide a phase difference between one region and the other region of the pair of regions. Process and
A contradiction point detection step of detecting two areas where contradictions have occurred in the phase assignment result; and expanding a pattern between the two detected areas based on the design pattern data and the expanded pattern. A pattern extracting step of extracting light exposure pattern data and charged particle drawing pattern data. 13. The pattern extracting step includes removing the enlarged pattern from the design pattern data to obtain light exposure pattern data, extracting a region where the design pattern data coincides with the enlarged pattern, and performing charging. 13. The image forming apparatus according to claim 12, wherein the data is particle drawing pattern data.
The lithography pattern data generation method described in the above. 14. The lithography pattern data generation method according to claim 12, wherein said two types of phases are assigned by assigning one type of phase to said one area. 15. A design pattern data input step, wherein the area irradiated with the energy beam of the design pattern data has a predetermined width W1 or more, and the interval between adjacent areas irradiated with the energy beam is a predetermined width. An extraction step of extracting a portion that is smaller than or equal to S1, a division step of dividing the region corresponding to a portion that is smaller than or equal to the predetermined width S1, and one of the divided regions; A phase allocation step of allocating two types of phases so as to give a phase difference to another divided area adjacent at intervals, a contradiction point detection step of detecting an area where a contradiction occurs in the phase allocation result, A pattern for enlarging a pattern between the regions where the contradictions have occurred and extracting light exposure pattern data and charged particle drawing pattern data based on the design pattern data and the enlarged pattern. Lithography pattern data generation method characterized by having a chromatography emissions extraction step. 16. The predetermined width W1 and the predetermined width S1 are as follows: where h and k are both constants, W1 = h × (exposure light wavelength) / (exposure apparatus lens numerical aperture) S1 = k × (exposure The value of the constant h is in the range of 0.25 ≦ h ≦ 0.4, and the value of the constant k is in the range of 0.25 ≦ k ≦ 0.4. The lithography pattern data generation method according to any one of claims 12 to 15, wherein the method is a range. 17. A step of inputting design pattern data and pattern data of a lower layer layout, a step of generating step pattern data representing a step portion region from the pattern data of the lower layer layout, A charged particle drawing pattern extraction step of extracting charged particle drawing pattern data based on the design pattern data, and a light exposure pattern extraction step of extracting a pattern obtained by removing the extracted charged particle drawing pattern data from the design pattern data. A method for generating pattern data for lithography, comprising: 18. The charged particle drawing pattern extracting step according to claim 18,
18. The lithography pattern data generating method according to claim 17, wherein the step pattern data is enlarged or reduced, and a portion where the enlarged or reduced step pattern data matches the design pattern data is extracted. 19. The step of extracting a charged particle drawing pattern comprises the steps of:
18. The lithography pattern data generation method according to claim 17, wherein a portion where the step pattern data matches the design pattern data is extracted. 20. The charged particle drawing pattern extracting step,
Enlarging or reducing the step pattern data to form second step pattern data; reducing or enlarging the second step pattern data to or from the step pattern data to form third step pattern data; 18. The lithography pattern data generation method according to claim 17, wherein a portion corresponding to the pattern data, the third step pattern data, and the design pattern data is extracted. 21. A step of inputting design pattern data and lower layer pattern data, an extracting step of extracting concave pattern data having a width exceeding a desired value from the lower layer pattern data, and A step pattern data generating step of enlarging and generating step pattern data; a charged particle drawing pattern extracting step of extracting charged particle drawing pattern data based on the step pattern data and the design pattern data; A light exposure pattern extraction step of removing the extracted charged particle drawing pattern data and extracting light exposure pattern data. 22. A region where a charged particle drawing pattern obtained by said charged particle drawing pattern data and a light exposure pattern obtained by said light exposure pattern data are connected, and said light exposure pattern in contact with said region is extracted. 22. The lithography pattern data generation method according to claim 1, wherein the pattern is extended into the charged particle drawing pattern to obtain corrected light exposure pattern data. 23. The lithography method according to claim 22, wherein the extension of the light exposure pattern into the charged particle drawing pattern is extended in accordance with the width of the portion of the light exposure pattern which is in contact with the area. Pattern data generation method. 24. The light exposure pattern is extended into the charged particle drawing pattern by adding a convex portion having a width smaller than the width of the portion of the light exposure pattern in contact with the region to the tip of the light exposure pattern. 23. The method according to claim 22, wherein
The lithography pattern data generation method described in the above. 25. A region where a charged particle drawing pattern obtained from the charged particle drawing pattern data is connected to a light exposure pattern obtained from the light exposure pattern data is extracted, and the charged particle drawing contacting the region is extracted. The lithography pattern data generation method according to any one of claims 1 to 21, wherein the pattern is extended into the light exposure pattern to obtain corrected charged particle drawing pattern data. 26. An extension of the charged particle drawing pattern into the light exposure pattern includes adding a convex portion having a width smaller than the width of the portion of the charged particle drawing pattern in contact with the region to the tip of the charged particle drawing pattern. 26. The lithography pattern data generation method according to claim 25, wherein 27. A region where a charged particle drawing pattern obtained by said charged particle drawing pattern data and a light exposure pattern obtained by said light exposure pattern data are extracted, and said light exposure of said close region is performed. A region where the light exposure pattern is located in a desired range from the boundary between the pattern and the charged particle drawing pattern is divided into first meshes, and a region where the charged particle drawing pattern is located in a desired range from the boundary is the first mesh. The second mesh is divided into a second mesh having the same size as the first mesh, and a region where the charged particle drawing pattern is located outside a desired range from the boundary is set to a third mesh larger than the first and second meshes. Divide, calculate the area ratio of the light exposure pattern and the charged particle drawing pattern in each mesh, and calculate the charged particles in the desired second mesh. The irradiation dose of drawing is corrected based on the irradiation dose of charged particle drawing of the surrounding second mesh and the irradiation dose of light exposure of the first mesh adjacent to the surrounding second mesh. The lithography pattern data generation method according to any one of claims 1 to 21, wherein: 28. A step of extracting a region where a charged particle drawing pattern obtained by said charged particle drawing pattern data and a light exposure pattern obtained by said light exposure pattern data are close to each other; The area where the charged particle drawing pattern is located in a desired range from the boundary between the light exposure pattern and the charged particle drawing pattern is divided into meshes of a desired size, and the area ratio of the charged particle drawing pattern in the mesh is calculated. And when the area ratio exceeds a desired value, enlarging the size of the mesh and repeatedly calculating the area ratio of the charged particle drawing pattern in the mesh again. 22. The lithography pattern data generation method according to claim 1. 29. A plurality of means for irradiating a first energy ray, a plurality of means for performing a first heat treatment on a sample to be processed irradiated with the first energy ray, A plurality of means for irradiating a second energy ray having different energy, a plurality of means for performing a second heat treatment on the sample to be processed irradiated with the second energy ray, and transporting the sample to each of the above means And a control means for determining which of the above-described means to convey the sample to be processed. 30. The control means makes the determination on the basis of the time until the processing of the sample to be processed which is being processed by each of the means and the processing time of each of the new samples to be processed by the respective means. 30. The semiconductor manufacturing apparatus according to claim 29, wherein: 31. The semiconductor manufacturing apparatus according to claim 29, wherein said first energy beam is a charged particle beam, and said second energy beam is a light beam. 32. The control means, based on a specific state of each of the plurality of second energy rays irradiating means, a sample to be irradiated with the second energy rays is irradiated with the second energy ray. 32. The semiconductor manufacturing apparatus according to claim 31, wherein an irradiation condition of the first energy beam irradiated before or after the irradiation is corrected. 33. The semiconductor manufacturing apparatus according to claim 32, wherein said unique state is a distortion of a lens constituting a means for irradiating said second energy ray. 34. A step of forming a light exposure mask based on the light exposure pattern data according to any one of claims 1 to 28, and irradiating a sample to be processed with the light exposure mask. Irradiating, and drawing charged particles on the sample to be processed based on the charged particle drawing pattern data or the corrected charged particle drawing pattern data.