JP2001094263A - Multilayer printed board and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board having a solder resist layer which has a low dielectric constant or dielectric tangent and hardly causes the signal delay or signal errors, even if using high frequency signals at GHz bands. SOLUTION: The multilayer printed board has conductor circuits and layer insulation resin layers laminated one above the other on a board and a solder resist layer formed on the uppermost layer, and the solder resist layer has a dielectric constant of 3.0 or less at 1 GHz.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board having a solder resist layer made of a polyolefin resin and a semiconductor device.

[0002]

2. Description of the Related Art A multilayer printed wiring board called a so-called multilayer build-up wiring board is manufactured by a semi-additive method or the like.
m on a resin substrate reinforced with glass cloth, etc.
It is manufactured by alternately laminating a conductor circuit made of copper or the like and an interlayer resin insulating layer. The connection between the conductor circuits via the interlayer resin insulation layer of the multilayer printed wiring board is performed by via holes.

Conventionally, build-up multilayer printed wiring boards have been manufactured by a method disclosed in, for example, Japanese Patent Application Laid-Open No. 9-130050. That is, first, a through-hole is formed in the copper-clad laminate on which the copper foil is stuck, and then a through-hole is formed by performing an electroless copper plating process. Subsequently, the surface of the substrate is etched into a conductor pattern to form a conductor circuit, and a roughened surface is formed on the surface of the conductor circuit by electroless plating, etching, or the like. After forming an interlayer resin insulation layer, an exposure and development process is performed, or a via hole opening is formed by laser processing, and then the interlayer resin insulation layer is formed through UV curing and main curing.

Further, after a roughening treatment is performed on the interlayer resin insulating layer, a thin electroless plating film is formed on the formed roughened surface, a plating resist is formed on the electroless plating film, and then an electrolytic plating film is formed. Thickening is performed by plating, and etching is performed after the plating resist is stripped to form a conductive circuit connected to the lower conductive circuit by a via hole.

After repeating this, a solder resist layer for protecting the conductor circuit is formed as an outermost layer, an opening is formed in the solder resist layer, and the conductor layer in the opening is plated or the like to form a pad. Then, a build-up multilayer printed wiring board is manufactured by forming solder bumps.

In the conventional multilayer printed wiring board manufactured as described above, since a mixture of an epoxy resin, an acrylic resin or the like is used for the interlayer resin insulating layer, the dielectric constant in the GHz band is as high as 3.5 or more. When an LSI chip or the like using a high-frequency signal in the GHz band is mounted, there is a problem that a signal delay or a signal error is likely to occur due to the high dielectric constant of the interlayer resin insulating layer. .

[0007]

In order to solve such a problem, there has been proposed a printed wiring board using a polyolefin resin having a low dielectric constant as an interlayer resin insulating layer. In such a printed wiring board, since most of the conductor circuits are formed in the interlayer resin insulating layer, it was possible to solve the problem that signal delay and signal error occur to some extent.

However, in recent years, the frequency of the IC chip has been increased, and the wiring of the IC chip has become denser and the wiring width has become narrower.
It is required that the distance between the external terminal pads of the printed wiring board connected to the C chip is also reduced, and the number of external terminal pads per unit area is large, and the density is increasing. Therefore, if the dielectric constant of the solder resist layer is high, due to the electromagnetic interaction between the wirings and the high dielectric property of the insulating layer existing around the wiring, the solder resist layer may also be in the bumps for external terminals of the solder resist layer and between the wirings. The problem that a signal delay or the like occurs has arisen.

Further, even in the case of a multilayer printed wiring board using a low dielectric constant polyolefin resin as an interlayer resin insulating layer in which the above-mentioned signal delay and signal error hardly occur, the dielectric constant of the solder resist layer is high. In such a case, the effect is canceled, and a signal delay or a signal error may occur.

The present invention has been made to solve such problems of the prior art, and has as its object the purpose of GH.
It is an object of the present invention to provide a multilayer printed wiring board having a solder resist layer in which a signal delay and a signal error hardly occur even when a z-band high-frequency signal is used, and a semiconductor device.

[0011]

Means for Solving the Problems The inventors of the present invention have conducted intensive studies for realizing the above object, and as a result, by using a solder resist layer having a dielectric constant of 1 or less at 1 GHz, a high frequency in a GHz band has been obtained. It has been found that even when an LSI chip or the like using a signal is mounted, a signal delay and a signal error hardly occur.

It has also been found that by using a polyolefin-based resin for the solder resist layer, signal delay and signal error hardly occur even when an LSI chip or the like using a high frequency signal in the GHz band is mounted.

The present inventors have arrived at the present invention based on the above findings and having the following content as a summary.

That is, the multilayer printed wiring board according to the first aspect of the present invention is a multilayer printed wiring board in which a conductive circuit and a resin insulating layer are sequentially formed on a substrate, and a solder resist layer is formed on an uppermost layer. 1GH of resist layer
The dielectric constant at z is not more than 3.0.

Further, in the multilayer printed wiring board according to the second aspect of the present invention, a conductive circuit and a resin insulating layer are sequentially formed on a substrate,
In a multilayer printed wiring board having a solder resist layer formed on the uppermost layer, the solder resist layer is made of a polyolefin resin.

In the multilayer printed wiring board according to the second aspect of the present invention, it is desirable that the dielectric constant of the solder resist layer at 1 GHz is 3.0 or less.

In the first and second multi-layer printed wiring boards of the present invention, the solder resist layer may have a frequency of 1 GHz.
Is desirably 0.01 or less. In the first and second multilayer printed wiring boards of the present invention, the solder resist layer is preferably made of an olefin-based resin.

In the first and second multilayer printed wiring boards of the present invention, the solder resist layer is preferably made of a cycloolefin resin. The cycloolefin-based resin is desirably a homopolymer or a copolymer of monomers composed of 2-norbornene, 5-ethylidene-2-norbornene or derivatives thereof. Further, the cycloolefin resin is desirably a thermosetting cycloolefin resin.

Further, in the first and second multilayer printed wiring boards of the present invention, it is preferable that the resin insulating layer is made of a polyolefin resin or a polyphenylene resin.

A third aspect of the present invention provides a semiconductor device in which a conductive circuit and a resin insulating layer are sequentially formed on a substrate, and a solder resist layer having an opening and a solder bump in the opening is formed on the uppermost layer. In a semiconductor device in which an IC chip is connected to the formed multilayer printed wiring board via the solder bumps, the solder resist layer is made of a polyolefin resin, and the resin insulating layer is made of a polyolefin resin, a polyphenylene resin. Alternatively, it is characterized by being made of a fluorine-based resin.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION A multilayer printed wiring board according to a first aspect of the present invention is a multilayer printed wiring board in which a conductive circuit and a resin insulating layer are sequentially formed on a substrate, and a solder resist layer is formed on an uppermost layer. 1GH of the above solder resist layer
The dielectric constant at z is not more than 3.0.

According to the first multilayer printed wiring board of the present invention, the solder resist layer has a dielectric constant of 3.
Since it is as low as 0 or less, even when a high-frequency signal in the GHz band is used, it is possible to prevent a signal error caused by signal propagation delay or signal transmission loss occurring in the solder resist layer.

When a solder resist layer having a low dielectric loss tangent is used, in addition to the above characteristics, even when the distance between the solder bumps is reduced, the solder resist layer can be formed regardless of the number of external terminal pads. In this case, it is possible to prevent a signal error caused by a transmission loss of a signal generated in the step (1).

Further, when a polyolefin resin, a polyphenylene resin, or the like is used as the interlayer resin insulating layer in the multilayer printed wiring board, the difference in the coefficient of thermal expansion between the solder resist layer and the interlayer resin insulating layer is small. ,
Cracks and peeling can be prevented.

In the multilayer printed wiring board of the first invention, the dielectric constant of the solder resist layer at 1 GHz is as follows:
3.0 or less. By using such a material having a low dielectric constant, it is possible to prevent a signal error due to a delay in signal propagation, a signal transmission loss, and the like. The dielectric constant is desirably 2.4 to 2.7.

In the multilayer printed wiring board according to the first aspect of the present invention, the dielectric loss tangent of the solder resist layer at 1 GHz is desirably 0.01 or less. By using such a low dielectric loss tangent, it is possible to prevent signal errors due to signal propagation delay, signal transmission loss and the like.

In the multilayer printed wiring board according to the first aspect of the present invention, the solder resist layer having a low dielectric constant and a low dielectric loss tangent as described above is selected from the group consisting of a polyolefin resin, polyphenylene ether and a fluorine resin. It is desirable that the material contains at least one kind.

Specific examples of the above-mentioned polyolefin resin include polyethylene, polypropylene, polyisobutylene, polybutadiene, polyisoprene, cycloolefin resin, and copolymers of these resins. Examples of commercially available products of the polyolefin-based resin include, for example, trade name: 1592 manufactured by Sumitomo 3M Limited. Commercially available thermoplastic polyolefin resins having a melting point of 200 ° C. or higher include, for example, TPX (trade name: 240 ° C., manufactured by Mitsui Petrochemical Co., Ltd.) and SPS (trade name, manufactured by Idemitsu Petrochemical Co., Ltd.) Melting point 270 ° C.). Among these, the dielectric constant and dielectric loss tangent are low,
Even when a high-frequency signal in the GHz band is used, a cycloolefin-based resin is desirable because signal delay and signal error hardly occur, and further, mechanical properties such as rigidity are excellent.

As the above cycloolefin resin, 2
It is preferably a homopolymer or a copolymer of monomers composed of -norbornene, 5-ethylidene-2-norbornene or a derivative thereof. As the above derivatives,
Examples thereof include those in which an amino group for forming a crosslink, a maleic anhydride residue, or a maleic acid-modified one is bonded to the cycloolefin such as 2-norbornene. Examples of monomers for synthesizing the copolymer include ethylene and propylene.

The cycloolefin resin may be a mixture of two or more of the above resins, or may contain a resin other than the cycloolefin resin. When the cycloolefin-based resin is a copolymer, it may be a block copolymer or a random copolymer.

The cycloolefin resin is preferably a thermosetting cycloolefin resin.
This is because by performing the heating to form the crosslinks, the rigidity is further increased and the mechanical properties are improved. The glass transition temperature (Tg) of the cycloolefin resin is 13
Desirably, the temperature is 0 to 200 ° C.

The cycloolefin-based resin may be one already molded as a resin sheet (film), and a monomer or a low-molecular-weight polymer having a certain molecular weight may be used in a solvent such as xylene or cyclohexane. It may be in the state of an uncured solution dispersed in. In the case of a resin sheet, a so-called RCC (RESIN COATE
D COPER: resin-coated copper foil).

The cycloolefin resin may not contain a filler or the like, or may contain a flame retardant such as aluminum hydroxide, magnesium hydroxide, or a phosphate. The polyolefin resin used for the solder resist layer is usually transparent. Therefore, if the resin polyolefin resin is used for the solder resist layer as it is, the conductor circuit or target mark of the inner layer may be read by mistake when mounting or cutting into individual pieces. It is desirable that the polyolefin resin to be formed be colored green or dark blue. By doing so, the alignment marks on the inner layer and the surface layer of the multilayer printed wiring board can be determined.

The resin constituting the interlayer resin insulating layer of the multilayer printed wiring board of the first invention is preferably a polyolefin resin, a polyphenylene resin (PPE, PPO, etc.), a fluorine resin, or the like. Examples of the polyolefin resin include the above-mentioned polyethylene and polypropylene, and examples of the fluorine resin include an ethyl / tetrafluoroethylene copolymer resin (ETFE) and polychlorotrifluoroethylene (PCTFE).

By using such a resin, the dielectric constant and the dielectric loss tangent of the entire multilayer printed wiring board can be reduced, and signal delay and signal error hardly occur even when a high-frequency signal in the GHz band is used. Further, since the coefficient of thermal expansion of the resin used for the resin insulating layer does not greatly differ from the coefficient of thermal expansion of the polyolefin resin or the like used for the solder resist layer, peeling, cracks, and the like hardly occur.

A multilayer printed wiring board according to a second aspect of the present invention is a multilayer printed wiring board in which a conductive circuit and a resin insulating layer are sequentially formed on a substrate, and a solder resist layer is formed on an uppermost layer. Is characterized by comprising a polyolefin resin.

According to the second multilayer printed wiring board of the present invention, since the polyolefin resin is used for the solder resist layer, even when a high frequency signal in a GHz band is used, the solder resist It is possible to prevent a signal error due to a signal propagation delay or a signal transmission loss occurring in the resist layer.

Further, when a solder resist layer having a low dielectric constant is used, even when a high frequency signal in a GHz band is used, signal propagation delay or signal transmission loss generated in the solder resist layer is reduced. Can be further prevented.

When a solder resist layer having a low dielectric loss tangent is used, in addition to the above characteristics, even when the distance between the solder bumps is reduced, the solder resist layer can be formed regardless of the number of external terminal pads. In this case, it is possible to prevent a signal error caused by a transmission loss of a signal generated in the step (1).

Further, when a polyolefin resin, a polyphenylene resin, or the like is used as the interlayer resin insulating layer in the multilayer printed wiring board, the difference in thermal expansion coefficient between the solder resist layer and the interlayer resin insulating layer is small. ,
Cracks and peeling can be prevented.

In the multilayer printed wiring board according to the second aspect of the present invention, the polyolefin resin used for the solder resist layer is not particularly limited, but preferably has a dielectric constant at 1 GHz of 3.0 or less. By using such a material having a low dielectric constant, it is possible to prevent a signal error due to a delay in signal propagation, a signal transmission loss, and the like. The dielectric constant is desirably 2.4 to 2.7.

In the multilayer printed wiring board according to the second aspect of the present invention, the dielectric loss tangent at 1 GHz of the polyolefin resin used for the solder resist layer is desirably 0.01 or less. By using such a low dielectric loss tangent, it is possible to prevent signal errors due to signal propagation delay, signal transmission loss and the like.

Specific examples of the polyolefin-based resin include polyethylene, polypropylene, polyisobutylene, polybutadiene, polyisoprene, cycloolefin-based resins, and copolymers of these resins. Examples of the commercially available polyolefin-based resin include the same ones as those used in the first invention. Among these, the dielectric constant and dielectric loss tangent are low,
Even when a high-frequency signal in the GHz band is used, a cycloolefin-based resin is desirable because signal delay and signal error hardly occur, and further, mechanical properties such as rigidity are excellent.

Examples of the cycloolefin resin include those similar to the cycloolefin resin used in the first invention.

The resin constituting the interlayer resin insulating layer of the multilayer printed wiring board of the second invention is preferably the same as that used in the first invention. By using such a resin, the dielectric constant and the dielectric loss tangent of the entire multilayer printed wiring board can be reduced as in the case of the multilayer printed wiring board of the first aspect of the present invention, and even when a high frequency signal in the GHz band is used. Signal delay and signal error hardly occur. Further, since the coefficient of thermal expansion of the resin used for the resin insulating layer does not greatly differ from the coefficient of thermal expansion of the polyolefin-based resin used for the solder resist layer, peeling, cracking, and the like hardly occur.

Next, a method for manufacturing the above-described first and second multilayer printed wiring boards of the present invention will be described.

(1) First, a wiring board having a lower conductive circuit on the surface of a resin substrate is manufactured. As the resin substrate, a resin substrate having inorganic fibers is desirable, specifically, for example, a glass cloth epoxy substrate, a glass cloth polyimide substrate,
A glass cloth bismaleimide-triazine resin substrate, a glass cloth fluororesin substrate, and the like can be given. Further, a copper-clad laminate in which copper foil is stuck on both surfaces of the resin substrate may be used.

Usually, a through hole is formed in the resin substrate by a drill, and a through hole is formed by applying electroless plating to the wall surface of the through hole and the surface of the copper foil. Copper plating is preferred as the electroless plating. Further, electroplating may be performed for thickening the copper foil. Copper plating is preferred as the electroplating. Thereafter, the inner wall of the through-hole may be subjected to a roughening treatment, the through-hole may be filled with a resin paste or the like, and the conductive layer covering the surface may be formed by electroless plating or electroplating.

Examples of the method of the roughening treatment include blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, and treatment with a Cu-Ni-P needle-like alloy plating. No. Through the above steps, an etching resist is formed on the solid copper pattern formed on the entire surface of the substrate by using a photolithography technique, and then etching is performed to form a lower conductive circuit. Thereafter, if necessary, by forming a conductor circuit,
A portion which has been etched and becomes a concave portion may be filled with a resin or the like.

(2) Next, the formed lower conductor circuit is subjected to a roughening treatment if necessary. As the method of the roughening treatment, the above-mentioned methods, that is, blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, Cu
-Ni-P needle-like alloy plating.
In addition, without subjecting the lower conductor circuit to a roughening treatment, the substrate on which the lower conductor circuit is formed is immersed in a solution in which a resin component is dissolved to form a resin layer on the surface of the lower conductor circuit. The adhesion to the interlayer resin insulating layer formed on the substrate may be ensured.

(3) Next, an interlayer resin insulating layer is formed on both surfaces of the wiring board having the lower conductive circuit manufactured in the above (2). The interlayer resin insulating layer is formed by, for example, applying an uncured liquid for forming a cycloolefin-based resin and then curing it by heating or the like, or a method of vacuum-press laminating a cycloolefin-based resin sheet under heating. Can be. A method of laminating a resin sheet is preferred because handling is simple. The heating conditions in this case are preferably 100 to 180 ° C. and 0.5 to 20 minutes.

(4) Next, the interlayer resin insulation layer is irradiated with laser light.
By irradiation, a via hole opening is provided. this
When the laser light used is, for example, carbon dioxide
(CO _Two ) Laser, ultraviolet laser, excimer laser, etc.
Of these, excimer lasers and short
A pulsed carbon dioxide laser is preferred.

As will be described later, the excimer laser can form a large number of via hole openings at a time by using a mask or the like in which penetrating light is formed at a portion where the via hole opening is formed. This is because the short-pulse carbon dioxide laser has less resin residue in the opening and less damage to the resin around the opening.

It is desirable to use a hologram type excimer laser among the excimer lasers. The hologram method is a method of irradiating a laser beam to a target object through a hologram, a condensing lens, a laser mask, a transfer lens, and the like. The opening can be formed efficiently.

When a carbon dioxide laser is used, the pulse interval is desirably 10 ⁻⁴ to 10 ⁻⁸ seconds. The time for irradiating the laser for forming the opening is preferably 10 to 500 μsec. In the excimer laser, the through hole of the mask in which the through hole is formed in the portion where the opening for the via hole is formed needs to be a perfect circle in order to make the spot shape of the laser beam a perfect circle. Is desirably about 0.1 to 2 mm.

When the opening is formed by a laser beam, particularly when a carbon dioxide laser is used, desmearing is preferably performed. The desmear treatment can be performed using an oxidizing agent composed of an aqueous solution such as chromic acid and permanganate. Alternatively, the treatment may be performed using oxygen plasma, a mixed plasma of CF ₄ and oxygen, corona discharge, or the like. The surface can also be modified by irradiating ultraviolet rays using a low-pressure mercury lamp.

(5) The interlayer resin insulation layer may be formed with a metal layer thereon without performing any particular roughening treatment, etc., by plasma treatment or treatment with an acid or the like.
After roughening the surface, a metal layer may be formed. When the plasma treatment is performed, a metal such as Ni, Ti, Pd, etc. having excellent adhesion to the interlayer resin insulation layer is used to secure the adhesion between the conductor circuit formed as the upper layer and the interlayer resin insulation layer. It may be formed as an intermediate layer. The intermediate layer made of the metal is desirably formed by physical vapor deposition (PVD) such as sputtering.
It is desirable to be about 2.0 μm.

(6) After the above steps, a thin film layer made of metal is formed. The material of the thin film layer is preferably copper or a copper-nickel alloy. This thin film layer is formed by physical vapor deposition (PVD).
Method), a chemical vapor deposition method (CVD method), or an electroless plating. As the PVD method, for example, sputtering,
Ion beam sputtering, etc .;
The method is PE-CVD using organic metal as a feed material.
(Plasma Enhanced CVD) method.

The thickness of this thin film is preferably from 0.1 to 5 μm. The thickness is set so that the film can be removed by etching without impairing the function as a conductive layer in electroplating performed later. The step of forming the thin film is not essential and can be omitted.

(7) A plating resist is formed on the electroless plating film formed in (6). This plating resist
After laminating a photosensitive dry film, it is formed by performing exposure and development processing.

(8) Next, electroplating is performed using the thin metal film formed on the interlayer resin insulating layer as a plating lead to thicken the conductor circuit. Electroplating film thickness is 5-30μ
m is preferred. At this time, the via hole opening may be filled with electroplating to form a filled via structure.

(9) After forming the electroplating film, the plating resist is peeled off, and the electroless plating film existing under the plating resist and the intermediate layer are removed by etching to form an independent conductor circuit. . It is desirable to use copper plating as the electroplating. Examples of the etchant include sulfuric acid-hydrogen peroxide aqueous solution, ammonium persulfate, sodium persulfate, persulfate aqueous solution such as potassium persulfate, ferric chloride, aqueous solution of cupric chloride, hydrochloric acid,
Nitric acid, hot dilute sulfuric acid and the like can be mentioned. Alternatively, a roughened surface may be formed simultaneously with etching between conductor circuits using an etching solution containing the above-described cupric complex and an organic acid.

(10) Thereafter, the above steps (2) to (9) are repeated to provide an upper conductor circuit, an upper layer, a solder resist layer, and an opening in the solder resist layer. By providing solder bumps, for example, one side 3
A six-layer double-sided multilayer printed wiring board having six layers is obtained.

When forming an opening in the solder resist layer, a method of irradiating a predetermined position with a laser beam can be used. At this time, as the laser light used, the same laser light as that used in forming the above-described via hole can be used. In addition, it is desirable to form an alignment mark on the solder resist layer by irradiating a laser beam in this step.

Next, a third semiconductor device according to the present invention will be described. In the semiconductor device according to the third aspect of the present invention, the conductor circuit and the resin insulating layer are sequentially formed on the substrate, and further,
In a semiconductor device in which an IC chip is connected through a solder bump to a multilayer printed wiring board having an opening and a solder resist layer having a solder bump in the opening, the solder resist layer is made of a polyolefin-based material. It is made of resin, and the resin insulating layer is made of polyolefin resin, polyphenylene resin or fluorine resin.

Examples of the polyolefin resin used for the solder resist layer of the semiconductor device include those similar to the above-mentioned polyolefin resins. The polyolefin resin is preferably a cycloolefin resin. This is because the dielectric constant and the dielectric loss tangent are low and the mechanical properties are excellent.

The resin insulating layer of the semiconductor device is made of a polyolefin resin, a polyphenylene resin or a fluorine resin. By using such a resin, the dielectric constant and the dielectric loss tangent of the entire multilayer printed wiring board can be reduced, and signal delay and signal error hardly occur even when a high-frequency signal in the GHz band is used. In addition, since the coefficient of thermal expansion of the resin used for the resin insulating layer does not greatly differ from the coefficient of thermal expansion of the polyolefin-based resin used for the solder resist layer, peeling, cracks, and the like hardly occur.

In manufacturing the semiconductor device according to the third aspect of the present invention, after manufacturing a multilayer printed wiring board having solder bumps by the above-described method, an IC is placed at a predetermined position on a solder resist layer having solder bumps. The chip is placed, the solder is reflowed by heating, and the wiring of the printed wiring board and I
Connect to C chip. Subsequently, the printed wiring board to which the IC chip is connected is filled with an underfill, and resin sealing is performed, thereby completing the manufacture of the semiconductor device. According to the semiconductor device of the third aspect of the present invention, even if the frequency of the IC chip is a high-frequency signal region of 1 GHz or more, a signal error due to signal propagation delay, signal transmission loss, or the like may occur. Absent. Hereinafter, description will be made based on embodiments.

[0069]

Example (Example 1) A. Preparation of resin filler 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell Co., molecular weight: 310, YL983U), the average particle diameter of which is coated with a silane coupling agent on the surface is 1.6 μm, and the diameter of the largest particle Is less than 15 μm
iO ₂ spherical particles (manufactured by Admatechs, CRS 110)
1-CE) 170 parts by weight and 1.5 parts by weight of a leveling agent (Perenol S4 manufactured by San Nopco) are placed in a container,
By stirring and mixing, the viscosity becomes 40 at 23 ± 1 ° C.
A resin filler of ５０50 Pa · s was prepared. As a curing agent, an imidazole curing agent (2E4M manufactured by Shikoku Chemicals Co., Ltd.)
(Z-CN) 6.5 parts by weight.

B. Production of printed wiring board (1) 0.8mm thick glass epoxy resin or BT
A copper-clad laminate in which 18 μm copper foils 8 were laminated on both surfaces of a substrate 1 made of (bismaleimide-triazine) resin was used as a starting material (see FIG. 1A). First, the copper-clad laminate is drilled, and then a plating resist is formed. Then, the substrate is subjected to an electroless copper plating process to form through holes 9, and the copper foil is patterned in a conventional manner. Then, an inner copper pattern (lower conductive circuit) 4 was formed on both surfaces of the substrate.

(2) The substrate on which the lower conductive circuit 4 has been formed is washed with water and dried, and then an etching solution is sprayed on both surfaces of the substrate by spraying, so that the surface of the lower conductive circuit 4 and the land surface of the through hole 9 and the inner wall are formed. And by etching
The roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 (see FIG. 1B). A mixture of 10 parts by weight of an imidazole copper (II) complex, 7 parts by weight of glycolic acid, 5 parts by weight of potassium chloride, and 78 parts by weight of ion-exchanged water was used as an etching solution.

(3) After the resin filler described in the above A is prepared, the resin filler 10 is applied to both sides of the substrate using a printing machine within 24 hours after the preparation, whereby the lower conductor circuit 4 Alternatively, it was filled in the through hole 9 and dried by heating. That is, in this step, the resin filler 10 is filled between the lower conductor circuits 4 or in the through holes 9 (see FIG. 1C).

(4) One surface of the substrate after the treatment of the above (3) is subjected to belt sanding using a belt abrasive paper (manufactured by Sankyo Rikagaku Co., Ltd.) to form a surface of the lower conductive circuit 4 and a land surface of the through hole 9. Was polished so that the resin filler 10 did not remain, and then buffed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Then, the filled resin filler 10 was cured by heating (see FIG. 1D).

In this manner, the surface layer of the resin filler 10 filled in the through holes 9 and the like and the roughened layer 4a on the upper surface of the lower conductor circuit 4 are removed to smooth both surfaces of the substrate, and the resin filler 10 and the lower layer are removed. A wiring board was obtained in which the side surface of the conductive circuit 4 was firmly adhered through the roughened surface 4a, and the inner wall surface of the through hole 9 and the resin filler 10 were firmly adhered through the roughened surface 9a.

(5) Next, on both surfaces of the substrate having undergone the above steps,
A pressure of 5 kg / c while heating a thermosetting type cycloolefin resin sheet having a thickness of 50 μm to a temperature of 50 to 150 ° C.
Vacuum compression lamination was performed at m ² to provide an interlayer resin insulation layer 2 made of a cycloolefin-based resin (see FIG. 2A). The degree of vacuum during vacuum compression was 10 mmHg.

(6) Next, a via hole opening 6 having a diameter of 80 μm was formed in the interlayer resin insulating layer 2 made of a thermosetting cycloolefin resin using an excimer laser having a wavelength of 0.248 μm (FIG. 2B). )reference). Thereafter, a desmear treatment was performed using oxygen plasma.

(7) Next, SV manufactured by Japan Vacuum Engineering Co., Ltd.
Using −4540, sputtering with Ni as the target was performed at a gas pressure of 0.6 Pa, a temperature of 80 ° C., and a power of 200.
This was performed under the conditions of W for 5 minutes, and a Ni metal layer 12a was formed on the surface of the interlayer resin insulating layer 2 (see FIG. 2C). At this time, the thickness of the formed Ni metal layer 12a is 0.1 μm.
Met.

(8) Next, the substrate is immersed in an electroless copper plating aqueous solution having the following composition to form a 0.6 to 1.2 μm thick electroless copper plating film 12b on the entire surface of the Ni metal layer 12a. Was formed (see FIG. 2D). [Electroless electroless copper plating aqueous solution] EDTA 0.08 mol / l Copper sulfate 0.03 mol / l HCHO 0.05 mol / l NaOH 0.05 mol / l α, α'-bipyridyl 80 mg / l PEG 0.10 g / l (polyethylene glycol) [Electroless plating conditions] 20 minutes at a liquid temperature of 65 ° C

(9) A commercially available photosensitive dry film is bonded to both surfaces of the substrate after the above-mentioned treatment by thermocompression bonding to the electroless copper plating film 12, and a photomask film is placed on the substrate. After exposure in step ² , the resist was developed with 0.8% sodium carbonate to form a pattern of a plating resist 3 having a thickness of 15 μm (see FIG. 3A).

(10) Next, electroplating was performed under the following conditions to form an electroplating film 13 having a thickness of 15 μm (FIG. 3).
(B)). This means that the electroplating film 13 has been used to thicken the portion that will be the conductor circuit 5 and fill the portion that will be the via hole 7 with plating in the steps described later. The additive in the electroplating aqueous solution is Capparaside HL manufactured by Atotech Japan.

[Electroplating aqueous solution] sulfuric acid 2.24 mol / l copper sulfate 0.26 mol / l additive 19.5 ml / l [electroplating conditions] current density 1 A / dm ² hours 65 minutes temperature 22 ± 2 ° C

(11) Further, the plating resist 3 is coated with 5% KO
After stripping and removing with H, the electroless plating film under the plating resist 3 is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide to form an independent upper conductor circuit 5 (including the via hole 7). (See FIG. 3C).

(12) Subsequently, the above steps (5) to (11) were repeated to form a further upper layer conductive circuit.
(See FIGS. 4A to 5A).

(13) Next, a thermosetting polyolefin resin sheet (trade name: 1592, manufactured by Sumitomo 3M) having a thickness of 20 μm is provided on both surfaces of the multilayer wiring board having the upper conductor circuit formed thereon, at a temperature of 50 ° C. to 150 ° C. 5kg / c pressure while heating up to ℃
Vacuum compression bonding was performed at m ² to provide a solder resist layer 14 made of a polyolefin resin. The degree of vacuum during vacuum compression was 10 mmHg.

(14) Next, an opening having a diameter of 200 μm was formed in the solder resist layer 14 made of a thermosetting polyolefin resin using an excimer laser having a wavelength of 248 μm. Thereafter, desmearing treatment was performed using oxygen plasma to form a solder resist layer (organic resin insulating layer) 14 having a thickness of 20 μm and an opening in the solder pad portion.

(15) Next, a solder resist layer (organic resin
The substrate on which the insulating layer (14) was formed was coated with nickel chloride (2.3).
× 10^-1mol / l), sodium hypophosphite (2.8
× 10 ^-1mol / l), sodium citrate (1.6 ×
10^-1mol / l) and pH = 4.5
Immersion in a plating solution for 20 minutes, and a 5 μm thick
A nickel plating layer 15 was formed. In addition, the board
Potassium gold cyanide (7.6 × 10^-3mol / l), salt
Ammonium iodide (1.9 × 10^-1mol / l), quenched
Sodium acid (1.2 × 10^-1mol / l), phosphorus hypophosphite
Sodium acid (1.7 × 10^-1mol / l)
Immerse in a plating solution at 80 ° C for 7.5 minutes,
0.03 μm thick gold plating layer on the Kell plating layer 15
No. 16 was formed.

(16) After that, a solder paste is printed on the opening of the solder resist layer 14 and reflowed at 200 ° C. to form a solder bump (solder body) 17, and a multilayer wiring printed board having the solder bump 17 Was manufactured (see FIG. 5B).

(17) Using another part of the printed wiring board manufactured by the above method, bonding to an IC chip was performed. That is, using a predetermined mounting device, after the flux cleaning, the solder bumps of the printed wiring board are aligned with the bumps provided on the IC chip with reference to the target mark, and the solder is reflowed. The solder bump and the bump of the IC chip were joined. Then, flux washing was performed, and an underfill was filled between the IC chip and the multilayer printed wiring board, whereby a printed wiring board (semiconductor device) to which the IC chip was connected was obtained.

(Example 2) In step (13) of Example 1, a thermosetting cycloolefin resin sheet having a thickness of 20 µm was used instead of the thermosetting polyolefin resin sheet. A multilayer wiring printed board was manufactured in the same manner as in Example 1 except that a solder resist layer made of a resin was formed, and a printed wiring board (semiconductor device) to which an IC chip was connected was obtained using the same.

Example 3 A. Preparation of adhesive for electroless plating (adhesive for upper layer) (i) 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) at a concentration of 80% by weight of diethylene glycol dimethyl ether (DMDG) 35 parts by weight of a resin solution dissolved in water, photosensitive monomer (Aronix M315, manufactured by Toa Gosei Co., Ltd.) 3.1
5 parts by weight, antifoaming agent (S-65, manufactured by San Nopco) 0.5
Parts by weight and 3.6 parts by weight of N-methylpyrrolidone (NMP) were placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight, 7.2 parts by weight of an epoxy resin particle (manufactured by Sanyo Kasei Co., polymer pole) having an average particle diameter of 1.0 μm and 3.09 parts by weight of an epoxy resin particle having an average particle diameter of 0.5 μm were placed in another container, After stirring and mixing, 30 parts by weight of NMP was further added and stirred and mixed with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals) and a photopolymerization initiator (Irgacure, manufactured by Ciba Specialty Chemicals)
I-907) 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku Co., Ltd., DE
TX-S) 0.2 part by weight and 1.5 parts by weight of NMP were further placed in another container, and mixed by stirring to prepare a mixed composition. Then, an adhesive for electroless plating was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

B. Preparation of adhesive for electroless plating (adhesive for lower layer) (i) 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) at a concentration of 80% by weight of diethylene glycol dimethyl ether (DMDG) 35 parts by weight of a resin solution, 4 parts by weight of a photosensitive monomer (manufactured by Toagosei Co., Aronix M315), 0.5 parts by weight of an antifoaming agent (S-65 manufactured by Sannopco) and N-methylpyrrolidone (NMP) 3.6 parts by weight were placed in a container and mixed by stirring to prepare a mixed composition.

(Ii) Polyether sulfone (PES) 1
2 parts by weight and epoxy resin particles (manufactured by Sanyo Chemical Industries,
14.4 having an average particle size of 0.5 μm
9 parts by weight were placed in another container and mixed with stirring.
30 parts by weight of MP was added and mixed by stirring with a bead mill to prepare another mixed composition.

(Iii) 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals) and a photopolymerization initiator (Irgacure, manufactured by Ciba Specialty Chemicals)
I-907) 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku Co., Ltd., DE
TX-S) 0.2 part by weight and 1.5 parts by weight of NMP were further placed in another container, and mixed by stirring to prepare a mixed composition. Then, an adhesive for electroless plating was obtained by mixing the mixed compositions prepared in (i), (ii) and (iii).

C. Preparation of Resin Filler A resin filler was prepared in the same manner as in Example 1.

D. Manufacturing method of printed wiring board (1) Glass epoxy resin or BT with a thickness of 0.8 mm
A copper-clad laminate in which 18 μm copper foils 8 were laminated on both sides of a substrate 1 made of (bismaleimide triazine) resin was used as a starting material (see FIG. 6A). First, the copper-clad laminate was drilled, subjected to electroless plating, and etched in a pattern to form a lower conductor circuit 4 and through holes 9 on both surfaces of the substrate 1.

(2) Through-hole 9 and lower conductor circuit 4
After the substrate on which was formed was washed with water and dried, NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment was performed using an aqueous solution containing (6 g / l) as a reduction bath, and roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 including the through holes 9 (see FIG. 6B). .

(3) After preparing the resin filler described in C above, the resin filler 10 is applied to both sides of the substrate using a printing machine within 24 hours after the preparation, so that the lower conductor circuit 4 Alternatively, it was filled in the through hole 9 and dried by heating. That is, in this step, the resin filler 10 is filled between the lower conductor circuits 4 or in the through holes 9 (see FIG. 6C).

(4) One surface of the substrate after the processing of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku) to form the surface of the inner layer copper pattern 4 and the through holes 9. Polishing was performed so that the resin filler 10 did not remain on the land surface, and then buffing was performed to remove scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Then, at 100 ° C for 1 hour, at 120 ° C for 3 hours, at 150 ° C
For 1 hour and a heat treatment at 180 ° C. for 7 hours to cure the resin filler 10.

In this way, the surface layer of the resin filler 10 formed in the through-hole 9 and the portion where the conductor circuit is not formed and the surface of the lower conductor circuit 4 are flattened, and the resin filler 10 and the side surface of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
Was firmly adhered via the roughened surface to obtain an insulating substrate (see FIG. 6D).

(5) After the above substrate is washed with water and acid degreased, it is soft-etched, and then an etching solution is sprayed on both surfaces of the substrate by spraying, so that the surface of the lower conductor circuit 4 and the land surface of the through hole 9 and the inner wall are formed. Thus, roughened surfaces 4a and 9a were formed on the entire surface of the lower conductive circuit 4 (see FIG. 7A). As an etching solution, an etching solution (Mec etch bond, manufactured by Mec Co.) comprising 10 parts by weight of an imidazole copper (II) complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride was used.

(6) An adhesive for electroless plating for the lower layer (viscosity: 1.5 Pa · s) is applied to both sides of the substrate using a roll coater within 24 hours after preparation, and left in a horizontal state for 20 minutes After that, drying was performed at 60 ° C. for 30 minutes. Next, an adhesive for electroless plating for the upper layer (viscosity: 7 Pa ·
s) was applied using a roll coater within 24 hours after preparation, and was similarly left standing in a horizontal state for 20 minutes, followed by drying at 60 ° C. for 30 minutes to obtain a 35 μm thick adhesive for electroless plating. The layers 2a and 2b were formed (see FIG. 7B).

(7) A photomask film in which a black circle having a diameter of 85 μm is drawn with light-shielding ink is adhered to both surfaces of the substrate 1 on which the adhesive layers 2a and 2b for electroless plating are formed in (6) above, 3000mJ / c by ultra-high pressure mercury lamp
Exposure at m ² intensity. Then, at 100 ° C. for 1 hour, 12
A heat treatment of 1 hour at 0 ° C. and 3 hours at 150 ° C. has a diameter of 8 with excellent dimensional accuracy equivalent to a photomask film.
An interlayer resin insulating layer 2 having a thickness of 35 μm and having a via hole opening 6 of 5 μm was formed (see FIG. 7C). Note that the tin plating layer was partially exposed in the opening serving as the via hole.

(8) The substrate in which the via hole opening 6 is formed is immersed in a solution containing chromic acid for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the interlayer resin insulating layer 2, thereby obtaining the interlayer resin. The surface of the insulating layer 2 is made rough (depth 6
μm), and then immersed in a neutralizing solution (manufactured by Shipley) and washed with water (see FIG. 7D). Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate subjected to the surface roughening treatment, catalyst nuclei were attached to the surface of the interlayer resin insulating layer 2 and the inner wall surface of the via hole opening 6.

(9) Next, the substrate was immersed in an electroless copper plating aqueous solution having the following composition, and the thickness was 0.6 to 1.
An electroless copper plating film 12 of 2 μm was formed (FIG. 8A).
reference). [Electroless plating aqueous solution] NiSO ₄ 0.003 mol / l tartaric acid 0.200 mol / l copper sulfate 0.030 mol / l HCHO 0.050 mol / l NaOH 0.100 mol / l α, α'-bipyridyl 40 mg / l Polyethylene glycol (PEG) 0.10 g / l [Electroless plating conditions] 40 minutes at a liquid temperature of 35 ° C

(10) A commercially available photosensitive dry film is bonded to the electroless copper plating film 12 by thermocompression bonding, a mask is placed on the film, and exposure is performed at 100 mJ / cm ² .
It was developed with 8% sodium carbonate to provide a plating resist 3 having a thickness of 15 μm (see FIG. 8B).

(11) Then, electrolytic copper plating was performed under the following conditions to form an electrolytic copper plating film 13 having a thickness of 15 μm (see FIG. 8C). [Electroplating aqueous solution] sulfuric acid 2.24 mol / l copper sulfate 0.26 mol / l additive 19.5 ml / l (manufactured by Atotech Japan, Capparaside HL) [electroplating conditions] current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(12) After the plating resist 3 is peeled off with 5% KOH, the electroless plating film 12 under the plating resist 3 is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide. Copper plating film 12 and electrolytic copper plating film 1
A conductor circuit (including the via hole 7) 5 made of 3 and having a thickness of 18 μm was formed (see FIG. 8D).

(13) Subsequently, the above steps (5) to (12) were repeated to form a further upper interlayer resin insulating layer and a conductor circuit, thereby obtaining a multilayer wiring board. (See FIGS. 9A to 10B).

(14) Next, a solder resist layer made of a thermosetting cycloolefin resin was formed on both surfaces of the multilayer wiring board having the upper conductor circuit formed thereon in the same manner as in Example 2. A multilayer wiring printed board was manufactured in the same manner as in the steps (14) to (16), and a printed wiring board (semiconductor device) to which an IC chip was connected was obtained using this.

Comparative Example 1 (1) A multilayer wiring board was obtained in the same manner as in the steps (1) to (13) of Example 3 (see FIG. 11A). (2) Next, the surface of the conductor circuit (including the via hole 7) 5 is etched using an etching solution similar to the etching solution used in the step (5) of the third embodiment, thereby forming the conductor circuit (via). A roughened surface was formed on the surface of the hole 5 (including the hole 7) (see FIG. 11B).

(3) Next, a cresol novolak-type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) so as to have a concentration of 60% by weight was used. 46.67 parts by weight of an oligomer (molecular weight: 4000) provided, 15 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, and 15 parts by weight of an imidazole curing agent (Shikoku) (Product name: 2E4MZ-CN, manufactured by Kasei Co., Ltd.)
6 parts by weight, 3 parts by weight of a polyfunctional acrylic monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), which is a photosensitive monomer, and also a polyvalent acrylic monomer (trade name, manufactured by Kyoeisha Chemical Co., Ltd.)
1.5 parts by weight of DPE6A) and 0.71 part by weight of a dispersion antifoaming agent (manufactured by San Nopco, trade name: S-65) are placed in a container, stirred and mixed to prepare a mixed composition, and this mixed composition is prepared. To the mixture were added 2.0 parts by weight of benzophenone (manufactured by Kanto Kagaku) as a photopolymerization initiator and 0.2 parts by weight of Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer to give a viscosity of 25
A solder resist composition (organic resin insulating material) adjusted to 2.0 Pa · s at ° C was obtained. The viscosity was measured with a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.) when the rotor No. was 60 rpm. Rotor N at 4,6 rpm
o. According to 3.

(4) Next, the above-mentioned solder resist composition is applied to both sides of the multilayer wiring board in a thickness of 20 μm,
After performing a drying process under the conditions of 20 ° C. for 20 minutes and 70 ° C. for 30 minutes, a 5 mm-thick photomask on which a pattern of the opening of the solder resist is drawn is brought into close contact with the solder resist layer, and an ultraviolet ray of 1000 mJ / cm ² is applied. Exposure with DM
Development was performed with a TG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour, and at 100 ° C. for 1 hour.
The solder resist layer was cured by performing heat treatment under the conditions of 1 hour at 120 ° C. for 1 hour and 3 hours at 150 ° C., and a solder resist layer (organic resin insulating layer) having an opening in the solder pad portion and having a thickness of 20 μm. 14) was formed.

(5) Next, a solder resist layer (organic resin
The substrate on which the insulating layer (14) was formed was coated with nickel chloride (2.3).
× 10^-1mol / l), sodium hypophosphite (2.8
× 10 ^-1mol / l), sodium citrate (1.6 ×
10^-1mol / l) and pH = 4.5
Immersion in a plating solution for 20 minutes, and a 5 μm thick
A nickel plating layer 15 was formed. In addition, the board
Potassium gold cyanide (7.6 × 10^-3mol / l), salt
Ammonium iodide (1.9 × 10^-1mol / l), quenched
Sodium acid (1.2 × 10^-1mol / l), phosphorus hypophosphite
Sodium acid (1.7 × 10^-1mol / l)
Immerse in a plating solution at 80 ° C for 7.5 minutes,
0.03 μm thick gold plating layer on the Kell plating layer 15
No. 16 was formed.

(6) After that, a solder paste is printed on the opening of the solder resist layer 14 and reflowed at 200 ° C. to form a solder bump (solder body) 17, and a multilayer wiring printed board having the solder bump 17 Was manufactured (see FIG. 11C). Thereafter, a printed wiring board (semiconductor device) to which an IC chip was connected was obtained using the multilayer wiring printed board.

The dielectric constant and the dielectric loss tangent of the multilayer printed wiring boards obtained in Examples 1 to 3 and Comparative Example 1 were measured, and further, whether or not a signal delay and a signal error occurred using the manufactured semiconductor device was determined. Was evaluated. The results are shown in Table 1 below.

[0118]

[Table 1]

As is clear from the results shown in Table 1, in the multilayer printed wiring board of the embodiment, the dielectric constant and the dielectric loss tangent of the entire multilayer printed wiring board are low, and the semiconductor device manufactured using this multilayer printed wiring board has Neither signal delay nor signal error occurred, but in the semiconductor device using the multilayer printed wiring board of the comparative example, signal delay and signal error occurred.

[0120]

As described above, the multilayer printed wiring board of the present invention has a low dielectric constant of 1 GHz or less at a solder resist layer of 1 GHz. Signal error is less likely to occur.

Further, since the semiconductor device of the present invention uses a polyolefin resin as the solder resist layer and a polyolefin resin as the interlayer resin insulating layer, the dielectric constant and the dielectric loss tangent are small. Even in a semiconductor device mounted with an IC chip or the like using a high-frequency signal in a band, signal delay and signal error hardly occur.

[Brief description of the drawings]

FIGS. 1A to 1D are longitudinal sectional views showing a part of a manufacturing process of a multilayer printed wiring board according to the present invention.

FIGS. 2A to 2D are longitudinal sectional views showing a part of a manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 3A to 3C are longitudinal sectional views showing a part of a manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 4A to 4C are longitudinal sectional views showing a part of a manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 5A and 5B are longitudinal sectional views showing a part of a manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 6A to 6D are longitudinal sectional views showing a part of a manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 7A to 7D are longitudinal sectional views showing a part of the manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 8A to 8D are longitudinal sectional views showing a part of the manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 9A to 9C are longitudinal sectional views showing a part of the manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 10A and 10B are longitudinal sectional views showing a part of the manufacturing process of the multilayer printed wiring board of the present invention.

FIGS. 11A to 11C are longitudinal sectional views showing a part of a manufacturing process of a conventional multilayer printed wiring board.

[Explanation of symbols]

 Reference Signs List 1 substrate 2 interlayer resin insulating layer 3 plating resist 4 lower layer conductor circuit 4a roughened surface 5 upper layer conductor circuit 6 via hole opening 7 via hole 8 copper foil 9 through hole 9a roughened surface 10 resin filler 12a Ni metal layer 12b none Electrolytic copper plating film 13 Electroplating film 14 Solder resist layer 15 Nickel plating film 16 Gold plating film 17 Solder bump

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Koji Sekine, Inventor 1-1, Ibigawa-cho, Ibi-gun, Gifu Prefecture Ibiden Corporation Ogaki-Kita Plant (72) Inventor Kenichi Shimada 1-1, Ibigawa-cho, Ibi-gun, Gifu Prefecture Ibid F-term in Ogaki Kita Plant (reference) 5E314 AA25 AA27 BB13 CC15 DD07 FF05 FF19 GG12 GG26 5E346 AA33 AA43 CC08 CC21 CC52 DD46 FF24 HH05 HH08

Claims (9)

[Claims] 1. A multilayer printed wiring board in which a conductive circuit and a resin insulating layer are sequentially formed on a substrate and a solder resist layer is formed on an uppermost layer, the dielectric constant of the solder resist layer at 1 GHz is 3.0. A multilayer printed wiring board characterized by the following. 2. A multilayer printed wiring board in which a conductive circuit and a resin insulating layer are sequentially formed on a substrate and a solder resist layer is formed on an uppermost layer, wherein the solder resist layer is made of a polyolefin resin. Multilayer printed wiring board. 3. The multilayer printed wiring board according to claim 2, wherein the dielectric constant of the solder resist layer at 1 GHz is 3.0 or less. 4. The multilayer printed wiring board according to claim 1, wherein a dielectric loss tangent of the solder resist layer at 1 GHz is 0.01 or less. 5. The multilayer printed wiring board according to claim 1, wherein said solder resist layer is made of a cycloolefin resin. 6. The multilayer print according to claim 5, wherein the cycloolefin-based resin is a homopolymer or a copolymer of a monomer comprising 2-norbornene, 5-ethylidene-2-norbornene, or a derivative thereof. Wiring board. 7. The multilayer printed wiring board according to claim 5, wherein the cycloolefin resin is a thermosetting cycloolefin resin. 8. The multilayer printed wiring board according to claim 1, wherein the resin insulating layer is made of a polyolefin resin or a polyphenylene resin. 9. A multilayer printed wiring board in which a conductive circuit and a resin insulating layer are sequentially formed on a substrate, and a solder resist layer having an opening and a solder bump in the opening is formed on the uppermost layer. In a semiconductor device in which an IC chip is connected via the solder bumps, the solder resist layer is made of a polyolefin resin,
The semiconductor device according to claim 1, wherein the resin insulating layer is made of a polyolefin resin, a polyphenylene resin, or a fluorine resin.