JP2001094027A - Semiconductor device and method for manufactuing it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device in which bouding strength is increased and stress with respect to a cycle can be relieved by forming sufficient fillets in the case of mounting onto a board, when all outer leads are covered with resin. SOLUTION: This semiconductor device is provided with a bed 52, on which a semiconductor element 41 is mounted, inner leads 52 which are arranged making one end sides face the bed 52 and connected with terminals 42 of the semiconductor element 41, and a resin seal molding part 44 which seals the semiconductor element 41, the inner leads 53 and the outer leads 54 in such a manner that the contour line almost coincides with a line R which connects the tips of the outer leads 54, the tips are exposed and the outer leads 54 are covered with a solder S.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a QON (Quad Out)
line Non-Leaded) or SON (Small Outline Non-lead)
The present invention relates to a semiconductor device having a shape in which most of outer leads such as a ded) type are sealed with a resin, and a method of manufacturing the same, and more particularly to a device capable of improving a bonding strength and a thermal stress relaxation function.

[0002]

2. Description of the Related Art FIGS. 4A to 4D are views showing an example of a QON type semiconductor device 10, in which FIG.
(B) is a bottom view, (c) is a side sectional view, and (d) is (b).
It is a bottom view which expands and shows the part enclosed with the two-dot chain line M. FIG. 5 is a plan view showing the appearance of a lead frame 20 used in the QON semiconductor device 10. FIG.

A QON semiconductor device 10 includes a semiconductor element 11
, An inner lead 23 disposed around the bed 22, and an outer lead 24 connected to the inner lead 23.

[0004] Each terminal 12 of the semiconductor element 11 and the inner lead 23 are connected by a metal wire 13. Further, in FIG. 4, reference numeral 14 denotes a resin-sealed molded portion made of a mold resin.
a, semiconductor element 11, metal wire 13, inner lead 2
3. The outer leads 24 are sealed with resin. The upper surface 22 b of the bed 22 and the lower end 24 a of the outer lead 24 are exposed from the resin sealing molding 14.

As shown in FIG. 5, the lead frame 20 includes a frame base 21, a bed 22, an inner lead 23 provided around the bed 22, an outer lead 24 connected to the inner lead 23, and And a tie bar 25 that supports the adjacent outer lead 24.

The inner lead 23 has a silver plating 23
a is provided, and a lower end portion 24a of the outer lead 24 is provided.
Only the outer solder S having a thickness of 5 to 20 μm is applied by plating. The broken line R in the figure indicates the resin-sealed molded portion 14.
Indicates the area sealed by

In such a QON semiconductor device 10, the outer leads 24 are cut in substantially the same area as the outer periphery of the resin-sealed molded part 14, and almost all of the outer leads 24 are disposed in the resin-sealed molded part 14. This is a so-called leadless type shape. For this reason, a QFP (Quad FlatPac) in which the outer leads 24 are arranged outside the resin sealing molding portion 14 is used.
kage) and SOP (Small Outline Package) type semiconductor devices.

Further, since the upper surface 22b of the bed 22 on which the semiconductor element 11 is mounted is exposed from the resin molding 14, the heat generated in the semiconductor element 11 is
2 can be dissipated more efficiently than the upper surface 22b.

On the other hand, mounting is performed in the QON semiconductor device 10 as follows. That is, the solder S is supplied to the lower end 24a of the outer lead 24 of the QON semiconductor device 10 by plating, and the solder paste P is printed on the printed circuit board 30 in advance.
After mounting No. 0, the solder paste P and the exterior solder S of the outer leads 24 are melted by reflow heating, and solder bonding is performed.

[0010]

The above-mentioned conventional QON
The semiconductor device 10 has the following problem. That is, only the lower end 24a of the outer lead 24 is plated with the exterior solder S applied after the molding. For this reason, the outer end surface 24b of the outer lead 24 is in a state in which the material is almost exposed at the time of cutting, and the outer solder plating hardly adheres.

For this reason, as shown in FIG. 6, the portion where the fillet F is formed by solder is only the lower end portion 24a of the outer lead 24, and the tip side portion 2a of the outer lead 24 is formed.
No fillet F is formed on the inner end 4c of the outer lead 24 and the outer lead 4b. This is because the portion of the outer lead 24 other than the lower end portion 24a is entirely covered with the mold resin. In addition, the outer end 24d of the outer lead 24
Also, since the material is exposed at the time of cutting, only about half of the terminal thickness is wet, and the fillet shape is reduced.

On the other hand, since most of the outer leads 24 are covered with the mold resin, it is not possible to alleviate the stress with respect to the thermal cycle after mounting on the board.

Therefore, a gull-wing type QFP or SO having a fillet formed on the entire end face of the outer lead is provided.
Compared with the P surface mount semiconductor device, the QON semiconductor device has a significantly reduced bonding strength between the printed board 30 and the outer lead 24. SON semiconductor devices have similar problems.

Therefore, the present invention increases the bonding strength by forming a sufficient fillet when mounting on the substrate, even when the entire outer lead is covered with resin.
Further, it is an object of the present invention to provide a semiconductor device capable of relaxing stress against a thermal cycle and a method for manufacturing the same.

[0015]

In order to solve the above-mentioned problems and achieve the object, a semiconductor device and a method of manufacturing the same according to the present invention are configured as follows.

(1) A semiconductor element, a lead portion which is arranged with one end thereof facing the semiconductor element and is connected to a terminal of the semiconductor element, and the semiconductor element and the lead portion are connected to the outer shape of the semiconductor element. Put almost or all inside,
And a resin sealing body for exposing and sealing the outer lead of the lead portion, wherein the outer lead has a coating of a solder material.

(2) a semiconductor element mounting step of mounting a semiconductor element on a bed, and an inner lead connecting step of connecting an electrode of the semiconductor element and one end of a lead portion with a metal wire;
A solder coating step of coating the outer lead of the lead part with solder, and a resin sealing step of substantially or entirely enclosing the semiconductor element and the lead part inside the outer shape of a resin, and exposing and sealing the outer lead And characterized in that:

(3) The method for manufacturing a semiconductor device according to the above (2), further comprising a solder coating melting step of melting the solder after the resin sealing step. .

[0019]

1A to 1D are views showing a QON type semiconductor device 40 according to an embodiment of the present invention, wherein FIG. 1A is a top view, and FIG. FIG. 2C is a bottom view, FIG. 2C is a longitudinal sectional view, and FIG. 2D is an enlarged sectional view of a portion surrounded by a two-dot chain line N in FIG. FIG. 2 shows the semiconductor device 4.
FIG. 4 is a diagram showing a lead frame 50 of No. 0; FIG. 3 is a cross-sectional view illustrating a main part of the semiconductor device 40. In these figures, the same reference numerals are given to the same functional portions as those in FIGS.

The semiconductor device 40 includes a bed 52 on which the semiconductor element 41 is mounted, an inner lead 53 disposed around the bed 52, and an outer lead 54 connected to the inner lead 53.

The terminals 42 of the semiconductor element 41 and the inner leads 53 are connected by metal wires 43, respectively. Further, reference numeral 44 in FIG. 1 denotes a resin-sealed molded portion made of a mold resin.
a, semiconductor element 41, metal wire 43, inner lead 5
3. The outer leads 54 are sealed with resin. The outline of the resin-sealed molded portion 44 substantially matches the line connecting the tips of the outer leads 54. The upper surface 52b of the bed 52
And, the outer leads 54 are exposed from the resin sealing molded portion 44.

As shown in FIG. 2, the lead frame 50 includes a frame base 51, a bed 52, an inner lead 53 provided around the bed 52, an outer lead 54 connected to the inner lead 53, and And a tie bar 55 that supports the adjacent outer lead 54.
The lead frame 50 is formed by pressing or etching.

The inner lead 53 has a silver plating 53
a, and the outer lead 54 has a thickness of 30 μm.
Is applied by plating. A broken line R in the figure indicates a range sealed by the resin sealing molded portion 44.

The semiconductor device 40 thus configured is
It is manufactured by the following steps. That is, the semiconductor element 41 is mounted on the bed 52 of the lead frame 50, and
Perform low-temperature curing at a temperature of ℃ or less. Thereafter, the semiconductor element terminals 4 are connected to the metal wires 43 by the same low-temperature bonding.
2 and the inner lead 53 are connected. After that, low-temperature resin sealing molding is performed within the broken line R with the mold resin to form the resin sealing molded portion 44, and the outer lead 54 is cut at the position of the broken line R.

Next, the resin sealing molded portion 44 is heated from the lower surface to the solder melting temperature in N ₂ or a reducing atmosphere, and the exterior solder S applied to the entire surface of the outer lead 54 in advance is melted. As a result, the outer leads 54 and the resin sealing molded portion 44 are separated, and the outer leads 5
The outer solder S spreads over the entire surface of the substrate 4. If a halogen-free flux is applied to the cutting position of the outer lead 54 before the melting, the solder spreads more reliably to the cutting position.

On the other hand, the QON manufactured by such a process
In the semiconductor device 40 of the type, mounting is performed as follows. That is, the solder paste P is printed on the printed circuit board 30, and the QON semiconductor device 40 is mounted. Then, the solder paste P and the outer leads 54 are heated by reflow heating.
Is melted with the exterior solder S, and solder bonding is performed. At this time, since the outer leads 54 are covered with the exterior solder S, the solder fillets F are formed on the entire outer leads 54.

As described above, the QO according to the present embodiment
In the N-type semiconductor device 40, since the entire outer lead 54 is covered with the exterior solder S, the outer lead 54 can be separated from the resin-sealed molded portion 44. Therefore, the solder fillet F at the time of mounting is
Since it is formed on the entire surface, high bonding strength to the printed board 30 can be obtained. In addition, since the outer leads 54 are separated from the resin-sealed molded portion 44, an independent lead shape can be secured, and it is possible to alleviate the stress with respect to the thermal cycle after mounting the board.

The present invention is not limited to the above embodiment. That is, in the above-described embodiment,
Although the QON type semiconductor device has been described, the present invention is similarly applicable to a SON type semiconductor device. In addition,
Of course, various modifications can be made without departing from the spirit of the present invention.

[0029]

According to the present invention, the outer leads of the package are in a non-contact relationship with the package sealing resin, and the outer leads are covered with the outer solder. Can be improved.

Since the outer solder of the outer lead of the package is once melted, it is possible to prevent the exposed material of the cut portion, which is generated when the lead is cut after the conventional outer plating. In particular, by being able to take measures against the exposure of the material at the tip of the lead, it is possible to improve the bonding strength in mounting on the substrate.

Since the outer solder is applied to the entire surface of the outer lead of the package, a solder fillet is formed on the entire surface of the outer lead at the time of mounting on the board, so that a high bonding strength is obtained and at the same time, the outer lead is separated from the package. Independent lead shapes can be ensured, and stress to thermal cycles after mounting on the board can be reduced.

[Brief description of the drawings]

FIG. 1 is a view showing a QON semiconductor device according to one embodiment of the present invention, wherein (a) is a top view, (b) is a bottom view,
(C) is a longitudinal sectional view, and (d) is an enlarged sectional view showing a main part of (c).

FIG. 2 is a plan view showing a lead frame used in the QON semiconductor device.

FIG. 3 is an essential part cross sectional view showing a state where the QON semiconductor device is mounted on a substrate;

4A and 4B are diagrams showing an example of a conventional QON semiconductor device, wherein FIG. 4A is a top view, FIG. 4B is a bottom view, FIG. 4C is a longitudinal sectional view, and FIG. The bottom view which expands and shows.

FIG. 5 is a plan view showing a lead frame used in the QON semiconductor device.

FIG. 6 is an essential part cross sectional view showing a state where the QON semiconductor device is mounted on a substrate;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 30 ... Printed board 40 ... Semiconductor device 41 ... Semiconductor element 44 ... Resin sealing molding part 50 ... Lead frame 52 ... Bed 53 ... Inner lead 54 ... Outer lead

Claims (3)

[Claims] 1. A semiconductor device, a lead portion arranged at one end of the semiconductor device and connected to a terminal of the semiconductor device, and a semiconductor device and the lead portion are formed inside an outer shape of the semiconductor device. And a resin sealing body for substantially exposing the outer leads of the lead portions and sealing the outer leads. The outer leads have a coating of a solder material. 2. A semiconductor element mounting step of mounting a semiconductor element on a bed; an inner lead connecting step of connecting an electrode of the semiconductor element to one end of a lead section with a metal wire; and soldering an outer lead of the lead section. A solder coating step of coating, and a resin sealing step of substantially or entirely housing the semiconductor element and the lead portion inside the outer shape of a resin, and exposing and sealing the outer leads. Manufacturing method of a semiconductor device. 3. The method of manufacturing a semiconductor device according to claim 2, further comprising a solder coating melting step of melting the solder after the resin sealing step.