JP2001092371A - Manufacturing method of electrooptical device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of electrooptical device in which a countermeasure against electrostatic charge capable of obtaining sufficient charge-removing effect even with respect to a liquid crystal device having a COG(chip-on-glass) construction is applied. SOLUTION: In electrode parts 31, extension pattern parts 31b extending from edge parts 31a being at a side opposite to a wiring parts 32 and an external connection part 33 to the outside of a panel planning area 30A are formed. These extension pattern parts 31b are formed so as to be opposed to destabilization branching parts 41 of a conductor pattern for removing charge 40 outside the panel planning area 30A.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electro-optical device, and more particularly to a technique for preventing a failure caused by static electricity in a manufacturing process.

[0002]

2. Description of the Related Art Generally, in an electro-optical device such as a liquid crystal device having a liquid crystal display panel, an electrode pattern for applying a predetermined electric field to an electro-optical material is provided on a surface of a substrate. For example, in a liquid crystal device, a predetermined electrode pattern is formed on the surfaces of two transparent substrates constituting a liquid crystal cell, and a protective film and an alignment film are laminated on this electrode pattern. Further, a color filter or the like may be formed as needed.

FIG. 5 shows an electrode pattern 10 on one transparent substrate constituting a conventional passive matrix type liquid crystal device.
It is a schematic plan view which shows typically. This electrode pattern 1
0 is formed in a panel scheduled region 10A on a mother substrate larger than the panel substrate constituting the liquid crystal cell. The electrode pattern 10 includes a plurality of electrode portions 11 formed in a stripe shape and arranged in parallel with each other, and a wiring portion 12 drawn from one end of each electrode portion 11. Further, outside the panel scheduled region 10A, a static elimination pattern 20 (electrostatic protection pattern) having a plurality of static elimination branch portions 21 opposed to the tip 12a of each of the plurality of wiring portions 12 at a slight distance from each other. ) Is formed. The distal end portion 12a of the wiring portion 12 is arranged outside the planned panel region 10A. As a result, the facing portion between the wiring portion 12 and the charge eliminating branch portion 21 is also set outside the planned panel region 10A.

[0006] The charge removing pattern 20 forms the wiring portion 1 before the electrode pattern 10 is charged and the amount of charge increases so much as to generate a discharge (spark) in the electrode pattern 10.
2 is provided in order to prevent a spark from being generated between the electrodes and wiring due to static electricity during the manufacturing process and causing damage between the electrodes and the wiring by generating a discharge between the distal end portion 12a and the charge removing branch portion 21. Is what it is.

The mother board on which the electrode pattern 10 and the charge eliminating pattern 20 are formed as described above is bonded to another mother board via a sealing material (not shown), and a liquid crystal is provided inside the sealing material. Injected. In this manufacturing process, the illustrated mother substrate is separated at an intermediate stage along the planned panel region 10A shown in FIG. Therefore, finally, the charge removing pattern 20 is removed together with the tip 12 a of the wiring portion 12.

[0006]

By the way, in the above-mentioned liquid crystal device, the liquid crystal panel mounts an integrated circuit chip such as a driver IC having a built-in drive driver circuit on the liquid crystal panel itself.
In some cases, a G (Chip On Glass) structure is adopted. In particular,
With the recent miniaturization of portable devices, miniaturization of liquid crystal devices including drive circuits has been required, and CO
Opportunities to adopt the G structure are increasing. However,
When manufacturing a liquid crystal device having this COG structure, the connection terminals provided at the tips of the wiring portions of the electrode pattern must be arranged in accordance with the narrow pitch terminal arrangement of the integrated circuit chip. It is structurally difficult to first form the above-described static elimination pattern,
Forming a conductor pattern under the chip mounting portion has an electrical problem.

Accordingly, the present invention is to solve the above-mentioned problem, and an object of the present invention is to provide a manufacturing method in which a countermeasure against static electricity is provided which can obtain a sufficient static electricity removing effect even for a liquid crystal device having a COG structure. Is to do.

[0008]

According to the present invention, there is provided a method for manufacturing an electro-optical device, comprising: an electrode portion for applying electrolysis to an electro-optical material; and an electrode portion drawn from one end of the electrode portion. Forming a first conductor pattern having a wiring portion on a substrate, wherein the first conductor pattern is connected to the conductor pattern at a portion other than the one end of the front conductor pattern, or A method for manufacturing an electro-optical device, comprising forming a second conductive pattern for static elimination at a position separated by a predetermined distance.

According to the present invention, the second conductor pattern for static elimination is connected to the conductor pattern at a portion other than the one end of the front conductor pattern or at a position separated from the conductor pattern by a predetermined distance. By forming such a pattern, a pattern for static elimination can be formed without disturbing the pattern structure of the wiring portion and the mounting portion, so that the degree of freedom in designing the electrode pattern can be increased. In particular, in the case of an electro-optical device having a COG structure in which a semiconductor chip is directly mounted on a substrate, a pattern for static elimination cannot be provided in the semiconductor chip mounting portion. It is possible to take sufficient measures against static electricity.

In the present invention, it is preferable that a connection terminal portion connected to a semiconductor chip mounted on the substrate is formed at an end of the wiring portion.

In the present invention, the first conductor pattern and the second conductor pattern are formed so as to oppose each other, and at the opposing portion, the first conductor pattern or the second conductor pattern is formed. Preferably, at least one is tapered.

According to the present invention, when the first conductor pattern and the second conductor pattern for static elimination are opposed to each other at a predetermined interval, at least one of the opposing end portions has a tapered shape. In this case, the discharge portion is limited in the facing portion, and the discharge is easily generated. Therefore, it is possible to prevent the discharge from being generated in another portion of the electrode pattern. In particular, in the case of the present invention, the second conductor pattern for static elimination is provided facing the outer edge of the first conductor pattern other than the one end from which the wiring portion is drawn out. Since the pattern shapes of the first and second conductor patterns in the portion can be more freely designed, the above-mentioned tapered shape can be easily formed.

In the present invention, the first conductor pattern is
It is preferable that the pattern width in the facing portion is formed smaller than the electrode portion.

According to the present invention, the pattern width of the portion of the first conductor pattern facing the second conductive pattern for static elimination is determined by the structure of the electrode pattern, but is opposed to the second conductor pattern for static elimination. By forming the portion to be narrower than the electrode portion, discharge can be easily generated without being affected by the pattern shape of the first conductor pattern. In particular, in the case of the present invention, since the second conductor pattern for static elimination is provided at the outer edge of the first conductor pattern other than the one end from which the wiring portion is drawn out, the first conductor pattern is provided. It is possible to more freely design a pattern shape in a portion facing the second conductor pattern for pattern static elimination. Therefore, the above-described narrow width shape can be easily formed.

In the present invention, the method further comprises a step of separating the second conductor pattern.

According to the present invention, since the step of separating the second conductor pattern is included, the second conductor pattern for static elimination does not remain in the electro-optical device. This can be avoided and the charge eliminating pattern can be configured more freely and in an effective pattern shape.

In each of the above-mentioned inventions, the above-mentioned first aspect is used.
A plurality of stripe-shaped electrode portions are formed in parallel on the conductor pattern, and the wiring portion is drawn out from one end of the electrode portion, and the second conductor pattern for static elimination is provided in the electrode portion. It is desirable to be configured so as to be conductively connected to the other end opposite to the one end, or to be arranged to face the other end. According to this means, the wiring portion is drawn out at one end of the stripe-shaped electrode portion, and the static elimination pattern is arranged at the other end, so that the conductor pattern for static elimination can be used without largely changing the electrode pattern. Can function.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of an electro-optical device according to the present invention will be described in detail with reference to the accompanying drawings. Each of the embodiments described below relates to a liquid crystal device having a passive matrix type liquid crystal panel. However, the present invention can be applied to other various types of liquid crystal devices, and further includes a plasma display and an electroluminescence. The present invention is also applicable to various electro-optical devices such as a display device.

FIG. 1 is a schematic plan view showing an electrode pattern on a mother substrate in the liquid crystal device of the present embodiment. FIG. 2 shows a mother substrate 100 including a plurality of panel scheduled regions.
FIG. 4 is a plan view showing an example of the entire planar structure of FIG. Mother board 10
0 indicates that three or more planned panel areas 30A are arranged vertically and horizontally, but in FIG.
It is drawn as a mother substrate including one panel scheduled region 30A. Further, the mother board may have only a single panel scheduled area, and may have a slight peripheral area outside the panel scheduled area.

In each panel scheduled region 30A, a conductor pattern 30 having a plurality of electrode portions 31 formed in parallel in a stripe shape and a plurality of wiring portions 32 drawn from each of these electrode portions 31 is formed. ing. In the conductor pattern 30, the distal end of the wiring portion 32 is a connection terminal 32a, and is formed in a predetermined arrangement in an external connection portion 33 indicated by an alternate long and short dash line in the end of the panel scheduled region 30A. I have. An integrated circuit chip such as a driver IC is mounted on the plurality of connection terminals 32a arranged in the external connection portion 33 via a known anisotropic conductive film (ACF). In the external connection part 33, the external terminal 3 not conductively connected to the wiring part 32 is provided.
4 are also formed. The external terminals 34 are for electrically connecting the integrated circuit chip with a wiring member such as a flexible wiring board connected to an end of the panel.

As described above, the conductor pattern 30 of the present embodiment is roughly constituted by the electrode section 31, the wiring section 32, and the external connection section 33. Here, the electrode portion 31 has an extension pattern portion 3 extending from the end 31a on the opposite side to the wiring portion 32 and the external connection portion 33 to the outside of the panel scheduled area 30A.
1b is formed. The extension pattern portion 31b is formed so as to face the charge eliminating branch portion 41 of the charge eliminating pattern 40 outside the panel scheduled region 30A. The static elimination pattern 40 is formed on the surface of the mother substrate 100 with the same material at the same time as the conductor pattern 30 as in the conventional example.

The conductor pattern 30 and the charge removal pattern 4
0 is constituted by a transparent conductor such as ITO (indium tin oxide) or a metal thin film such as aluminum. In the present embodiment, since the substrate is a mother substrate for a liquid crystal panel constituting a passive matrix type liquid crystal device, the stripe-shaped electrode portions 31 are formed. Yes,
For example, pixel electrodes arranged in a matrix according to the type of liquid crystal panel, wiring such as scanning lines and data lines connected to the pixel electrodes, and active elements (TFTs or TFDs) conductively connected to the pixel electrodes and the wirings Etc.) may be formed.

In the present embodiment, each panel scheduled area 30A
Wiring portion 3 in conductor pattern 30 formed in
2 and the end 3 of the electrode portion 31 opposite to the external connection portion 33
1a, the static elimination pattern 40 is opposed to the conductor pattern 30 in the plurality of panel scheduled areas 30A as shown in FIG. It is configured. Usually, a constant potential such as a ground potential is supplied to the charge removing pattern 40 during the manufacturing process.

In this embodiment, when each electrode portion 31 of the conductor pattern 30 is charged for some reason,
Before a discharge is generated in another portion (for example, between the electrode portions 31 or between the wiring portions 32 or between the connection terminals 32 a), the tip of the extension pattern portion 31 b extending from the end portion 31 a of each electrode portion 31 and the tip for discharging are formed. Conductor pattern static elimination pattern 4
A discharge is generated in a portion opposing the zero discharge branch 41, and static electricity is designed to escape to the conductor pattern 40 for discharge. Therefore, the electrode part 31 and the wiring part 32
Is charged, a discharge is generated between the electrode portions 31, between the wiring portions 32, or between the connection terminals 32a, thereby preventing damage to the electrodes, wiring, terminals, and the like. In this case, the interval between the extension pattern portion 31b and the charge eliminating branch portion 41 is set between the electrode portions 31 or between the wiring portions 32 formed at a narrow pitch or between the connection terminals 32a in order to achieve the above object. It is desirable that the gap be formed smaller than the interval.

In this embodiment, the extension pattern portion 3
1b is formed to be narrower than the electrode portion 31. This is because the charge is concentrated in a narrow region of the opposed portion by facing the charge removing branch portion 41 formed in the same narrow width to facilitate discharge.

FIG. 3 shows a modification of the above embodiment. In this modified example, an extension pattern portion 31b extends from an end portion 31a, and an electrode portion 31 facing a charge eliminating branch portion 41 of a conductor pattern 40 for static electricity removal;
The electrode portions 31 that are electrically connected to the conductive patterns 40 for static elimination through the conductive pattern portions 42 are alternately formed. In this case, the electrode 31 conductively connected to the conductive pattern 40 for static elimination through the conductive pattern 42 is used.
Is a conductor pattern 40 for discharging static electricity without discharging.
Through the extension pattern part 3
In the electrode portion 31 whose 1b faces the charge eliminating branch portion 41, the static electricity escapes to the charge eliminating conductor pattern 40 by the discharge to the charge eliminating branch portion 41 in the same manner as described above.

In this modification, for example, when a probe or the like (for example, a roll-shaped measurement electrode) is applied to the electrode portion 31 and the potentials of the plurality of electrode portions 31 are continuously measured from the left side to the right side in FIG. As shown in the upper part, the potential of the electrode portion 31 conductively connected to the conductor pattern 40 for static elimination by the conductive pattern portion 42 becomes 0 (the same as the potential of the conductor pattern 40 for static elimination), and the electrode portion adjacent thereto 31
Is V (potential lower than the discharge generation voltage between the extension pattern portion 31b and the charge eliminating branch portion 41). By measuring the potential distribution of the electrode unit 31 in this way,
A pattern inspection of the conductor pattern 30 and the conductor pattern 40 for static elimination can be performed.

FIG. 4 is an enlarged partial plan view showing a detailed structure of a portion where the conductive pattern 30 and the conductive pattern 40 are opposed to each other in the above embodiment or modification. FIG. 4A shows a structure suitable as a plane pattern of a portion where the conductor pattern 30 and the conductor pattern 40 for static elimination in the above embodiment are opposed. In this pattern, the electrode portion 31 extends as it is outside the panel scheduled area 30A, and its tip 3
1c has a tapered shape. On the other hand, the leading end 41a of the charge removing branch portion 41 of the conductive pattern 40 for charge removal also has a tapered shape, and faces the above described leading end 31c.
By forming in this manner, a discharge easily occurs between the distal end portion 31c and the distal end portion 41a, so that damage to the electrode portion 31, the wiring portion 32, and the like can be prevented.

FIG. 4B shows a structure suitable as a plane pattern of a portion where the conductor pattern 30 and the conductor pattern 40 for static elimination in the above-mentioned modification are opposed. In this pattern, the wide electrode portion 31 is extended to the narrow extended pattern portion 3.
1b extends outside the panel expected area 30A, and the leading end 31d of the extended pattern portion 31b is tapered. On the other hand, the charge removing branch portion 41 of the conductive pattern 40 for charge removal.
Is formed to be relatively wide at first, but becomes a narrow protrusion 41b in the middle, and the tip 41c of this protrusion 41b is formed.
Has a tapered shape. According to this pattern structure,
The extension pattern portion 31b and the protruding portion 41b are both formed to have a narrow width, and the distal end portion 31d and the distal end portion 4 facing each other are formed.
Since both 1c and 1c are tapered, discharge is likely to occur in these opposing portions, so that pattern destruction or the like due to discharge occurring in other portions can be prevented.

In the above embodiment, the end of the conductor pattern opposite to the end from which the wiring portion is drawn out is conductively connected to the conductor pattern for static elimination or is opposed to the conductor pattern. If it is possible due to the configuration of the conductor pattern, the opposite side as described above, that is, an outer edge different from the side from which the wiring portion is drawn out instead of the upper outer edge in FIG. 1, for example, the right outer edge in FIG. The portion or the left outer edge portion may be conductively connected to the conductive pattern for static elimination, or may be disposed to face. Such a structure is sufficiently possible when pixel electrodes are arranged for each pixel and wiring such as a scanning line or a data line is formed between the pixel electrodes. However, as described above, in the passive matrix type panel, the end 31a of the electrode portion 31 opposite to the one end of the electrode portion 31 from which the wiring portion 32 is drawn is electrically connected to the conductive pattern 40 for static elimination. It is preferable that they are arranged opposite to each other because a simple pattern configuration can be maintained.

The method for manufacturing an electro-optical device according to the present invention includes:
It is needless to say that the present invention is not limited to the illustrated example described above, and various changes can be made without departing from the scope of the present invention. For example, even in an active matrix type liquid crystal device, not only protection of electrodes and wiring, but also
In some cases, a conductor pattern for static elimination for protection is provided in order to prevent electrostatic breakdown of the active element. In such a case, when the COG structure is adopted, COG mounting is performed in the same manner as in the above embodiment. By pulling out the wiring from the opposite side of the external connection part to perform conductive connection to the conductor pattern for static elimination or facing the conductor pattern for static elimination with a predetermined gap, effective electrostatic Measures can be taken.

[0032]

As described above, according to the present invention,
In the conductor pattern, the wiring portion is connected to the outer edge portion other than the one end portion of the extracted electrode portion, or a conductive pattern for static elimination configured to be opposed at a predetermined interval. By forming the conductive pattern, the conductor pattern for static elimination can be formed without disturbing the pattern structure of the wiring portion and the mounting portion, so that the degree of freedom in designing the conductor pattern can be increased. In particular, in the case of an electro-optical device having a COG structure for mounting an integrated circuit chip or the like, a conductor pattern for static elimination cannot be provided in the chip mounting portion. By forming a conductor pattern, it is possible to take sufficient measures against static electricity.

[Brief description of the drawings]

FIG. 1 is a plan view schematically showing a pattern structure corresponding to one panel region showing an embodiment of a method for manufacturing an electro-optical device according to the present invention.

FIG. 2 is an overall plan view schematically showing a planar structure of a mother substrate used in the embodiment.

FIG. 3 is a plan view showing a modification of the embodiment.

FIG. 4A is an enlarged partial plan view showing a preferred pattern structure of a portion where a conductor pattern and a conductor pattern for static elimination according to the embodiment are opposed to each other, and FIG. It is an enlarged partial plan view (b) which shows the suitable pattern structure of a part.

FIG. 5 is a plan view schematically showing a conventional conductor pattern and a conductor pattern for static elimination.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 30 Conductive pattern 30A Planned panel area 31 Electrode part 31a End part 31b Extension pattern part 32 Wiring part 32a Connection terminal 33 External connection part 40 Conductive pattern for static elimination 41 Static elimination branch part

Claims (5)

[Claims] 1. A method of manufacturing an electro-optical device in which a first conductor pattern having an electrode portion for applying electrolysis to an electro-optical material and a wiring portion extending from one end of the electrode portion is formed on a substrate. A second conductor pattern for static elimination is formed so as to be connected to the conductor pattern at a portion other than the one end of the front conductor pattern, or at a position separated from the conductor pattern by a predetermined distance. Of manufacturing an electro-optical device. 2. The method of manufacturing an electro-optical device according to claim 1, wherein a connection terminal portion connected to a semiconductor chip mounted on the substrate is formed at an end of the wiring portion. 3. The first conductor pattern and the second conductor pattern according to claim 1 or 2, wherein the first conductor pattern and the second conductor pattern are formed so as to face each other, and the first conductor pattern or A method of manufacturing an electro-optical device, wherein at least one of the second conductor patterns is tapered. 4. The method of manufacturing an electro-optical device according to claim 3, wherein a pattern width of the first conductor pattern in the facing portion is smaller than that of the electrode portion. 5. The method according to claim 1, wherein:
14. The method of manufacturing an electro-optical device according to claim 12, further comprising a step of separating the second conductive pattern.