JP2001060681A - Solid-state image pickup device and method for driving the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the sensitivity and transferring efficiency of a cell even when the cell is formed by arranging photoelectric conversion sections on both sides of a vertical charge transferring section and reducing the size of the cell. SOLUTION: The cell 10 of a solid-state image pickup device is composed of two photoelectric conversion sections 11 and a vertical charge transferring section 12 arranged between the sections 11 and the section 12 has two electrodes 13. In addition, the section 12 holds four electrodes 13 by sharing the two electrodes 13 of either the upper or lower cell 10. Therefore, the section 12 can have at least three or more electrodes which are required for deciding direction. The signal charges of the photoelectric conversion sections 11 sharing the repeating units of the vertical charge transferring section 12 are not read out at the same timing, because the section 12 has the four electrodes 13 as repeating units and the signal charges of the photoelectric conversion sections 11 are outputted without mixture.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a solid-state imaging device and a method of driving the same, and more particularly, to a solid-state imaging device used in an electronic still camera, a personal computer, and the like, and a method of driving the same.

[0002]

2. Description of the Related Art Conventionally, as a solid-state imaging device used for an electronic still camera, a personal computer, or the like, for example, a charge coupled device (CCD) is known.
ce) Image sensors are known. This CCD image sensor is composed of a cell including a photoelectric conversion unit and a vertical charge transfer unit, and the vertical charge transfer unit reads out signal charges of the photoelectric conversion unit.

As a scanning method for reading out signal charges by the vertical charge transfer section, there are a progressive scan for scanning an image in the order of scanning lines and an interlaced scanning for scanning an image by skipping scanning lines. The progressive scan is used, for example, for display on a display of a personal computer, and the interlaced scan is used, for example, for standard display of a television receiver.

FIG. 10 shows a conventional cell structure, in which (a)
FIG. 4 is an explanatory diagram of a structure for progressive scanning, and FIG. 7B is an explanatory diagram of a structure for interlaced scanning. FIGS. 11A and 11B show progressive scanning, in which FIG. 11A is an explanatory diagram of an accumulation state, FIG. 11B is an explanatory diagram of a reading state, and FIG. FIG.
Indicates interlaced scanning, (a) accumulation state, (b)
FIG. 3 is an explanatory diagram of a read state, and FIG. 3C is an explanatory diagram of a shift state.

As shown in FIG. 10A, a cell 1 for progressive scanning has a photoelectric conversion unit 2 and a vertical charge transfer unit 4 composed of four electrodes 3 each having a width of W and a length of L. ing.

[0006] The electric charge accumulated in the photoelectric conversion unit 2 (see FIG.
(See (a)) are all read out to the vertical charge transfer unit 4 at the same time (see FIG. 11 (b)). All the read charge patterns are simultaneously shifted one row at a time and output from the output circuit unit 6 via the horizontal charge transfer unit 5 (FIG. 11).
(C)).

[0007] As shown in FIG. 10 (b), the cell 7 for interlaced scanning has a photoelectric conversion unit 2 and a width W and a length 2.
The vertical charge transfer section 4 includes two L electrodes 8.

The charge accumulated in the photoelectric conversion unit 2 (FIG. 12)
(See FIG. 12A) First, at the first time, the charges in the odd-numbered rows are read out to the vertical charge transfer unit 4 (see FIG. 12B).
All the read charge patterns are simultaneously shifted by one row and output from the output circuit unit 6 via the horizontal charge transfer unit 5 (see FIG. 12C). Then, at a second time,
The charges in the even-numbered rows are read out, shifted, and output in the same manner as the charges in the odd-numbered rows.

That is, in the case of the cell 7 for interlaced scanning, the vertical charge transfer section 4 is connected to the photoelectric conversion section 2 to which light is input.
Are two electrodes 8 but at least three
Since two or more electrodes are required, two electrodes 8 of another cell located either above or below are shared.

Here, in personal computers and digital cameras, all pixels are exposed for the same time.
All the pixels need to be read from the photoelectric conversion unit 2 to the vertical charge transfer unit 4 at a time. For this reason, a progressive system in which two electrodes 8 that are commonly used are put in one cell and four electrodes are used has been generally used.

However, by combining a CCD image sensor and a mechanical shutter and exposing all the pixels with the mechanical shutter for the same time, it is not necessary to read out the photoelectric conversion unit 2 to the vertical charge transfer unit 4 at one time. An interlaced system for sequentially reading out signal charges by using a cell 7 is also used.

[0012]

However, in response to the demand for smaller and lighter personal computers and digital cameras, when a single cell is reduced in size to four electrodes, a photoelectric conversion unit which is a light input portion is required. 2 and the vertical charge transfer section 4 as a transfer area are naturally small and narrow. Regarding the magnitude of the transfer capacitance, two of the four electrodes correspond, and the area thereof determines the capacitance.

Therefore, if cells are simply reduced in size and miniaturized, the photodiodes serving as photoelectric conversion means become smaller and, naturally, the sensitivity deteriorates, the portion for transferring electric charges becomes smaller, and the dynamic range becomes narrower. The characteristics will be degraded.

That is, in the case of progressive scanning, the amount of electric charges handled by both the photoelectric conversion unit 2 and the vertical charge transfer unit 4 decreases as the cell size is reduced.

Similarly, in the case of an interlaced cell,
As the cell size is reduced, the amount of charge handled by the photoelectric conversion unit 2 and the vertical charge transfer unit 4 decreases. In addition to this problem, in the case of an interlaced cell, there is a problem that the ratio of the electrode length L to the electrode width W is increased and the transfer efficiency is reduced. Therefore, in interlaced scanning, in order to secure the electrode width W of the vertical charge transfer unit 4, a balance design must be made between the reduction in the amount of charge handled by the photoelectric conversion unit 2.

An object of the present invention is to provide a solid-state imaging device and a driving method thereof, which do not reduce characteristics such as sensitivity and transfer efficiency even when a cell is reduced.

[0017]

In order to achieve the above object, a solid-state imaging device according to the present invention is a solid-state imaging device having a cell comprising a photoelectric conversion unit and a vertical charge transfer unit. The photoelectric conversion units are arranged and formed on both sides of the transfer unit, respectively, and one vertical charge transfer unit is also used to correspond to two photoelectric conversion units.

With the above structure, in a solid-state imaging device having a cell including a photoelectric conversion unit and a vertical charge transfer unit, the cell is formed by arranging the photoelectric conversion units on both sides of the vertical charge transfer unit. In addition, since one vertical charge transfer unit is also used and corresponds to two photoelectric conversion units, the cell use efficiency increases. Thus, characteristics such as sensitivity and transfer efficiency do not decrease even when the cell is reduced.

Further, the solid-state imaging device can be driven by the method for driving a solid-state imaging device according to the present invention.

[0020]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is an explanatory diagram showing the cell structure of the solid-state imaging device according to the first embodiment of the present invention. This cell structure can be applied to a personal computer or a digital camera by combining a CCD image sensor and a mechanical shutter and using a mechanical shutter so as to expose all pixels at the same time.

As shown in FIG. 1, the cell 1 of the solid-state imaging device
0 is composed of two photoelectric conversion units 11 and a vertical charge transfer unit 12 arranged therebetween, and the vertical charge transfer unit 12 has two electrodes 13.

That is, the photoelectric conversion units 11 are arranged on both sides of the vertical charge transfer unit 12 along the two electrodes 13.

By sharing two electrodes 13 of another cell 10 located above or below the cell 10,
Four electrodes 13 are secured. Thus, at least three or more electrodes necessary for determining the direction can be provided.

As such a solid-state imaging device, there is, for example, a CCD image sensor used for an electronic still camera, a personal computer, or the like.

FIG. 2 shows a method of scanning the cell of FIG. 1 (part 1).
(A) is an explanatory diagram of an accumulation state, (b) is an explanatory diagram of a first read state, and (c) is an explanatory diagram of a first shift state. FIG.
Shows a scanning method (part 2) of the cell in FIG. 1, (d) shows a second read state, (e) shows a third read state,
(F) is each explanatory view of a 4th read-out state. In addition,
In FIGS. 2 and 3, the wiring to which the transfer clock pulse is input is not shown.

As shown in FIGS. 2 and 3, the photoelectric converter 1
1 is converted and stored in the photoelectric conversion unit 11 into signal charges (see FIG. 2A), and the charges stored in the photoelectric conversion unit 11 are sequentially transferred to the vertical charge transfer unit through the following procedure. 12 is read.

In FIG. 2 and FIG. 3, for example, two sets of photoelectric conversion units 11 in which signal charges “a” and “A” and signal charges “b” and “B” are accumulated are vertically adjacent vertical charges. By sharing the two electrodes of the transfer unit 12, four electrodes are secured. That is, the vertical charge transfer unit 12 uses four charge transfer electrodes as a repeating unit.

First, at the first time, the vertical charge transfer section 12
Are read out (a, c,..., A, u,...) Of the odd-numbered rows of photoelectric conversion units 11 located on the left side of FIG.
(B)). All the charge patterns read to the vertical charge transfer unit 12 are simultaneously shifted by one row and output from the output circuit unit 15 via the horizontal charge transfer unit 14 (see FIG. 2C).

Next, at a second time, the vertical charge transfer section 12
Are read out (A, C,..., Α, γ,...) Of the photoelectric conversion units 11 in the odd rows located on the right side of FIG.
(D)). All the charge patterns read to the vertical charge transfer unit 12 are simultaneously shifted one row at a time, and output from the output circuit unit 15 via the horizontal charge transfer unit 14.

Next, at a third time, the vertical charge transfer section 12
Are read out of the photoelectric conversion units 11 in the even-numbered rows (b, d,..., I, e,.
(E)). All the charge patterns read to the vertical charge transfer unit 12 are simultaneously shifted one row at a time, and output from the output circuit unit 15 via the horizontal charge transfer unit 14.

Further, at the fourth time, the vertical charge transfer section 12
Are read out from the photoelectric conversion units 11 (B, D,..., Β, δ,.
(F)). All the charge patterns read to the vertical charge transfer unit 12 are simultaneously shifted one row at a time, and output from the output circuit unit 15 via the horizontal charge transfer unit 14.

FIG. 4A is a plan view schematically illustrating the structure of the cell portion constituted by the cells of FIG.
FIG. 4B is a sectional view taken along the line II ′ of FIG. FIG.
FIG. 2 is a waveform diagram illustrating an example of a transfer clock pulse applied to each electrode of the charge transfer unit in FIG. 1. In addition, FIG.
Only a part of the cell portion is shown, and only signal charges “a”, “A”, “A”, “b”, “B”, and “I” are shown as an example.

As shown in FIG. 4, a cell portion composed of a plurality of cells is connected to an electrode 13 to which a transfer clock pulse Φ1 is input.
a, an electrode 13b to which a transfer clock pulse Φ2 is input, an electrode 13c to which a transfer clock pulse Φ3 is input, and an electrode 13d to which a transfer clock pulse Φ4 is input.

The electrode 13 a is disposed on the left side of the vertical charge transfer section 12 and is connected to, for example, the photoelectric conversion section 11 in which the signal charge “a” is stored, via the signal charge readout area 16.

Similarly, the electrode 13b is connected to the vertical charge transfer section 1
The electrode 13c is located on the left side of the vertical charge transfer unit 12, for example, in the photoelectric conversion unit 11 where the signal charge "A" is stored, on the right side of the photoelectric conversion unit 11 where the signal charge "b" is stored, for example. The electrode 13d is located on the right side of the vertical charge transfer section 12,
For example, the photoelectric conversion unit 11 in which the signal charge “B” is stored
Are connected via a signal charge readout region 16 respectively.

The signal charge readout area 16
For example, the electrode 13b may be connected to the photoelectric conversion unit 11 in which the signal charge "a" is stored, and the photoelectric conversion unit 11 may be arbitrarily provided as needed so that the photoelectric conversion unit 11 to be read is located at the position to be read.

As shown in FIG. 4B, a photoelectric conversion section 11 having an n-type semiconductor layer 33 is provided in a p-type semiconductor region 32 on an n-type semiconductor substrate 31. The p-type semiconductor region 32 further includes an n-type semiconductor layer 34 and a gate oxide film 3.
5 and a vertical charge transfer portion 12 comprising a vertical charge transfer electrode 13 and ap ⁺ -type diffusion layer 36. A light-shielding film 37 is formed on the region other than the upper photoelectric conversion unit 11.
Is provided.

As shown in FIG. 5 (a), first, when the transfer clock pulses Φ1 the read pulse V _T is riding inputs ((a) refer), at time t _1, the read pulse V _T, the photoelectric From the conversion unit 11 to the vertical charge transfer unit 1
2, the signal charges “a” and “a” are read. The read signal charges are accumulated under the charge transfer electrode 13a to which the read pulse _VT is applied. Then the signal charge in time t _2, the FIG. 5 in accordance with an electric potential fluctuation due to the applied voltage variation of the transfer clock pulse (a), the electrode 13a and the electrode 1 a high voltage V _H is applied
3b. In the same manner, the signal charge will be transferred, the signal charges at time t ₄ are accumulated under the electrode 13c and the electrode 13d.

As described above, the transfer clock pulse Φ2
Following Φ4, the signal charges are shifted in the vertical charge transfer unit 12 and output from the output circuit unit 15 via the horizontal charge transfer unit 14. Thus, after the read signal charge is shifted to a horizontal charge transfer section, i.e. one cycle after the transfer clock pulse, the transfer clock pulses Φ2 the read pulse V _T is riding inputs ((b) see ), Time t
_{When 1} , the readout pulse V _T causes the photoelectric conversion unit 11
, The signal charge “A” is read out to the vertical charge transfer unit 12.

[0041] Thereafter, this is repeated, the transfer clock pulses Φ3 the read pulse V _T is riding is inputted from the photoelectric conversion unit 11 to the vertical charge transfer section 12, detection signal charges as "b", "it" is read It is, when the transfer clock pulse Φ4 the read pulse V _T is riding is inputted from the photoelectric conversion unit 11 to the vertical charge transfer section 12, signal charges "B"
Is read.

Therefore, the signal charges of all the photoelectric conversion units 11 are output without being mixed, and the signal charges a, A, b, and B of the photoelectric conversion units 11 sharing the repetition unit of the vertical charge transfer unit 12 are output. (See FIG. 2A) are not read at the same time.

As described above, in the cell 10 (see FIG. 1) of the solid-state imaging device, the photoelectric conversion units 11 are arranged on both the left and right sides of the vertical charge transfer unit 12, and the two photoelectric conversion units 11 The transfer unit 12 is also used. For this reason, in each stage of the vertical charge transfer section 12, since one photodiode has only two electrodes, the electrodes of the upper and lower cells 10 are shared, and the signal charges are read four times. This creates one screen.

In general, the transfer speed of signal charges decreases as the electrode length increases, and increases as the electrode width increases. However, as the electrode area changes, the ratio of the electrode width to the electrode length changes and the transfer speed increases. A decrease in speed can be suppressed.

In the cell 10 described above, when the size of the photodiode is the same as the cells 1 and 7 of the conventional example shown in FIG. 10, the width of the electrode 13 is 2W + w, and
The length of 3 is 2L (see FIG. 1). Where W and L
Is a basic unit of the electrode width and the electrode length of the conventional cell 1 (see FIG. 10A) and cell 7 (see FIG. 10B).
w is the sum of two conventional cells 1 and 7 (W +
W, refer to the vertical line at the center), which are unnecessary portions and correspond to the separated portions as channel stops for preventing the outflow of electric charges.

Further, since the width of the electrode 13 can be further increased, the expanded portion is distributed to the photoelectric conversion units 11 on both sides, so that the area of each photoelectric conversion unit 11 can be increased. It is possible to increase the sensitivity of the solid-state imaging device. As a result, it is possible to cope with an increase in the number of pixels in the future, and it is possible to sufficiently cope with such a design change.

FIG. 6 is an explanatory diagram showing another example of the arrangement of the cell in FIG. As shown in FIG. 6, the cell 20 has one vertical charge transfer unit 12 having two electrodes 13 and two photoelectric conversion units 11 arranged on both left and right sides thereof.
Four electrodes 13 are secured in one cell (see (a)). FIG. 7 shows an example of the transfer clock pulse applied to the electrode 13 of the cell 20. In this case, the photoelectric conversion unit 11
The number of electrodes corresponding to the number of the cells becomes four for two of the cells 10, so that the transfer amount becomes almost half of that of the cells 10.

The cell 21 has one vertical charge transfer section 12 provided with one electrode 13 and three sets of two photoelectric conversion sections 11 arranged on both left and right sides thereof. One electrode 13 is secured (see (b)). FIG. 8 shows an example of the transfer clock pulse applied to the electrode 13 of the cell 21. In this case, three vertical charge transfer units 1 are vertically arranged.
2 is shared. The transfer amount is about one time that of the cell 10.

The cell 22 has one vertical charge transfer section 12 having two electrodes 13 and three sets of two photoelectric conversion sections 11 arranged on both left and right sides thereof. One electrode 13 is secured (see (c)). FIG. 9 shows an example of a transfer clock pulse applied to the electrode 13 of the cell 22. In this case, three vertical charge transfer units 1 are vertically arranged.
2 share six electrodes 13 and each vertical charge transfer section 12
The number of the electrodes 13 is two, and the amount of transferred charges can be increased. The transfer amount is about twice that of the cell 10.

The cell 21 and the cell 22 are different in the number of the electrodes 13 even when the photodiodes of the photoelectric conversion unit 11 are together, and the capacity for accumulating and transferring the signal charges of the cell 22 is approximately two times that of the cell 21. Doubled. Here, the number of shared vertical charge transfer units 12 is not limited to three vertically,
It may be four or more vertically.

As described above, the cell of the solid-state imaging device according to the above-described embodiment has 2n (n is an integer) photoelectric conversion units 11 arranged on the left and right sides of one vertical charge transfer unit 12 so that the vertical charge The transfer unit 12 is also used, and, for example, by sharing the electrode of either the upper or lower vertical charge transfer unit 12,
At least three electrodes are secured.

That is, recently, the cost reduction of the memory and the CP
As the speed of U increases, the CCD image sensor is also used systematically by using a memory, etc., and it is not necessary to read out all the pixels at the same time. It is possible to do. Further, it is preferable that the transfer area is large, but it is better that the area of the photodiode does not wrinkle. Therefore, the shareable portion is shared as much as possible.

Therefore, it has two photoelectric conversion units 11 and one vertical charge transfer unit 12 formed between them, so that the signal charges of all the photoelectric conversion units 11 are output without being mixed, and the vertical charge By having a configuration in which the signal charges of the photoelectric conversion units 11 sharing the repeating unit of the transfer unit 12 are not read out at the same time, the cell use efficiency is increased, and the sensitivity, transfer efficiency, and the like generated when the cells are downsized. The performance can be improved without lowering the characteristics of.

[0054]

As described above, according to the present invention, in a solid-state imaging device having a cell including a photoelectric conversion unit and a vertical charge transfer unit, the cell is provided on both sides of the vertical charge transfer unit. Since the conversion section is arranged and one vertical charge transfer section is also used to correspond to the two photoelectric conversion sections, the cell use efficiency is increased. Therefore, even when the cell is reduced, characteristics such as sensitivity and transfer efficiency are reduced. It does not lower.

Further, the solid-state imaging device can be driven by the method for driving a solid-state imaging device according to the present invention.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing a cell structure of a solid-state imaging device according to an embodiment of the present invention.

FIG. 2 shows a scanning method (1) of the cell in FIG. 1;
(A) is an accumulation state, (b) is a first read state,
(C) is each explanatory view of the 1st shift state.

FIG. 3 shows a scanning method (2) of the cell in FIG. 1;
(D) is an explanatory diagram of the second read state, (e) is an explanatory diagram of the third read state, and (f) is an explanatory diagram of the fourth read state.

FIG. 4A is a plan view schematically illustrating a structure of a cell portion constituted by the cells of FIG. 1; FIG. 4B is a cross-sectional view taken along the line II ′ of FIG.

FIG. 5 is a waveform diagram showing an example of a transfer clock pulse applied to each electrode of the charge transfer section of FIG.

FIG. 6 is an explanatory diagram showing another arrangement example of the cell in FIG. 1;

FIG. 7 is a waveform diagram showing an example of a transfer clock pulse applied to each electrode of the charge transfer section of FIG. 6 (a).

FIG. 8 is a waveform diagram showing an example of a transfer clock pulse applied to each electrode of the charge transfer section of FIG. 6 (b).

FIG. 9 is a waveform diagram showing an example of a transfer clock pulse applied to each electrode of the charge transfer section of FIG. 6 (c).

10A and 10B show a conventional cell structure, in which FIG. 10A is a structural explanatory diagram for progressive scanning, and FIG. 10B is a structural explanatory diagram for interlaced scanning.

FIGS. 11A and 11B show progressive scanning, wherein FIG. 11A is an explanatory diagram of an accumulation state, FIG. 11B is a diagram of a read state, and FIG. 11C is an explanatory diagram of a shift state.

FIG. 12 shows interlaced scanning, in which (a) an accumulation state;
(B) is an explanatory view of a read state, and (c) is an explanatory view of a shift state.

[Explanation of symbols]

 10, 20, 21, 22 cell 11 photoelectric conversion unit 12 vertical charge transfer unit 13, 13a, 13b, 13c, 13d electrode 14 horizontal charge transfer unit 15 output circuit unit 16 signal charge readout region VT readout pulse Φ1, Φ2, Φ3 Φ4 transfer clock pulse

Claims (11)

[Claims] 1. A solid-state imaging device having a cell including a photoelectric conversion unit and a vertical charge transfer unit, wherein the cell is formed by arranging the photoelectric conversion units on both sides of the vertical charge transfer unit. A solid-state imaging device, which also functions as a charge transfer unit and corresponds to two photoelectric conversion units. 2. The vertical charge transfer section includes n vertically positioned n
The solid-state imaging device according to claim 1, wherein the electrodes of +1 (n is an integer of 1 or more) or more cells are shared. 3. The solid-state imaging device according to claim 1, wherein the vertical charge transfer unit has at least three electrodes serving as one repeating unit. 4. The solid-state imaging device according to claim 1, wherein all signal charges of said photoelectric conversion unit are output without being mixed. 5. The solid-state imaging device according to claim 1, wherein signal charges of said photoelectric conversion units sharing a repetition unit of said vertical charge transfer unit are not read out at the same time. . 6. A signal charge readout region connecting the electrode and the photoelectric conversion portion is arbitrarily provided so that a photoelectric conversion portion to be read is located at a position to be read. The solid-state imaging device according to any one of the above. 7. The method of driving a solid-state imaging device according to claim 1, wherein said photoelectric conversion unit is disposed on both sides of said vertical charge transfer unit in said vertical charge transfer unit. A method for driving a solid-state imaging device, wherein signal charges are sequentially read out every time and at least two charge patterns are obtained. 8. All the charge patterns read to the vertical charge transfer section are simultaneously shifted by one row and output from an output circuit section via a horizontal charge transfer section. Item 8. A method for driving a solid-state imaging device according to Item 7. 9. The method according to claim 7, wherein the signal charges are read by inputting a transfer clock pulse on which a read pulse is superimposed. 10. The method according to claim 7, wherein reading is performed from each of 2n (n is an integer of 1 or more) photoelectric conversion units for each repetition unit of the vertical charge transfer unit. The driving method of the solid-state imaging device according to the above. 11. The method according to claim 10, wherein the signal charges stored in each of the photoelectric conversion units are sequentially read out at different timings.