JP2001053279A - Thin-film transistor and liquid crystal display device provided with the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin-film transistor which is stable in element characteristics and excellent in reliability by a method wherein an oxidation- reduction reaction is restrained from occurring between a gate electrode and a gate insulating film. SOLUTION: A thin film transistor is equipped with a polycrystalline silicon film 12 formed on a glass substrate 10 through the intermediary of an insulating film 11, a silicon oxide film 13 formed on the polycrystalline silicon film 12, and a molybdenum electrode 15, where a reaction stop film 14 of tantalum is interposed between the silicon oxide film 13 and the molybdenum electrode 15.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a thin film transistor and a liquid crystal display device using the same.

[0002]

2. Description of the Related Art A liquid crystal display device is used as a thin and lightweight display in not only OA and AV applications but also in various fields. In particular, a liquid crystal display device using a thin film transistor as a switching element of a pixel electrode is excellent in gradation display and realizes a performance similar to a CRT as a color display.

In recent years, it has been proposed to apply a thin film transistor not only as a switching element of a pixel electrode but also as a circuit element constituting a peripheral driving circuit. According to this, the peripheral driving circuit can be formed on the same substrate as the image display unit. However, a transistor included in a driving circuit is required to have higher performance than a transistor required for a switching element of a pixel electrode. Therefore, it is required to use polycrystalline silicon (hereinafter, also referred to as “polysilicon”) that exhibits higher performance than amorphous silicon as a semiconductor forming a thin film transistor.

FIG. 5 is a sectional view showing a conventional thin film transistor using polysilicon. A polysilicon film 22 is formed on a transparent substrate 20 with an insulating film 21 interposed therebetween, and a channel region 22c, a source region 22a, and a drain region 22b are formed in the polysilicon film 22. A gate insulating film 23 is formed on the polysilicon film 22, and a gate electrode 24 is formed on the gate insulating film 23. Further, the interlayer insulating film 25 and the source region 22
a and a drain electrode 22a connected to the
and a drain electrode 26b connected to the drain electrode 26b. Further, the pixel electrode 27 is connected to the drain electrode 26b.

FIG. 6 is a process chart for explaining a conventional method of manufacturing a thin film transistor. Insulating film 2 on transparent substrate 20
Then, an amorphous silicon film 28 is formed through the substrate 1 (FIG. 6A). After the amorphous silicon film 28 is polycrystallized by laser irradiation to form the polysilicon film 22, it is patterned (FIG. 6B). A gate insulating film 23 and a gate electrode 24 are sequentially formed (FIGS. 6C and 6D). After patterning the gate electrode 24, ions are implanted into the polysilicon film 22 to perform source region 2 formation.
2a and the drain region 22b are formed (FIG. 6).
(E)). Next, annealing is performed after the ion implantation in order to electrically activate the ions implanted into the polysilicon film 22 and to recover the crystalline damage of the polysilicon caused by the ion implantation. Further, after forming the interlayer insulating film 25 (FIG. 6 (f)), a source electrode 26a and a drain electrode 26b are formed, and the pixel electrode 27 is selectively formed. It is completed (FIG. 6 (g)).

[0006]

As a method of manufacturing a thin film transistor, a method of forming a plurality of thin film transistors on one large-area glass substrate in order to be applicable to a large-screen liquid crystal display device and to realize a reduction in cost. Is adopted. However, it is very difficult to develop an ion implantation apparatus having a mass separation means that can be applied to this large-area substrate. Therefore,
In the manufacture of a thin film transistor, an ion implantation apparatus having no mass separation means is used, and various kinds of ions are implanted in a mixed state. As a result, even unnecessary or rather harmful ions are implanted, which makes it difficult to control impurities and may eventually adversely affect device characteristics and reliability.

As the metal constituting the gate electrode, molybdenum or a molybdenum alloy is preferably used. This is because, for example, compared to other materials such as aluminum, tantalum or chromium, they have excellent properties such as heat resistance and electric resistance. However, it has been found that when molybdenum or a molybdenum alloy is used as the gate electrode, the above problem appears particularly remarkably.

An object of the present invention is to provide a thin film transistor which can be applied to a large-screen liquid crystal display device and realizes stable element characteristics and good reliability, and a liquid crystal display device using the same. And

[0009]

In order to achieve the above object, a thin film transistor according to the present invention comprises: a polycrystalline silicon film formed on a substrate; a gate insulating film formed on the polycrystalline silicon film; A thin film transistor including a gate electrode formed on a gate insulating film, wherein a reaction preventing film is interposed between the gate electrode and the gate insulating film. Here, the reaction prevention film is a member that suppresses at least an oxidation-reduction reaction that occurs between the gate electrode and the gate insulating film.

According to the studies by the inventors, it has been found that the deterioration of device characteristics and reliability due to unnecessary ions occurs by the following mechanism.

For example, in ion implantation using phosphorus hydride, not only phosphorus ions but also hydrogen ions and compound ions of hydrogen and phosphorus are simultaneously implanted. Light ions such as hydrogen ions have a higher implantation rate than other heavy ions, and are implanted up to the gate electrode and the gate insulating film below the gate electrode. When such hydrogen ions are present, a complicated oxidation-reduction reaction occurs between the gate electrode and the gate insulating film when exposed to a high temperature in the annealing treatment after the ion implantation, and the gate insulating film is unstable. A large electrical trap center is likely to occur. It is considered that the occurrence of such a trap center causes deterioration of device characteristics and reliability.

For example, when a thin film transistor is operated under a high temperature condition (for example, 150 ° C.), an applied electric field and thermal energy, and the presence of hydrogen atoms formed by reducing hydrogen ions in a gate insulating film by a gate electrode. In some cases, ionization of the trap center (that is, dissociation movement of electrons) as shown in [Formula 1] may occur. The ionization of the trap center causes a phenomenon that the current-voltage curve shifts to the negative voltage side.

[0013]

Embedded image

In particular, when molybdenum is used as the gate electrode, the molybdenum may be in various oxidation states (from −1 to −1).
(6), the oxidation state of the gate electrode is likely to fluctuate and become unstable due to the influence of the oxidation state of the surrounding material. As a result, an oxidation-reduction reaction easily occurs between the gate electrode and the gate insulating film, so that the device characteristics are significantly deteriorated.

The present invention has been made on the basis of the above findings. By forming a reaction prevention film, the oxidation-reduction reaction between a gate electrode and a gate insulating film is suppressed, and hydrogen ions and the like are produced in a manufacturing process. Even if unnecessary ions are implanted, stable device characteristics and good reliability can be realized. Since the thin film transistor has stable element characteristics, a liquid crystal display device with high display quality and little display unevenness can be obtained by using the thin film transistor as a switching element of a pixel electrode. Further, since the element characteristics are stable, it can be easily incorporated into a peripheral circuit, and is also effective as a peripheral circuit element of a liquid crystal display device. Furthermore, by using an ion implantation apparatus without mass separation means,
Since it can be formed on a large-area glass substrate, it can be manufactured at low cost and applied to a large-screen liquid crystal display device.

In the thin film transistor, the reaction preventing film is preferably made of at least one metal selected from tantalum, chromium and titanium, an oxide of the metal, or silicon nitride. This is because the oxidation-reduction reaction between the gate electrode and the gate insulating film can be more reliably suppressed, and stable device characteristics and good reliability can be realized.

In the thin film transistor,
It is preferable that the thickness of the reaction prevention film is 20 nm or more and 100 nm or less. This is because the oxidation-reduction reaction between the gate electrode and the gate insulating film can be more reliably suppressed.

In the thin film transistor,
The gate electrode is preferably made of molybdenum or an alloy of molybdenum and tungsten. These metals are
This is because the gate electrode and the wiring can be formed at the same time because the wiring has low electric resistance and can be used as a wiring of a peripheral circuit.

Further, in the thin film transistor,
Preferably, the gate insulating film is a silicon oxide. This is because it has good compatibility with the polycrystalline silicon film and has excellent electrical characteristics.

In the thin film transistor,
It is preferable that the polycrystalline silicon film is a film formed by polycrystallization of an amorphous silicon film. This is because a film can be formed at a relatively low temperature.

The liquid crystal display device of the present invention comprises a first substrate provided with the above-mentioned thin film transistor according to the present invention, a second substrate disposed so as to face the first substrate, And a liquid crystal interposed between the substrate and the second substrate. In this liquid crystal display device, the thin film transistor is used, for example, as a switching element of a pixel electrode or an element constituting a peripheral circuit.

[0022]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view showing an example of the structure of a thin film transistor according to the present invention. Note that this drawing shows a mode in which the liquid crystal display device is used as a switching element of each pixel.

A polysilicon film 12 is formed on a transparent substrate 10 with an insulating film 11 interposed. Further, a source region 12a and a drain region 12b, which are impurity diffusion regions, are formed in the polysilicon film 12, and a region between both regions becomes a channel region 12c. A gate insulating film 13 is formed on the polysilicon film 12.
In an area corresponding to the upper part of the upper channel area 12c,
A gate electrode 15 is formed via the reaction prevention film 14. Further, an interlayer insulating film 16 is formed on the gate electrode 15, and the source region 12 a is formed on the interlayer insulating film 16.
The source electrode 17a connected to the drain region 12b
And a drain electrode 17b connected to the drain electrode 17b.
Further, the pixel electrode 18 is electrically connected to the drain electrode 17b.

The transparent substrate 10 is, for example, a glass substrate. The insulating film 11 is made of, for example, a silicon nitride film or a silicon oxide film, and has a thickness of usually 100 to 600.
nm.

The polysilicon film 12 is a film formed by polycrystallization of an amorphous silicon film (hereinafter, also referred to as “amorphous silicon”), and usually has a thickness of 30 to 10.
0 nm.

The gate insulating film 13 is made of, for example, silicon oxide and has a thickness of usually 80 to 120 nm.

The reaction preventing film 14 is a member for suppressing a redox reaction between the gate insulating film 13 and the gate electrode 15 and is interposed between the gate insulating film 13 and the gate electrode 15. As the substance constituting the reaction prevention film 14, a metal having a smaller number of possible oxidation states (oxidation number) than the possible oxidation state of a metal constituting the gate electrode 15 and a compound thereof are preferably used. Can be used. Specifically, metals such as tantalum, chromium, and titanium and oxides thereof, silicon nitride, and the like can be given. The thickness of the reaction preventing film 14 is usually 20 to 100 nm, preferably 20 to 50 nm, and more preferably 30 to 40 nm.

The gate electrode 15 is made of, for example, molybdenum,
It is made of a molybdenum-tungsten alloy or the like, and has a thickness of usually 100 to 400 nm.

The interlayer insulating film 16 is made of, for example, silicon oxide, silicon nitride, or the like.
The drain electrode 17b is made of, for example, aluminum. The pixel electrode 18 is a transparent electrode made of, for example, indium tin oxide (ITO).

Next, an example of a method for manufacturing a thin film transistor according to the present invention will be described. FIG. 2 is a process chart showing a method of manufacturing the thin film transistor of FIG.

First, an insulating film 11 is formed on a transparent substrate 10, and an amorphous silicon film 19 is formed on the insulating film 11 (FIG. 2A). The formation of the insulating film 11 and the amorphous silicon film 19 can be performed by a CVD method.

After that, the amorphous silicon film 19 is polycrystallized to form the polysilicon film 12. Subsequently, the polysilicon film 12 is patterned by a photolithographic etching method, and is left in a region where a thin film transistor is to be formed (FIG. 2B). Polycrystallization can be performed by laser irradiation using an excimer laser or a CW laser. The etching can be performed, for example, by dry etching using a fluorine-based gas.

Next, a gate insulating film 13 is formed on the polysilicon film 12 (FIG. 2C). The gate insulating film 13 can be formed by a CVD method, for example, plasma CVD using tetraethoxysilane (Si (OC ₂ H ₅ ) ₄ : usually abbreviated as “TEOS”).
Plasma CVD using N ₂ O-silane based gas,
It can be performed by a reduced pressure or normal pressure CVD method using a silane-based gas or the like.

Thereafter, a reaction preventing film 14 is formed on the gate insulating film 13 and a gate electrode 15 is formed on the reaction preventing film 14 (FIG. 2D). The formation of the reaction prevention film 14 can be performed by a sputtering method when a metal is used as the reaction prevention film, and can be performed by a CVD method when a oxide film or a nitride film is used. it can. The gate electrode 15 can be formed by a sputtering method.

The reaction preventing film 14 and the gate electrode 15 are
It is patterned by photolithographic etching.
Next, an impurity is introduced into the polysilicon film 12 using the reaction prevention film 14 and the gate electrode 15 as a mask to form a source region 12a and a drain region 12b, and then an annealing process is performed (FIG. 2E). Etching can be performed by wet etching or dry etching. Further, the impurity can be introduced by an ion implantation method in which an impurity source is ionized in plasma and accelerated and introduced. As an impurity source, N
When a channel transistor is used, PH ₃ gas can be used. When a P-channel transistor is used, AsH ₃ gas or B ₂ H ₆ gas can be used. The acceleration voltage is several tens kV or more.
A range of 100 kV is appropriate. The annealing treatment is performed to activate the impurity ions, and the treatment condition is usually 500 to 600 ° C. in a nitrogen atmosphere.

Next, an interlayer insulating film 16 is formed on the gate electrode 15 and the gate insulating film 13 (FIG. 2F).
The formation of the interlayer insulating film 16 can be performed by the CVD method, similarly to the formation of the gate insulating film 13 (the step of FIG. 2C).

Further, through holes for taking out electrodes are formed in portions of the gate insulating film 13 and the interlayer insulating film 16 corresponding to portions above the source region 12a and the drain region 12b. Subsequently, a conductive film is formed by a sputtering method or the like, and this is patterned by a photolithography / etching method to form a source electrode 17a and a drain electrode 17b. Furthermore, a transparent conductive film is formed,
This is patterned by a photolithographic etching method to form a pixel electrode 18 (FIG. 2G).

FIG. 3 is a sectional view showing an example of the structure of the liquid crystal display device according to the present invention. In this liquid crystal display device, two glass substrates 3a and 3b, which are transparent substrates, are arranged to face each other via a spacer 8, and a liquid crystal 7 is provided between the glass substrates.
Is held. On the inner surface of one glass substrate 3a, the thin film transistor 1 and the pixel electrode 2 according to the present invention are arranged in a matrix. The thin film transistor 1 is electrically connected to the pixel electrode 2 and functions as a switching element for driving the pixel electrode 2. A color filter 4 and a common electrode 5 are formed on the inner surface of the other glass substrate 3b. Polarizing plates 6a and 6b are arranged on the outer surfaces of the glass substrates 3a and 3b. Further, although not shown, a voltage applying means to the electrodes and a backlight are appropriately arranged.

[0040]

EXAMPLE (Example) An N-channel thin film transistor having the structure shown in FIG. 1 was manufactured in the following manner. First, a silicon oxide film having a thickness of 400 nm and a thickness of 5
A 0 nm polysilicon film was formed in this order. The polysilicon film was formed by polycrystallizing amorphous silicon formed by a CVD method by irradiation with an excimer laser, and patterning this. Next, a 100-nm-thick silicon oxide film was formed as a gate insulating film by a plasma CVD method using TEOS. Thereafter, a film thickness of 40 nm is formed as a reaction preventing film by a sputtering method.
After forming tantalum, a thickness of 300 is formed as a gate electrode.
nm of molybdenum-tungsten alloy was formed. After patterning the reaction prevention film and the gate electrode, PH ₃
Ion implantation using gas was performed, and annealing was performed at 500 to 600 ° C. in a nitrogen atmosphere for about 2 hours. Next, a silicon oxide film having a thickness of 400 nm was formed as an interlayer insulating film by a CVD method. After forming a through hole for extracting an electrode, film formation and patterning were performed by a sputtering method to form a source electrode and a drain electrode made of aluminum.

A bias temperature stress test was performed on the fabricated thin film transistor, and the current-voltage characteristics were evaluated before the start of the test, 10 minutes after the start of the test, and 30 minutes after the start of the test. In the bias temperature stress test, a source voltage and a drain voltage are set to 0 V and a voltage of 30 V is applied as a gate voltage for a predetermined time under a temperature condition of 150 ° C. In addition, current-voltage characteristics were evaluated with a source voltage of 0 V and a drain voltage of 5 V.

As a result, as shown in FIG. 4, in the thin film transistor of this example, it was confirmed that the current-voltage characteristics hardly changed before and after the application of the bias temperature stress.

Comparative Example A thin film transistor having the structure shown in FIG. 5 was manufactured. The fabrication was carried out in the same manner as in the example except that the procedure shown in FIG. 6, that is, the reaction prevention film was not formed.

A bias temperature stress test was performed on the fabricated thin film transistor in the same manner as in the example, and the current-voltage characteristics were evaluated before the start of the test, 10 minutes after the start of the test, and 30 minutes after the start of the test. As a result, as shown in FIG. 7, in the thin film transistor of this comparative example,
It was confirmed that the current-voltage characteristics shifted to the negative voltage side with the application of the bias temperature stress.

[0045]

As described above, according to the thin film transistor of the present invention, the polycrystalline silicon film formed on the substrate, the gate insulating film formed on the polycrystalline silicon film, and the gate insulating film Since the semiconductor device includes a gate electrode formed thereon and a reaction prevention film intervenes between the gate electrode and the gate insulating film, stable device characteristics and good reliability can be realized.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating an example of a structure of a thin film transistor according to the present invention.

FIG. 2 is a process sectional view illustrating the method for manufacturing the thin film transistor shown in FIG.

FIG. 3 is a cross-sectional view illustrating an example of a structure of a liquid crystal display device according to the present invention.

FIG. 4 shows the current of a thin film transistor manufactured in Example.
FIG. 3 is a diagram illustrating voltage characteristics.

FIG. 5 is a cross-sectional view illustrating a structure of a conventional thin film transistor.

FIG. 6 is a process sectional view illustrating the method for manufacturing the thin film transistor shown in FIG.

FIG. 7 shows the current of a thin film transistor manufactured in a comparative example.
FIG. 3 is a diagram illustrating voltage characteristics.

[Explanation of symbols]

 10, 20 Transparent substrate 11, 21 Insulating film 12, 22 Polysilicon film 13, 23 Gate insulating film 14 Reaction preventing film 15, 24 Gate electrode 16, 25 Interlayer insulating film 17a, 26a Source electrode 17b, 26b Drain electrode 18, 27 Pixel electrode 19, 28 Amorphous silicon film 1 Thin film transistor 2 Pixel electrode 3a, 3b Glass substrate 4 Color filter 5 Common electrode 6a, 6b Polarizer 7 Liquid crystal 8 Spacer

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Tetsuya Kawamura 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term (reference) 2H092 GA29 HA28 JA24 JA34 JA37 JA46 KA04 KA05 MA07 MA19 MA30 NA24 NA25 NA27 PA01 PA06 PA08 PA09 PA11 PA13 5F110 AA24 CC02 DD02 DD13 EE04 EE06 EE14 EE44 EE50 FF02 FF03 FF09 FF29 FF30 FF32 GG02 GG13 GG25 GG44 HJ13 HJ22 HL03 HL23 HM18 NN02 NN23 NN24 NN35 PP03

Claims (8)

[Claims] 1. A thin film transistor comprising: a polycrystalline silicon film formed on a substrate; a gate insulating film formed on the polycrystalline silicon film; and a gate electrode formed on the gate insulating film. A reaction preventing film interposed between the gate electrode and the gate insulating film. 2. The thin film transistor according to claim 1, wherein the reaction prevention film is at least one metal selected from tantalum, chromium, and titanium, or an oxide of the metal. 3. The thin film transistor according to claim 1, wherein the reaction prevention film is a silicon nitride. 4. The film thickness of the reaction preventing film is 20 nm or more and 10
The thin film transistor according to claim 1, wherein the thickness is 0 nm or less. 5. The thin film transistor according to claim 1, wherein the gate electrode is made of molybdenum or an alloy of molybdenum and tungsten. 6. The thin film transistor according to claim 1, wherein the gate insulating film is a silicon oxide. 7. The thin film transistor according to claim 1, wherein the polycrystalline silicon film is a film formed by polycrystallization of an amorphous silicon film. 8. A first substrate provided with the thin film transistor according to claim 1, a second substrate arranged to face the first substrate, and the first substrate. And a liquid crystal interposed between the second substrate and the second substrate.