JP2001044197A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress destruction of a through electrode during bonding by providing the through electrode with a portion whose cross-sectional area is varied as it extends from the front to the back surface of a semiconductor substrate. SOLUTION: A through hole 14 is formed from both the front and the back surface of a semiconductor substrate 11 by anisotropic etching. Then, the cross- sectional area of the hole 14 is varied as the hole 14 extends from the front to the back surface of the substrate 11. Further, a through electrode 12 is formed in the hole 14. Similarly to the hole 14, the electrode 12 has its cross-sectional area varied as it extends from the front to the back surface of the substrate 11. According to this arrangement, the electrode 12 is reinforced against force applied in the direction of the thickness of the substrate 11. Further, in laminating layers on the substrate 11, any force that would be applied to the electrode 12 by slight parallel deviations during the lamination is distributed, whereby the destruction of the electrode 12 can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device such as an LSI chip having a through electrode, and more particularly, to a semiconductor device in which a plurality of semiconductor devices are stacked with the through electrodes aligned.

[0002]

2. Description of the Related Art Electrodes of a semiconductor device such as an LSI chip are
Conventionally, it has been formed on the main surface of the semiconductor device. This is because the semiconductor device is manufactured by applying the photomechanical technology, so that the semiconductor device can be formed in the same process on the main surface without increasing the number of processes, which is convenient in manufacturing.

In recent years, as the operating speed of semiconductor devices such as LSIs and the speed of signal transmission have increased, signal delays due to wiring between semiconductor devices have become remarkable. Therefore,
In order to shorten the wiring length and avoid signal delay, a semiconductor device mounting form called flip-chip mounting in which electrodes of the semiconductor device are directly connected to a mounting substrate has been used. ing.

However, even if the semiconductor devices are mounted by flip-chip mounting, the semiconductor devices are electrically connected to each other via a mounting substrate, so that the wiring length is increased to some extent.

In order to avoid this problem, that is, to avoid a signal delay due to wiring, it has been considered to form an electrode penetrating the semiconductor chip and stack the semiconductor chips in the vertical direction (for example, see Japanese Unexamined Patent Application Publication No. -63137 gazette).

FIG. 8 is a view for explaining a conventional semiconductor chip using the through electrodes. A through hole 54 is provided in the semiconductor chip 51, and a conductive material (through electrode) 52 is embedded in the through hole 54. The semiconductor device 51 is covered with an insulating film 55, and further covered with a protective film 56. A projecting electrode 53 is formed on the conductive material (through electrode) 52 of the through hole 54.

FIG. 9 is a view showing a mounting structure in which the semiconductor devices shown in FIG. 8 are stacked. As shown in this figure, the semiconductor chip 51 and the semiconductor chip 61 are stacked with the respective through holes 54 and 64 aligned. Thereby, the wiring between the semiconductor chips 51 and 61 becomes extremely short, and a signal delay can be suppressed.

[0008]

However, when the semiconductor chips shown in FIG. 8 are stacked in the vertical direction as shown in FIG. 9, a slight shift may occur in the parallelism of the semiconductor chips 51 and 61.

FIG. 10 is a diagram showing an example. FIG.
In the case of (1), the semiconductor chip 51 rises to the left with respect to the semiconductor chip 61. In such a case, when connecting the semiconductor chips 51 and 61 by bonding, a time difference occurs between the plurality of protruding electrodes 53 of the semiconductor chip 51 and the through electrodes 62 of the semiconductor chip 61. Specifically, the protruding electrode 53a on the left side of the semiconductor chip 51 contacts the semiconductor chip 61 (the through electrode 62a) first. Therefore, when the bonding force is applied thereafter, the bonding force acts only on the left projection electrode 53a and the through electrode 62a until the right projection electrode 53b contacts the semiconductor chip 61.

At this time, as shown in FIG. 11, the penetrating electrodes 52, 62 of the stacked semiconductor chips receive the bonding force almost exclusively by the shearing force on the side surfaces of the penetrating electrodes 52, 62. However, in general, the joint is weaker against shear forces than the pressure on the surface, and the joint is broken with less force.

Therefore, in the configuration shown in FIG. 10, the bonding force is intensively received due to slight parallel displacement between the semiconductor chips 51 and 61 to be stacked, and the through electrode 62 is formed.
(52a in FIG. 10) may be destroyed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor device capable of suppressing breakage of a through electrode during bonding and a method of manufacturing the same.

[0013]

According to a first aspect of the present invention, there is provided a semiconductor device having a through electrode penetrating a semiconductor substrate.
The semiconductor substrate is characterized in that the semiconductor substrate has a portion where the cross-sectional area is changed on the way from the front surface to the back surface.

According to a second aspect of the present invention, in a semiconductor device having a through electrode penetrating a semiconductor substrate, the through electrode has a portion having a small cross-sectional area on the way from the front surface to the back surface of the semiconductor substrate. It is characterized by the following.

A third invention is characterized in that at least two of the semiconductor devices according to the first invention or the second invention are stacked with the through electrodes aligned with each other.

A fourth invention is a method of manufacturing a semiconductor device according to the second invention, wherein the first hole is formed by performing anisotropic etching from one of the front surface and the back surface of the semiconductor substrate. Forming a second hole at a position corresponding to the first hole by performing metal plating on the first hole and performing anisotropic etching from the other surface of the semiconductor substrate. Performing metal plating on the second hole.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. Here, an LSI chip will be described as an example of a semiconductor device, but the present invention is not limited to this.

FIG. 1 is a main sectional view showing one embodiment of a semiconductor device (LSI chip) of the present invention. FIG. 2 is a diagram showing a semiconductor device configured by stacking the LSI chips of FIG.

In FIG. 1, reference numeral 11 denotes an LSI chip. Note that the transistors formed in the LSI chip 11 and the wiring of the inner layer are not shown. Reference numeral 15 denotes an insulating film with the surface wiring. Reference numeral 16 denotes a protective film.

Reference numeral 14 denotes a through hole, and reference numeral 12 denotes a through electrode formed therein. As will be described later, the through hole 14 is formed by anisotropic etching from the front and back surfaces of the LSI chip 11, and has a diameter (cross-sectional area) from the front and back surfaces of the LSI chip 11 toward the center in the chip thickness direction. Each is formed in a tapered shape so as to be small. The through electrode 12 is provided in the through hole 14.
In addition, as described later, it is formed by filling and filling a metal with holes. Therefore, the through-electrode 12 has a large diameter (cross-sectional area) on the front surface and the back surface of the LSI chip 11 and a small diameter (cross-sectional area) at the center, similarly to the through hole 14.

Reference numeral 13 denotes a protruding electrode for stacking the LSI chips 11 in the vertical direction.

The semiconductor device shown in FIG. 2 is obtained by stacking the LSI chip 11 and the LSI chip 21 having the structure shown in FIG. 1, and the through holes 14 and 24 (or the respective through electrodes 12 and 22) are provided. Is aligned. In this semiconductor device, since the wiring is formed by the through electrodes 12 and 22, it is possible to suppress a signal delay due to the wiring length. FIG. 2 shows that the above-described semiconductor device is a film substrate 4
FIG.

FIG. 3 shows the through hole 1 in FIGS.
FIGS. 4 and 24 are explanatory diagrams illustrating the effects of through electrodes 12 and 22. FIGS. As shown in this figure, through holes 14, 24
Are formed in a tapered shape so that the cross-sectional area is smaller at the center in the chip thickness direction than the front and back surfaces of the LSI chips 11 and 21. In such a configuration, the bonding force when stacking the LSI chips 11 and 21 as shown in FIG. 2 is the shearing force on the side surface of the through hole (arrows A and B).
And the LSI chips 11 and 22 are held by the reaction force of the pressure (arrows C and D).

For this reason, it becomes possible to stably support the through electrodes 12 and 22 even with respect to a large bonding force, as compared with a conventional through hole having a constant cross-sectional area. For this reason, the force applied to the through electrodes 12 and 22 caused by slight parallel displacement when the LSI chips 11 and 21 are stacked can be decomposed, and the breakage of the through electrodes 12 and 22 can be prevented.

Next, an example of a method of manufacturing the above-described LSI chip 11 of FIG. 1 will be described. FIG. 4 is a process flow chart for explaining the manufacturing method. FIGS. 5 and 6 are process diagrams for explaining main processes. Hereinafter, description will be made in the order of steps.

First, a photoresist 18 having an opening at a position where a through hole is formed is applied, exposed and developed on the surface of a substrate (Si substrate) 17 on which circuits and the like are formed (Step 1,
5A, the hole (first hole) 30 is formed by performing anisotropic etching of the Si substrate 17 (Step 2), and the photoresist is removed (Step 3, FIG. 5B).

FIG. 7 is an explanatory view showing the shape of the hole 30 when anisotropic etching is performed. Various angles can be selected by selecting an etchant at the time of etching. For example, when a KOH solution is used as an etchant, the (111) plane of the Si substrate 17 is selectively etched. About 30 ° hole 30)
Can be formed.

Next, an insulating film (NSG film, SiO ₂ ) 19
Is formed (Step 4), a photoresist is coated, exposed, and developed on the NSG film (Step 5), and a contact hole for connection with the above-described circuit or the like is formed (Step 6), and the photoresist is removed. (Step 7, FIG. 5C).

Subsequently, a barrier metal film and a plating base film are formed by sputtering (steps 8 and 9), and at least a conductive material (plating film) 31 is formed by electroplating so as to cover the hole 30 (steps 10 and 9). FIG. 5D). And
The plating film 31 is flattened (Step 11, FIG. 5E).

Next, a photoresist is applied, exposed and developed (step 12), and the wiring is patterned (step 13).
The photoresist is removed (step 14, FIG. 5 (f)).

Thus, the anisotropic etching process for the surface of the Si substrate 17 is completed. Then, step 1
Steps 14 to 14 are also performed on the back surface of the Si substrate 17 (steps 15 to 28, FIG. 6).

As a matter of course, step 15 (FIG. 6)
In (a)), it is necessary to form the photoresist so as to have an opening at a position corresponding to the hole (first hole) 30 on the surface. Step 16 (FIG. 6)
In (b)), the NSG film formed at the bottom of the hole 30 on the surface in step 4 is also removed. Further, Step 20 (FIG. 6)
In (d)), the hole (second hole) 32 on the back surface is
The NSG film 33 formed on the bottom is removed.

Thereafter, protective films are formed on the front and back surfaces by sputtering, and the electrode portions are exposed by etching, thereby completing the wafer process.

By the above steps, the semiconductor device (LSI chip) shown in FIG. 1 can be manufactured. Note that the bump electrodes 13 in FIG. 1 may be formed by a general method.

The laminated structure as shown in FIG. 2 can be manufactured by preparing two or more semiconductor devices described above and joining them by a known bonding technique.

In the above-described semiconductor device, a semiconductor device having a through electrode whose cross-sectional area changes in a tapered shape from the front surface and the back surface of the semiconductor device has been described. However, the present invention is not limited to this. If the cross-sectional area of the through electrode changes at least in part from the front surface to the back surface, the effect of the present invention that the through electrode becomes strong against the bonding force can be obtained.

Therefore, the through electrode does not need to be configured so that its cross-sectional area is reduced between the front surface and the back surface.
For example, conversely, the cross-sectional area may be increased. In this case, the through electrode can be manufactured by using over-etching. However, in consideration of the manufacturing accuracy, the configuration of FIG. 1 formed by the above-described anisotropic etching is excellent.

[0038]

According to the semiconductor device of the present invention, the through electrode is strong against the force in the thickness direction of the semiconductor substrate. Also,
In the case of stacking semiconductor elements, a force applied to the through electrode caused by a slight parallel shift at that time is dispersed, and breakage of the through electrode can be prevented.

Further, according to the method for manufacturing a semiconductor device of the present invention, a semiconductor device whose cross-sectional area changes in the thickness direction of the semiconductor substrate can be manufactured.

[Brief description of the drawings]

FIG. 1 is a main cross-sectional view illustrating a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a semiconductor device in which the semiconductor device of FIG. 1 is stacked;

FIG. 3 is a diagram illustrating an effect of the semiconductor device of FIG. 1;

FIG. 4 is a flowchart illustrating a method for manufacturing the semiconductor device of FIG. 1;

FIG. 5 is a process chart illustrating a method for manufacturing the semiconductor device of FIG. 1;

FIG. 6 illustrates a method for manufacturing the semiconductor device of FIG. 1;
FIG.

FIG. 7 is a diagram illustrating a configuration of a hole formed by anisotropic etching.

FIG. 8 is a main cross-sectional view showing a configuration of a conventional semiconductor device.

9 is a cross-sectional view showing a semiconductor device in which the semiconductor device of FIG. 9 is stacked.

FIG. 10 is a diagram illustrating a problem of a conventional semiconductor device.

FIG. 11 is an enlarged view illustrating a problem of a conventional semiconductor device.

[Explanation of symbols]

 11, 21 LSI chip 12, 22, penetrating electrode 13, 23 projecting electrode 14, 24 through hole 15, 25 insulating film 16, 26 protective film 30, 32 hole

Claims (4)

[Claims] 1. A semiconductor device having a through electrode penetrating a semiconductor substrate, wherein the through electrode has a portion whose cross-sectional area changes in the middle from the front surface to the back surface of the semiconductor substrate. A semiconductor device characterized by the above-mentioned. 2. A semiconductor device having a penetrating electrode penetrating a semiconductor substrate, wherein the penetrating electrode has a portion having a small cross-sectional area on the way from the front surface to the back surface of the semiconductor substrate. Semiconductor device. 3. The semiconductor device according to claim 1, wherein at least two of the through electrodes are aligned with each other and stacked. 4. The method of manufacturing a semiconductor device according to claim 2, wherein a first hole is formed by performing anisotropic etching from one of a front surface and a back surface of the semiconductor substrate. Forming a second hole at a position corresponding to the first hole by performing metal plating on the first hole, and performing anisotropic etching from the other surface of the semiconductor substrate;
Performing a metal plating on the second hole.