JP2001036240A - Manufacture of molded circuit - Google Patents

Manufacture of molded circuit

Info

Publication number
JP2001036240A
JP2001036240A JP20994399A JP20994399A JP2001036240A JP 2001036240 A JP2001036240 A JP 2001036240A JP 20994399 A JP20994399 A JP 20994399A JP 20994399 A JP20994399 A JP 20994399A JP 2001036240 A JP2001036240 A JP 2001036240A
Authority
JP
Japan
Prior art keywords
synthetic resin
molded
circuit pattern
circuit
adhesive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20994399A
Other languages
Japanese (ja)
Inventor
Hideki Asano
秀樹 浅野
Yoshiyuki Ando
好幸 安藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP20994399A priority Critical patent/JP2001036240A/en
Publication of JP2001036240A publication Critical patent/JP2001036240A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To manufacture a molded circuit in high productivity and reliability which is provided with a three-dimensional structure and a circuit pattern superior in insulation between wirings. SOLUTION: A synthetic resin film 11 with a specified shape provided with a first through hole 10 at a specified position, a circuit pattern 9 made of conductive substance and an adhesive layer 8 are laminated to form a laminated body 20, and it is positioned and fixed in a mold 7 for forming synthetic resin so that the adhesive layer 8 lies in the position opposite to the flowing side of the synthetic resin 13. Then, the synthetic resin 13 is pressed in the mold 7 and it is flowed to fill the mold 7, and before the molded body 13 made of synthetic resin is cooled and solidified and its fluidity is lost, the molded body 13 is pressurized by a pressurizing means 14 provided in the mold 7, and while it is pressurized, the molded body 13 is cooled and solidified. The circuit pattern 9 is adhered tightly to the molded body 13 by means of the adhesive layer 8 so that a uniform and large peeling strength may be obtained, thereby forming the synthetic resin film 11 as a surface insulation layer and forming the first through hole 10 as a joint position between the circuit pattern 9 and other electric part.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、成形回路部品の製
造方法に関し、特に、三次元構造の回路パターンを有す
る成形回路部品を、高生産性かつ高信頼性で製造するこ
とが可能な成形回路部品の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a molded circuit component, and more particularly to a molded circuit capable of producing a molded circuit component having a three-dimensional circuit pattern with high productivity and high reliability. The present invention relates to a method for manufacturing a component.

【0002】[0002]

【従来の技術】図5〜図9は、従来の成形回路部品の製
造方法を模式的に示す説明図である。図5に示すよう
に、従来の成形回路部品の製造方法においては、無電解
めっき用触媒を配合した合成樹脂で第一の成形部1を形
成した後に、無電解めっき用触媒を配合していない合成
樹脂で、第一の成形部1の表面を所定の回路パターンの
形状に露出させて、残りの部分は被覆されてしまうよう
に第二の成形部2を形成し、その後、露出した第一の成
形部1の表面を粗化してから、この表面に無電解めっき
法により導電性被膜3を形成して回路パターンを形成し
ている。
2. Description of the Related Art FIGS. 5 to 9 are explanatory views schematically showing a conventional method for manufacturing a molded circuit component. As shown in FIG. 5, in the conventional method for manufacturing a molded circuit component, after forming the first molded portion 1 with a synthetic resin containing a catalyst for electroless plating, the catalyst for electroless plating is not compounded. The surface of the first molded part 1 is exposed in a predetermined circuit pattern shape with a synthetic resin, and the second molded part 2 is formed so as to cover the remaining part. After the surface of the molded portion 1 is roughened, a conductive pattern 3 is formed on the surface by electroless plating to form a circuit pattern.

【0003】[0003]

【発明が解決しようとする課題】しかし、図6に示すよ
うに、この方法によると、第一の成形部1の露出表面を
薬液で粗化するために、この薬液が第一の成形部1と第
二の成形部2との境界に侵入し、境界部に段差3' が生
じるため、平坦な回路パターンが得にくいという問題が
あった。また、成形条件が若干変動することにより、境
界面の密着性が低下したり、境界面にわずかでも空隙が
あることにより、粗化用の薬液が境界面に空隙を形成し
たり、又は空隙を広げたりすることがあった。
However, as shown in FIG. 6, according to this method, the exposed surface of the first molded part 1 is roughened with a chemical, so that this chemical is used for the first molded part 1. And the second molded part 2 penetrates into the boundary, and there is a step 3 'at the boundary, which makes it difficult to obtain a flat circuit pattern. In addition, due to a slight change in molding conditions, the adhesiveness of the boundary surface is reduced, or even if there is a small gap in the boundary surface, the chemical solution for roughening forms a gap in the boundary surface, or creates a gap. I sometimes spread it.

【0004】図7に示すように、このような状態で、無
電解めっきを行うと、上記の空隙にも導電性被膜3" が
形成されるため、本来、電気的に絶縁されているべき部
分が、電気的に導通したり、絶縁はされていても破壊電
圧が低いというような不良を生じ易く、生産性を著しく
阻害することに加えて、このような不良は、外観だけで
は判定が困難であるため、信頼性が低く、信頼性を確保
するためには、場合によっては全ての絶縁部分の電気特
性を測定する必要があり、工程管理の面でも問題があっ
た。
As shown in FIG. 7, when electroless plating is performed in such a state, a conductive film 3 "is also formed in the above-mentioned space, so that a portion which should be electrically insulated originally is formed. However, defects such as low breakdown voltage are likely to occur even when electrically conductive or insulated, and in addition to significantly impairing productivity, such defects are difficult to determine only by appearance. Therefore, the reliability is low, and in order to ensure the reliability, it may be necessary to measure the electrical characteristics of all the insulating parts in some cases, and there is a problem in the process control.

【0005】さらに、粗化の工程で、第二の成形部2に
無電解めっき用の触媒が付着したり、めっき工程で粗化
面から無電解めっき用触媒がめっき液中に溶出又は脱落
したりすることがある。
[0005] Further, in the roughening step, the electroless plating catalyst adheres to the second molded portion 2, or the electroless plating catalyst elutes or falls off from the roughened surface into the plating solution in the plating step. Sometimes.

【0006】図8に示すように、前者の場合には、洗浄
不足であると、触媒が付着した部分5にも導電性被膜6
が形成され、除去しないと電気的特性上問題となる不良
が生じ易く、生産性を著しく阻害していた。後者の場合
には、合成樹脂に対するめっき液の適合性は、選択幅が
狭く、適合性が良くないと、めっき液中に触媒が溶出又
は脱落し易くなり、この触媒が浮遊する部分には無電解
めっき反応が生じる。
As shown in FIG. 8, in the former case, if the cleaning is insufficient, the conductive film 6 is also applied to the portion 5 to which the catalyst has adhered.
Are formed, and if not removed, defects that are problematic in electrical characteristics are likely to occur, which significantly impairs productivity. In the latter case, the compatibility of the plating solution with the synthetic resin is narrow, and if the compatibility is not good, the catalyst is liable to be eluted or dropped off in the plating solution, and there is no presence in the part where the catalyst floats. An electrolytic plating reaction occurs.

【0007】図9に示すように、液中で発生した導電性
物質の微細粒子4が第二の成形部2の表面に付着し、さ
らには付着粒子の上に導電性被膜3" が形成され、回路
間をつないでしまうという不良が発生しやすかった。こ
れに加えて、汚染によりめっき液の寿命が短くなりやす
いため、生産性を著しく阻害していた。また、第一の成
形部1を回路パターンに応じて第二の成形部2より露出
させなければならないため、三次元構造の回路パターン
の製造が困難であった。
As shown in FIG. 9, fine particles 4 of the conductive substance generated in the liquid adhere to the surface of the second molded part 2, and a conductive film 3 ″ is formed on the adhered particles. In addition to this, the connection between the circuits was liable to occur, and in addition, the life of the plating solution was apt to be shortened due to contamination, thereby significantly impairing the productivity. Since it has to be exposed from the second molded part 2 according to the circuit pattern, it has been difficult to manufacture a circuit pattern having a three-dimensional structure.

【0008】従って、本発明の目的は、配線間の絶縁性
に優れた三次元構造の回路パターンを有する成形回路部
品を、高生産性かつ高信頼性で製造することが可能な成
形回路部品の製造方法を提供することにある。
Therefore, an object of the present invention is to provide a molded circuit component having a three-dimensional circuit pattern having excellent insulation between wirings with high productivity and high reliability. It is to provide a manufacturing method.

【0009】[0009]

【課題を解決するための手段】本発明は、上記目的を達
成するため、以下の成形回路部品の製造方法を提供す
る。
The present invention provides the following method for manufacturing a molded circuit component in order to achieve the above object.

【0010】[1] 合成樹脂成形用金型内に、所定位
置に第一の貫通孔を配設した所定形状の合成樹脂フィル
ムと、導電性物質からなる回路パターンと、接着層とを
積層した積層体を、前記接着層を合成樹脂の流動側に対
向するように位置決めして固定した後、前記合成樹脂を
前記金型内に圧入し流動させて充填し、前記合成樹脂の
成形体が冷却、固化して流動性を失う前に、前記金型内
に配設した加圧手段により前記合成樹脂の成形体を加圧
し、加圧状態のまま前記合成樹脂の成形体を冷却、固化
させて、前記接着層を介して前記回路パターンを前記合
成樹脂の成形体に密着させることにより、前記合成樹脂
フィルムを表面絶縁層にし、かつ前記貫通孔を前記回路
パターンと他の電気部品との接合箇所にしたことを特徴
とする成形回路部品の製造方法。
[1] A synthetic resin film having a predetermined shape in which a first through hole is provided at a predetermined position, a circuit pattern made of a conductive substance, and an adhesive layer are laminated in a synthetic resin molding die. After the laminate is positioned and fixed so that the adhesive layer faces the flow side of the synthetic resin, the synthetic resin is press-fitted into the mold, flowed and filled, and the molded body of the synthetic resin is cooled. Before solidifying and losing fluidity, the molded body of the synthetic resin is pressurized by pressurizing means disposed in the mold, and the molded body of the synthetic resin is cooled and solidified in a pressurized state. By bringing the circuit pattern into close contact with the molded body of the synthetic resin via the adhesive layer, the synthetic resin film is used as a surface insulating layer, and the through hole is formed at a joint portion between the circuit pattern and another electric component. Molded circuit parts characterized by having Manufacturing method.

【0011】[2] 前記積層体が、三次元構造を有す
る前記[1]に記載の成形回路部品の製造方法。
[2] The method for manufacturing a molded circuit component according to [1], wherein the laminate has a three-dimensional structure.

【0012】[3] 前記導電性物質が、銅、銅合金、
アルミニウム、及びアルミニウム合金からなる群から選
ばれる少なくとも1種の金属箔である前記[1]に記載
の成形回路部品の製造方法。
[3] The conductive material is copper, copper alloy,
The method for producing a molded circuit component according to the above [1], which is at least one type of metal foil selected from the group consisting of aluminum and an aluminum alloy.

【0013】[4] 前記導電性物質が、良導電性の金
属微細片を合成樹脂に配合して導電性を付与した導電性
の合成樹脂又は導電性の接着剤である前記[1]に記載
の成形回路部品の製造方法。
[4] The above-mentioned [1], wherein the conductive substance is a conductive synthetic resin or a conductive adhesive obtained by blending fine conductive metal fine pieces into a synthetic resin to impart conductivity. Method for manufacturing molded circuit parts.

【0014】[5] 前記良導電性の金属微細片が、
銅、銅合金、アルミニウム、及びアルミニウム合金から
なる群から選ばれる少なくとも1種の金属からなるもの
である前記[4]に記載の成形回路部品の製造方法。
[5] The fine metal piece of good conductivity is
The method for producing a molded circuit component according to the above [4], wherein the molded circuit component is made of at least one metal selected from the group consisting of copper, a copper alloy, aluminum, and an aluminum alloy.

【0015】[6] 前記積層体が、前記導電性物質か
らなる回路パターンと前記合成樹脂フィルムとを、予め
別個に成形して両者を貼り合わせて積層したものである
前記[1]〜[5]のいずれかに記載の成形回路部品の
製造方法。
[6] The laminate according to any one of [1] to [5], wherein the laminate is obtained by separately forming a circuit pattern made of the conductive substance and the synthetic resin film in advance and bonding them together. ] The manufacturing method of the molded circuit component according to any one of the above.

【0016】[7] 前記積層体が、前記合成樹脂フィ
ルムに、前記導電性物質を、無電解めっき法、蒸着法、
スパッタ法、及び印刷法からなる群から選ばれる少なく
とも1種の方法で積層して回路パターンを形成したもの
である前記[1]〜[5]のいずれかに記載の成形回路
部品の製造方法。
[7] The laminate is formed by applying the conductive substance to the synthetic resin film by an electroless plating method, a vapor deposition method,
The method for producing a molded circuit component according to any one of [1] to [5], wherein a circuit pattern is formed by laminating by at least one method selected from the group consisting of a sputtering method and a printing method.

【0017】[8] 前記積層体が、前記合成樹脂フィ
ルムと前記導電性物質からなる回路パターンと前記接着
層とを、それぞれ予め別個に三次元形状に成形し、貼り
合わせて積層したものである前記[6]に記載の成形回
路部品の製造方法。
[8] In the laminate, the synthetic resin film, the circuit pattern made of the conductive material, and the adhesive layer are separately formed in advance into a three-dimensional shape, and laminated by laminating them. The method for producing a molded circuit component according to the above [6].

【0018】[9] 前記積層体が、前記合成樹脂フィ
ルムと、前記導電性物質からなる回路パターン及び前記
接着層をそれぞれ交互に複数層積層した多層回路パター
ンとを積層した第一の多層フィルムであり、前記接着層
のそれぞれが前記回路パターンを相互に電気的に接合す
るための第二の貫通孔及びその内面に配設した第一の導
電性被膜を有するとともに、前記第一の多層フィルム
が、全ての前記回路パターンを相互に電気的に接合する
ための第三の貫通孔及び第二の導電性被膜を有するもの
である前記[1]〜[5]のいずれかに記載の成形回路
部品の製造方法。
[9] The laminate is a first multilayer film in which the synthetic resin film is laminated with a multilayer circuit pattern in which a circuit pattern made of the conductive substance and the adhesive layer are alternately laminated in a plurality of layers. And each of the adhesive layers has a second through-hole for electrically bonding the circuit patterns to each other and a first conductive film disposed on an inner surface thereof, and the first multilayer film has The molded circuit component according to any one of [1] to [5], further including a third through hole and a second conductive film for electrically connecting all the circuit patterns to each other. Manufacturing method.

【0019】[10] 前記積層体が、前記合成樹脂フ
ィルムと、導電性物質からなる回路パターンと、接着層
とを積層した積層体を、複数層に亘って繰り返し積層し
た第二の多層フィルムである前記[1]〜[5]のいず
れかに記載の成形回路部品の製造方法。
[10] A second multilayer film in which the laminate is formed by repeatedly laminating a laminate in which the synthetic resin film, a circuit pattern made of a conductive substance, and an adhesive layer are laminated in a plurality of layers. The method for producing a molded circuit component according to any one of [1] to [5].

【0020】[0020]

【発明の実施の形態】以下、本発明の実施の形態を、図
面を参照しつつ具体的に説明する。図1は、本発明の成
形回路部品の製造方法の一実施の形態を模式的に示す断
面図である。図1(イ)に示すように、本発明の成形回
路部品の製造方法は、無電解めっき法により合成樹脂成
形品の表面に直接導電性物質の回路パターンを形成する
従来技術とはその構成が全く異なったものであり、合成
樹脂成形用金型内7に、所定位置に第一の貫通孔10を
配設した所定形状(例えば、三次元形状)の合成樹脂フ
ィルム11と、導電性物質からなる回路パターン9と、
接着層8とを積層した積層体20を、接着層8を合成樹
脂13の流動側に対向するように、例えば、位置決めピ
ン12を用いて位置決めして固定した後、合成樹脂13
を金型7内に圧入し流動させて充填する。
Embodiments of the present invention will be specifically described below with reference to the drawings. FIG. 1 is a cross-sectional view schematically showing one embodiment of a method for manufacturing a molded circuit component of the present invention. As shown in FIG. 1 (a), the method of manufacturing a molded circuit component of the present invention is different from the conventional technology of forming a circuit pattern of a conductive material directly on the surface of a synthetic resin molded product by an electroless plating method. It is completely different from a synthetic resin film 11 having a predetermined shape (for example, a three-dimensional shape) in which a first through hole 10 is provided at a predetermined position in a synthetic resin molding die 7 and a conductive material. Circuit pattern 9
The laminate 20 on which the adhesive layer 8 is laminated is positioned and fixed using, for example, the positioning pin 12 so that the adhesive layer 8 faces the flow side of the synthetic resin 13.
Is press-fitted into a mold 7 and filled by flowing.

【0021】次に、図1(ロ)に示すように、合成樹脂
の成形体13が冷却、固化して流動性を失う前に、金型
7内に配設した加圧手段14(加圧手段14としては特
に制限はなく、汎用のものを用いることができる)を、
例えば、矢印15の方向に作動させて、合成樹脂の成形
体13を加圧し、加圧状態のまま合成樹脂の成形体13
を冷却、固化させて、接着層8を介して回路パターン9
を、均一かつ高剥離強度が得られるように合成樹脂の成
形体13に密着させることにより、合成樹脂フィルム1
1を表面絶縁層にし、かつ第一の貫通孔10を回路パタ
ーン9と他の電気部品との接合箇所にする。
Next, as shown in FIG. 1 (b), before the molded body 13 of the synthetic resin is cooled and solidified and loses its fluidity, the pressurizing means 14 (pressurized) provided in the mold 7 is used. The means 14 is not particularly limited, and a general-purpose means can be used)
For example, by operating in the direction of arrow 15, the synthetic resin molded body 13 is pressurized, and the synthetic resin molded body 13 is kept pressed.
Is cooled and solidified, and the circuit pattern 9 is
Is adhered to the synthetic resin molded body 13 so as to obtain a uniform and high peel strength.
1 is a surface insulating layer, and the first through hole 10 is a joint between the circuit pattern 9 and another electric component.

【0022】一般に、金型内で合成樹脂を冷却、固化さ
せると、熱収縮、結晶化収縮を生じるので、それを補う
ために、ゲート13' から合成樹脂を圧入させている
が、冷却速度は成形体の各位置によって相違するし、ま
た、圧入する合成樹脂が均一には充填されず、冷却速度
が不均一になる原因となる。そこで、本発明におけるよ
うに、加圧機構14で圧力を加えて、厚さ方向の収縮及
び金型の内壁面に加わる圧力を均一化することにより、
接着層8と成形体13との密着性が均一化され、総合的
に高信頼性に成形回路部品を製造することができる。
In general, when a synthetic resin is cooled and solidified in a mold, heat shrinkage and crystallization shrinkage occur. To compensate for the shrinkage, the synthetic resin is press-fitted through the gate 13 '. The position differs depending on each position of the molded body, and the synthetic resin to be press-fitted is not uniformly filled, which causes an uneven cooling rate. Therefore, as in the present invention, by applying pressure by the pressurizing mechanism 14 to equalize the contraction in the thickness direction and the pressure applied to the inner wall surface of the mold,
Adhesion between the adhesive layer 8 and the molded body 13 is made uniform, and a molded circuit component can be manufactured with high reliability overall.

【0023】ここで、合成樹脂フィルム11としては特
に制限はないが、例えば、ポリブチレンテレフタレー
ト、ポリフェニレンスルフィド、シンジオタクチック結
晶性ポリスチレン、ポリエーテルスルフォン、ポリエー
テルイミド等のフィルムを好適例として挙げることがで
きる。
Here, the synthetic resin film 11 is not particularly limited, but preferred examples thereof include films of polybutylene terephthalate, polyphenylene sulfide, syndiotactic crystalline polystyrene, polyether sulfone, polyetherimide and the like. Can be.

【0024】また、回路パターン9を構成する導電性物
質としては、通常導電材料として用いられている金属で
あれば特に制限はなく、例えば、金、銀、銅、錫、アル
ミニウム及びこれらを合成樹脂中に多量に配合して導電
性を付与したもの等を挙げることができるが、生産性、
機械的強度、耐摩耗性等の諸特性、薄膜の形成し易さ及
び外力の常時負荷によるウィスカーの発生等の面から、
銅、銅合金、アルミニウム、アルミニウム合金等の箔が
好ましい。
The conductive material constituting the circuit pattern 9 is not particularly limited as long as it is a metal which is generally used as a conductive material. For example, gold, silver, copper, tin, aluminum and synthetic resin Among them, those having a large amount incorporated therein to impart conductivity can be cited, but productivity,
From the viewpoints of various properties such as mechanical strength and abrasion resistance, ease of forming a thin film, and generation of whiskers due to constant load of external force,
Preferred are foils of copper, copper alloys, aluminum, aluminum alloys and the like.

【0025】また、回路パターン9を印刷法によって形
成する場合には、導電性物質として、良導電性にの金属
微細片を配合して導電性を付与したペースト状の合成樹
脂又は接着剤を用いて、回路パターンを印刷した後、加
熱・硬化させることが好ましい。
When the circuit pattern 9 is formed by a printing method, a paste-like synthetic resin or an adhesive provided with conductivity by blending fine metal pieces having good conductivity is used as the conductive substance. After printing the circuit pattern, it is preferable to heat and cure the circuit pattern.

【0026】本発明においては、上述のように、合成樹
脂フィルム11上に、回路パターン9を形成するため
に、合成樹脂フィルム11と、回路パターン9と、接着
層8とを積層した積層体20を用い、接着層8を介して
回路パターン9を、合成樹脂の成形体13に密着させる
構成を採用する。
In the present invention, as described above, in order to form the circuit pattern 9 on the synthetic resin film 11, the laminated body 20 in which the synthetic resin film 11, the circuit pattern 9 and the adhesive layer 8 are laminated is formed. And a configuration in which the circuit pattern 9 is brought into close contact with the synthetic resin molded body 13 via the adhesive layer 8 is adopted.

【0027】図2は、本発明の成形回路部品の製造方法
における積層体の形成の一実施の形態を模式的に示す断
面図である。図2(イ)〜(ハ)に示すように、この積
層体として、導電性物質からなる回路パターン9と、第
一の貫通孔10を有する合成樹脂フィルム11とを、予
め別個に貼付可能な形状(例えば、三次元形状)に成形
して両者を貼り合わせて積層体19とすることが好まし
い。
FIG. 2 is a sectional view schematically showing one embodiment of the formation of a laminate in the method of manufacturing a molded circuit component of the present invention. As shown in FIGS. 2A to 2C, a circuit pattern 9 made of a conductive substance and a synthetic resin film 11 having a first through-hole 10 can be separately affixed separately as this laminate. It is preferable to form the laminate 19 by shaping it into a shape (for example, a three-dimensional shape) and bonding them together.

【0028】図2(ニ)に示すように、図2(イ)〜
(ハ)で得られた積層体19の、回路パターン9側に接
着層8を形成して金型7a、7bで加圧し、積層体20
を形成してもよい。また、合成樹脂フィルム11と回路
パターン9と接着層8とを、それぞれ予め別個に三次元
形状に成形し、貼り合わせて積層し、積層体20を形成
したものであってもよい。この場合、接着層8が、硬化
反応を生じにくい温度条件で成形処理することが好まし
い。
As shown in FIG. 2D, FIGS.
The adhesive layer 8 is formed on the circuit pattern 9 side of the laminate 19 obtained in (c), and the laminate is pressed by the molds 7a and 7b.
May be formed. Alternatively, the laminated body 20 may be formed by forming the synthetic resin film 11, the circuit pattern 9, and the adhesive layer 8 separately in advance into a three-dimensional shape, bonding and laminating them. In this case, it is preferable that the molding process is performed under a temperature condition in which the adhesive layer 8 hardly causes a curing reaction.

【0029】この他に、積層体20が、合成樹脂フィル
ム11に、導電性物質を、無電解めっき法、蒸着法、ス
パッタ法、及び印刷法からなる群から選ばれる少なくと
も1種の方法で積層して回路パターン9を形成したもの
であってもよい。
In addition, the laminate 20 is formed by laminating a conductive substance on the synthetic resin film 11 by at least one method selected from the group consisting of electroless plating, vapor deposition, sputtering, and printing. Alternatively, the circuit pattern 9 may be formed.

【0030】図3は、本発明の成形回路部品の製造方法
の他の実施の形態を模式的に示す断面図である。図3に
示すように、積層体が、所定位置に第一の貫通孔10を
配設した所定形状の合成樹脂フィルム11と、導電性物
質からなる回路パターン9及び接着層8をそれぞれ交互
に複数層積層した多層回路パターン21とを積層した多
層フィルム22から構成されるものであり、接着層8の
それぞれが回路パターン9を相互に電気的に接合するた
めの第二の貫通孔10' 及びその内面に配設した第一の
導電性被膜(図示せず)を有するとともに、多層フィル
ム22が、全ての回路パターン9を相互に電気的に接合
するための第三の貫通孔10" 及びその内壁面に形成さ
れた第二の導電性被膜(図示せず)を有する。このよう
に構成することによって、多層回路パターンを有する成
形回路部品を高生産性かつ高信頼性で製造することがで
きる。
FIG. 3 is a sectional view schematically showing another embodiment of the method for manufacturing a molded circuit component according to the present invention. As shown in FIG. 3, the laminate has a plurality of synthetic resin films 11 each having a predetermined shape in which first through holes 10 are provided at predetermined positions, and a plurality of circuit patterns 9 and adhesive layers 8 each formed of a conductive substance. A second through-hole 10 ′ for electrically bonding the circuit patterns 9 to each other, and a second through hole 10 ′ for each of the adhesive layers 8, comprising It has a first conductive coating (not shown) disposed on the inner surface, and the multilayer film 22 has a third through hole 10 ″ for electrically connecting all the circuit patterns 9 to each other, and a third through hole 10 ″ therein. It has a second conductive film (not shown) formed on the wall surface, and by this configuration, a molded circuit component having a multilayer circuit pattern can be manufactured with high productivity and high reliability.

【0031】図4は、本発明の成形回路部品の製造方法
の他の実施の形態を模式的に示す断面図である。図4に
示すように、積層体が、上述のように、合成樹脂フィル
ム11と、導電性物質からなる回路パターン9と、接着
層8とを積層したものを、複数層に亘って繰り返し積層
した多層フィルム23から構成されるものであってもよ
い。このように構成することによって、多層回路パター
ンを有する成形回路部品を高生産性かつ高信頼性で製造
することができる。
FIG. 4 is a cross-sectional view schematically showing another embodiment of the method for manufacturing a molded circuit component of the present invention. As shown in FIG. 4, as described above, a laminate obtained by laminating the synthetic resin film 11, the circuit pattern 9 made of a conductive substance, and the adhesive layer 8 is repeatedly laminated in a plurality of layers. It may be composed of the multilayer film 23. With this configuration, a molded circuit component having a multilayer circuit pattern can be manufactured with high productivity and high reliability.

【0032】[0032]

【発明の効果】以上、説明した通り、本発明は、従来技
術のように第一の成形部を回路パターンに応じて第二の
成形部から露出させる必要がなく、また成形品が直接薬
液に接触することもないので、外観上見えない箇所や、
不要な箇所に導電性物質が付着することがなく、配線間
の絶縁性に優れた回路パターンを有する三次元構造の成
形回路部品を、高生産性かつ高信頼性で製造することが
できる。また、合成樹脂フィルム上に回路パターンの不
良があった場合、最終段階でチェックをする前に、回路
パターンを形成する段階で発見・除去することができる
とともに、回路パターンの形成と成形とを並行して行う
ことができるので、高生産性を実現することができる。
As described above, according to the present invention, it is not necessary to expose the first molded portion from the second molded portion according to the circuit pattern unlike the prior art, and the molded product is directly exposed to the chemical solution. Because there is no contact,
A molded circuit component having a three-dimensional structure having a circuit pattern with excellent insulation between wirings can be manufactured with high productivity and high reliability without a conductive substance adhering to unnecessary portions. In addition, if there is a defect in the circuit pattern on the synthetic resin film, it can be found and removed at the stage of forming the circuit pattern before checking at the final stage, and the formation and molding of the circuit pattern can be performed in parallel. Therefore, high productivity can be realized.

【0033】[0033]

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の成形回路部品の製造方法の一実施の形
態を模式的に示す断面図である。
FIG. 1 is a cross-sectional view schematically showing one embodiment of a method for manufacturing a molded circuit component of the present invention.

【図2】本発明の成形回路部品の製造方法における積層
体の形成の一実施の形態を模式的に示す断面図である。
FIG. 2 is a cross-sectional view schematically showing one embodiment of forming a laminate in the method for manufacturing a molded circuit component of the present invention.

【図3】本発明の成形回路部品の製造方法の他の実施の
形態を模式的に示す断面図である。
FIG. 3 is a cross-sectional view schematically showing another embodiment of the method for manufacturing a molded circuit component of the present invention.

【図4】本発明の成形回路部品の製造方法の他の実施の
形態を模式的に示す断面図である。
FIG. 4 is a cross-sectional view schematically showing another embodiment of the method for manufacturing a molded circuit component of the present invention.

【図5】従来の成形回路部品の製造方法を模式的に示す
説明図である。
FIG. 5 is an explanatory view schematically showing a conventional method for manufacturing a molded circuit component.

【図6】従来の成形回路部品の製造方法を模式的に示す
説明図である。
FIG. 6 is an explanatory view schematically showing a conventional method for manufacturing a molded circuit component.

【図7】従来の成形回路部品の製造方法を模式的に示す
説明図である。
FIG. 7 is an explanatory view schematically showing a conventional method for manufacturing a molded circuit component.

【図8】従来の成形回路部品の製造方法を模式的に示す
説明図である。
FIG. 8 is an explanatory view schematically showing a conventional method for manufacturing a molded circuit component.

【図9】従来の成形回路部品の製造方法を模式的に示す
説明図である。
FIG. 9 is an explanatory view schematically showing a conventional method for manufacturing a molded circuit component.

【符号の説明】[Explanation of symbols]

1:第一の成形部 2:第二の成形部 3:導電性被膜 3' :段差 3" :空隙部又は異物上の導電性被膜 4:導電性物質の微細粒子 5:触媒付着部分 6:触媒付着部分の導電性被膜 7:金型 8:接着層 9:回路パターン 10:第一の貫通孔 10' :第二の貫通孔 10" :第三の貫通孔 11:合成樹脂フィルム 12:位置決めピン 13:合成樹脂又は合成樹脂成形体 13' :ゲート 14:加圧手段 15:加圧手段の作動方向を示す矢印 19:合成樹脂フィルムと回路パターンとの積層体 20:積層体 21:多層回路パターン 22:多層フィルム 23:多層フィルム 1: First molded part 2: Second molded part 3: Conductive coating 3 ′: Step 3 ″: Conductive coating on void or foreign matter 4: Fine particles of conductive substance 5: Catalyst adhering part 6: Conductive coating on catalyst adhering part 7: Mold 8: Adhesive layer 9: Circuit pattern 10: First through hole 10 ': Second through hole 10 ": Third through hole 11: Synthetic resin film 12: Positioning Pin 13: Synthetic resin or molded synthetic resin 13 ': Gate 14: Pressing means 15: Arrow indicating operation direction of pressing means 19: Laminate of synthetic resin film and circuit pattern 20: Laminate 21: Multilayer circuit Pattern 22: Multilayer film 23: Multilayer film

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4F206 AD03 AD05 AD20 AH36 JA03 JB12 JF05 JN25 JQ81 5E346 AA02 AA04 AA12 AA15 AA16 AA22 AA43 BB01 BB16 CC31 CC32 CC34 CC42 DD02 DD13 DD16 DD17 DD23 EE01 EE39 EE42 EE50 GG01 HH08 HH33 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4F206 AD03 AD05 AD20 AH36 JA03 JB12 JF05 JN25 JQ81 5E346 AA02 AA04 AA12 AA15 AA16 AA22 AA43 BB01 BB16 CC31 CC32 CC34 CC42 DD02 DD13 DD16 DD17 DD23 EE01 EE50 EE33 H

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 合成樹脂成形用金型内に、所定位置に第
一の貫通孔を配設した所定形状の合成樹脂フィルムと、
導電性物質からなる回路パターンと、接着層とを積層し
た積層体を、前記接着層を合成樹脂の流動側に対向する
ように位置決めして固定した後、前記合成樹脂を前記金
型内に圧入し流動させて充填し、前記合成樹脂の成形体
が冷却、固化して流動性を失う前に、前記金型内に配設
した加圧手段により前記合成樹脂の成形体を加圧し、加
圧状態のまま前記合成樹脂の成形体を冷却、固化させ
て、前記接着層を介して前記回路パターンを前記合成樹
脂の成形体に密着させることにより、前記合成樹脂フィ
ルムを表面絶縁層にし、かつ前記貫通孔を前記回路パタ
ーンと他の電気部品との接合箇所にしたことを特徴とす
る成形回路部品の製造方法。
1. A synthetic resin film having a predetermined shape in which a first through hole is provided at a predetermined position in a synthetic resin molding die,
After a circuit board made of a conductive material and an adhesive layer are laminated and positioned so that the adhesive layer faces the flow side of the synthetic resin and fixed, the synthetic resin is pressed into the mold. Before the molded body of the synthetic resin is cooled and solidified and loses fluidity, the molded body of the synthetic resin is pressurized by a pressurizing means disposed in the mold, and then pressurized. The synthetic resin molded body is cooled and solidified in the state, and the circuit pattern is brought into close contact with the synthetic resin molded body via the adhesive layer, so that the synthetic resin film becomes a surface insulating layer, and A method of manufacturing a molded circuit component, wherein a through hole is formed at a joint between the circuit pattern and another electric component.
【請求項2】 前記積層体が、三次元構造を有する請求
項1に記載の成形回路部品の製造方法。
2. The method according to claim 1, wherein the laminate has a three-dimensional structure.
【請求項3】 前記導電性物質が、銅、銅合金、アルミ
ニウム、及びアルミニウム合金からなる群から選ばれる
少なくとも1種の金属箔である請求項1に記載の成形回
路部品の製造方法。
3. The method according to claim 1, wherein the conductive material is at least one metal foil selected from the group consisting of copper, copper alloy, aluminum, and aluminum alloy.
【請求項4】 前記導電性物質が、良導電性の金属微細
片を合成樹脂に配合して導電性を付与した導電性の合成
樹脂又は導電性の接着剤である請求項1に記載の成形回
路部品の製造方法。
4. The molding according to claim 1, wherein the conductive material is a conductive synthetic resin or a conductive adhesive obtained by mixing conductive fine particles with a synthetic resin to impart conductivity. Manufacturing method of circuit parts.
【請求項5】 前記良導電性の金属微細片が、銅、銅合
金、アルミニウム、及びアルミニウム合金からなる群か
ら選ばれる少なくとも1種の金属からなるものである請
求項4に記載の成形回路部品の製造方法。
5. The molded circuit component according to claim 4, wherein the fine metal pieces of good conductivity are made of at least one metal selected from the group consisting of copper, copper alloy, aluminum, and aluminum alloy. Manufacturing method.
【請求項6】 前記積層体が、前記導電性物質からなる
回路パターンと前記合成樹脂フィルムとを、予め別個に
成形して両者を貼り合わせて積層したものである請求項
1〜5のいずれかに記載の成形回路部品の製造方法。
6. The laminate according to claim 1, wherein the circuit pattern made of the conductive material and the synthetic resin film are separately formed in advance and laminated by laminating both. 4. The method for producing a molded circuit component according to claim 1.
【請求項7】 前記積層体が、前記合成樹脂フィルム
に、前記導電性物質を、無電解めっき法、蒸着法、スパ
ッタ法、及び印刷法からなる群から選ばれる少なくとも
1種の方法で積層して回路パターンを形成したものであ
る請求項1〜5のいずれかに記載の成形回路部品の製造
方法。
7. The laminate, wherein the conductive substance is laminated on the synthetic resin film by at least one method selected from the group consisting of electroless plating, vapor deposition, sputtering, and printing. The method for manufacturing a molded circuit component according to any one of claims 1 to 5, wherein the circuit pattern is formed by performing the following steps.
【請求項8】 前記積層体が、前記合成樹脂フィルムと
前記導電性物質からなる回路パターンと前記接着層と
を、それぞれ予め別個に三次元形状に成形し、貼り合わ
せて積層したものである請求項6に記載の成形回路部品
の製造方法。
8. The laminate according to claim 1, wherein the synthetic resin film, the circuit pattern made of the conductive material, and the adhesive layer are separately formed in advance into a three-dimensional shape, and are laminated by laminating. Item 7. The method for producing a molded circuit component according to Item 6.
【請求項9】 前記積層体が、前記合成樹脂フィルム
と、前記導電性物質からなる回路パターン及び前記接着
層をそれぞれ交互に複数層積層した多層回路パターンと
を積層した第一の多層フィルムであり、前記接着層のそ
れぞれが前記回路パターンを相互に電気的に接合するた
めの第二の貫通孔及びその内面に配設した第一の導電性
被膜を有するとともに、前記第一の多層フィルムが、全
ての前記回路パターンを相互に電気的に接合するための
第三の貫通孔及び第二の導電性被膜を有するものである
請求項1〜5のいずれかに記載の成形回路部品の製造方
法。
9. The first multilayer film in which the laminate is formed by laminating the synthetic resin film and a multilayer circuit pattern in which a plurality of the circuit patterns made of the conductive material and the adhesive layer are alternately laminated. Each of the adhesive layers has a second through hole for electrically bonding the circuit patterns to each other and a first conductive coating disposed on an inner surface thereof, and the first multilayer film has The method for manufacturing a molded circuit component according to any one of claims 1 to 5, further comprising a third through hole and a second conductive coating for electrically connecting all the circuit patterns to each other.
【請求項10】 前記積層体が、前記合成樹脂フィルム
と、導電性物質からなる回路パターンと、接着層とを積
層した積層体を、複数層に亘って繰り返し積層した第二
の多層フィルムである請求項1〜5のいずれかに記載の
成形回路部品の製造方法。
10. The laminate is a second multilayer film in which a laminate obtained by laminating the synthetic resin film, a circuit pattern made of a conductive material, and an adhesive layer is repeatedly laminated in a plurality of layers. A method for manufacturing a molded circuit component according to claim 1.
JP20994399A 1999-07-23 1999-07-23 Manufacture of molded circuit Pending JP2001036240A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20994399A JP2001036240A (en) 1999-07-23 1999-07-23 Manufacture of molded circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20994399A JP2001036240A (en) 1999-07-23 1999-07-23 Manufacture of molded circuit

Publications (1)

Publication Number Publication Date
JP2001036240A true JP2001036240A (en) 2001-02-09

Family

ID=16581243

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20994399A Pending JP2001036240A (en) 1999-07-23 1999-07-23 Manufacture of molded circuit

Country Status (1)

Country Link
JP (1) JP2001036240A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1531654A1 (en) 2003-11-12 2005-05-18 Polymatech Co., Ltd. Three-dimensionally formed circuit sheet, component and method for manufacturing the same
JP2005167216A (en) * 2003-11-12 2005-06-23 Polymatech Co Ltd Three dimensionally shaped circuit sheet, three dimensionally shaped circuit component, and manufacturing method thereof
US8049858B2 (en) 2005-07-11 2011-11-01 Fujitsu Limited Liquid crystal display element
KR20180128449A (en) 2016-03-29 2018-12-03 도요보 가부시키가이샤 Electricity-conductive paste and manufacturing method of a curved printed wiring board

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1531654A1 (en) 2003-11-12 2005-05-18 Polymatech Co., Ltd. Three-dimensionally formed circuit sheet, component and method for manufacturing the same
JP2005167216A (en) * 2003-11-12 2005-06-23 Polymatech Co Ltd Three dimensionally shaped circuit sheet, three dimensionally shaped circuit component, and manufacturing method thereof
US7262489B2 (en) 2003-11-12 2007-08-28 Polymatech Co., Ltd. Three-dimensionally formed circuit sheet, component and method for manufacturing the same
US8049858B2 (en) 2005-07-11 2011-11-01 Fujitsu Limited Liquid crystal display element
US8467029B2 (en) 2005-07-11 2013-06-18 Fujitsu Limited Liquid crystal display element
KR20180128449A (en) 2016-03-29 2018-12-03 도요보 가부시키가이샤 Electricity-conductive paste and manufacturing method of a curved printed wiring board

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