JP2001023951A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a method of manufacturing a semiconductor device, where a P+GaAs layer can be exposed surely. SOLUTION: In the manufacturing method of a semiconductor device, which includes a GaAs layer and an InGaP layer formed on the GaAs layer, a first process 1 where the InGaP layer is etched by the use of a first etching liquid and a second process 2 where InGaAsP is etched with a second etching liquid which is capable of etching it are provided. By this method, an N-type InGaAsP layer, produced by substituting As with P when a thin film is grown can be etched, so that a P+-GaAs layer can be exposed surely. Therefore, a semiconductor device of this constitution can be lessened in base resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device including a GaAs layer and an InGaP layer formed on the GaAs layer, and more particularly, to a semiconductor device capable of completely exposing the GaAs layer. And a method for producing the same.

[0002]

2. Description of the Related Art FIG. 2 is a diagram showing a layer structure of an example of a semiconductor device. This semiconductor device is described in US Pat. I. On the GaAs substrate ^10, n - GaAs layer 9, p ⁺ GaAs layer 8, n ^-
An InGaP layer 6 and an n ⁺ InGaAs emitter cap layer 5 are sequentially formed, and are a kind of heterojunction bipolar transistor (hereinafter abbreviated as “HBT”). Conventionally, in a method of manufacturing an HBT including an InGaP layer, for example, International Electron
Proceedings 191 of the Device Meeting, page 191 of the Japan Journal of Applied Physics, Vol. As shown on page 1799 of 3B, when performing selective wet etching of InGaP / GaAs, hydrochloric acid or a solution in which hydrochloric acid and water are mixed at a ratio of 3: 2 (hereinafter referred to as “HCl + H ₂ O”).
Or a solution in which HCl and phosphoric acid are mixed at a ratio of 1:15 (hereinafter referred to as “HCl + H ₃ PO ₄ ”).

A thin film made of InGaP is etched by an HCl solution, and a thin film of InGaAs or GaAs is
G is hardly etched by Cl solution.
Only the InGaP film stacked on the aAs film can be selectively etched.

In an HBT using InGaP as an emitter layer, as shown in FIG. 2, a p ⁺ GaAs layer 8 serving as a base is used.
And an n ^- InGaP layer 6 serving as an emitter is stacked thereon. In this HBT, in order to form a base electrode having a low base resistance, the n ⁺ InGaAs emitter cap layer 5 and the n ⁻ InGaP layer 6 are partially cut off.
It is necessary to expose the p ⁺ GaAs layer 8 as a base without fail and to form an electrode thereon.

In order to expose the p ⁺ GaAs layer 8, the n ⁺ InGaAs emitter cap layer 5 is removed by selective dry etching or wet etching with a phosphoric acid-based etchant, and then HCl or HCl + H
_This is performed by removing the n ⁻ InGaP layer 6 by selective wet etching using ₂ O, HCl + H ₃ PO ₄ . Since the n ^- InGaP layer 6 can be removed by selective wet etching, the feature is that the p ⁺ GaAs layer 8 can be removed with almost no etching.

[0006]

However, in the structure of the HBT shown in FIG. 2, in order to expose the p ⁺ GaAs layer 8, the n ⁻ InGaP layer 6 is made of HCl, HCl + H ₂ O,
HCl + H ₃ PO ₄ , p ⁺ GaAs
Since the s layer 8 cannot be completely exposed, the base resistance increases. The reason is that it is difficult to switch between As and P during the growth of the thin film.
This is because an n ^- InGaAsP layer 7 is formed between the p ⁺ GaAs layer 8 and the n ^- InGaP layer 6 as shown in FIG. This n ^- InGaAsP layer 7 is made of HCl or HCl +
H ₂ O, HCl + H ₃ PO ₄ can hardly be removed. This is because the n ⁻ InGaAsP layer 7 partially contains InGaAs, and this InGaAs
However, it is not possible to perform etching with these etchants. For this reason, the p ⁺ GaAs layer 8 cannot be completely exposed. The present invention has been made in view of the above problems, to solve the above problems, p ⁺
It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of reliably exposing a GaAs layer.

[0007]

A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device including a GaAs layer and an InGaP layer formed on the GaAs layer. The method is characterized by comprising a first step of etching with an etchant and a second step of etching InGaAsP with a second etchant capable of etching. The method for manufacturing such a semiconductor device is described in In.
Since the method has a second step of etching GaAsP with a second etchant capable of etching, n ⁻ InGaAs generated by switching between As and P during thin film growth.
The sP layer can be etched, and the p ⁺ GaAs layer can be reliably exposed. Therefore, the base resistance can be reduced.

In the above method for manufacturing a semiconductor device,
Preferably, the second etchant is HCl containing an oxidizing agent. Preferably, the oxidizing agent is H ₂ O ₂ . By adopting such a method for manufacturing a semiconductor device, an n ⁻ InGaAsP layer in which InGaAs and InGaP are mixed can be etched in the second step. That is, InGaP is used as the second etching solution.
To HCl which can be etched, by using those H ₂ O ₂ was added as an oxidizing agent, it can be InGaP simultaneously InGaAs is also etched. At this time, the etching of InGaAs is performed by oxidizing with an oxidizing agent to form an oxide, and removing the oxide with HCl.

Further, in the above method for manufacturing a semiconductor device,
The second etchant is composed of InGaAs and InGaAs.
It is desirable to have the same etching rate for sP
New n^-When etching the InGaAsP layer, the second
HCl and H in etchant_TwoO _TwoBy adjusting the mixing ratio of
The etching rates for nGaAs and InGaP are the same.
To make n^-A in the InGaAsP layer
Obtaining an etching rate independent of the distribution of s and P
It becomes possible. Using such a second etching solution
That is, n^-Distribution of As and P in InGaAsP layer
Greatly fluctuates locally, and there is an InGaAs component.
Or even if there is a part where the InGaP component is concentrated,
No etching unevenness occurs, and n^-In
The GaAsP layer can be etched.

In the above method for manufacturing a semiconductor device, the first etching solution is preferably hydrochloric acid or an aqueous solution of hydrochloric acid. With such a method for manufacturing a semiconductor device, a flat surface equivalent to the surface before the first step can be obtained after the first step.

[0011]

Next, embodiments of the present invention will be described in detail with reference to the drawings. The method for manufacturing a semiconductor according to the present invention is a method including a first step of etching an InGaP layer with a first etchant and a second step of etching InGaAsP with a second etchant capable of etching. In the first step, n ^- InG in FIG.
The aP layer 6 is selectively etched, and the subsequent second step is performed so that n ^- InGaAsP generated at the time of switching between As and P is formed.
Etch layer 7.

[First Embodiment] FIG. 1 shows a first embodiment of the present invention.
For explaining the method of manufacturing the semiconductor device according to the third embodiment.
It is a low chart. In FIG. 1, reference numeral 1 denotes HCl
And H_TwoEtching with the first etching solution which is a mixed solution with O
1 shows a first step of performing the above-mentioned steps, wherein reference numeral 2 denotes HCl, H_ThreeP
O_Four, H_TwoO_Two, H _TwoThe second etchant, which is a mixture of O
4 shows a second step of performing etching.

To manufacture the semiconductor device shown in FIG. I. On a GaAs substrate 10, an n ^- GaAs layer 9, a p ⁺ GaAs layer 8, an n ^- InGaP layer 6, and an n ⁺ InG
An aAs emitter cap layer 5 is formed. At this time, even if the conditions at the time of manufacturing the thin film are optimized, n ^- In shown in FIG.
The GaAsP layer 7 always occurs and has a width of 20 ° to 200 ° depending on conditions. In order to reduce the emitter resistance, it is desirable that the conduction band of the n ⁻ InGaP layer 6 as the emitter and the p ⁺ GaAs layer 8 as the base be smoothly connected. For that purpose, n ^- InGaAs
It is preferable that the band discontinuity is eliminated by forming the sP layer 7. Therefore, from the viewpoint of eliminating band discontinuity, the n ^- InGaAsP layer 7 having a thickness of 100 ° or more is used.
Is desirably formed. Then, n ⁺ InG
The aAs emitter cap layer 5 is made of EC using chlorine gas.
Etching using an R device or the like, and then the first
It is manufactured by sequentially performing the step and the second step.

In the first step, a first etchant composed of HCl + H ₂ O is used to selectively etch the n ⁻ InGaP layer 6. The etching using the first etchant stops at the n ⁻ InGaAsP layer 7. The first step, because of the selectivity, high uniform n ^-
The InGaAsP layer 7 can be exposed.

N^-The InGaAsP layer 7 is made of InGaAs.
And InGaP are mixed, the second step
The second etching solution used in the above is InGaAs and InGa
It must be possible to remove both P.
HCl, H_ThreePO_Four, H_TwoO_Two, H_TwoSecond mixture of O
In etching using an etchant, InGaAsP
The InGaP component in the layer is made of InGaAs by HCl.
The component is H_ThreePO_FourAnd H _TwoO_TwoAnd etched by p
⁺The surface of the GaAs layer 8 can be exposed.

After the second step, in order to obtain a uniform surface of the p ⁺ GaAs layer 8, it is necessary to use InGaAs and InGaP.
It is desirable that the etching rates are close to each other. For example,
The etching rate of the second etching solution in the second step is
In the case where InGaAs is much faster than InGaP, only InGaAs partially formed in the n ^- InGaAsP layer 7 is selectively removed, the InGaP portion is selectively left, and the n ^- InGaAsP layer 7 is uniform. Can not be sharpened. As and P in the n ^- InGaAsP layer 7
Depends on the growth conditions such as how to switch between As and P. However, if the etching rates of InGaAs and InGaP are the same, the etching rate of n ⁻ InGaAsP layer 7 is It does not depend on the composition ratio.

FIG. 6 shows H of H in the second etching solution.
Concentration ratio to ₂ O ₂ , InGaP and InGaAs
4 is a graph showing a relationship between the etching rate and the etching rate. FIG. 6 shows that the etching rates for InGaP and InGaAs become almost the same when the ratio of HCl to H ₂ O ₂ is in the range of 30: 1 to 50: 1. Therefore, HCl: H ₃ PO ₄ : H ₂ O ₂ : H ₂ O = 30:
A ratio between 4: 1: 90 and 50: 4: 1: 90 is preferred.

Here, the ratio between H ₃ PO ₄ and H ₂ O is G
H ₃ PO ₄ : H ₂ O ₂ : H ₂ O having the same mixing ratio as the phosphoric acid-based etching solution used for etching aAs
1:90 is set. Therefore, H ₃
When the ratio of PO ₄ and H ₂ O ₂ was changed, HCl and H ₃ PO ₄
Also varies.

HCl: H ₃ PO ₄ : H ₂ O ₂ : H ₂ O = 4
The second etching solution mixed at a ratio of 0: 4: 1: 90 has an etching rate of 4 to 6 ° / sec with respect to InGaAsP. There is an advantage that the etching rate of the second etching solution is constant irrespective of the distribution of As and P. As a result, even when the distribution of As and P is not constant in the film as in the n ^- InGaAsP layer 7 generated by switching between As and P, n ^- I is simply obtained.
The etching time can be determined from the thickness of the nGaAsP layer 7, and the amount of over-etching of the p ⁺ GaAs layer 8 can be accurately controlled.

The thickness of the n ^- InGaAsP layer 7 depends on the growth conditions of the thin film layer, but is in the range of about 20 to 200 °, so that the etching may be performed for 25 to 50 seconds. In order to check whether or not the p ⁺ GaAs layer 8 serving as the base has been etched, it can be determined by bringing two platinum needles into contact with the semiconductor surface and checking the voltage-current characteristics of the two terminals. Therefore, once the etching time required in the second step is checked, the surface of the p ⁺ GaAs layer 8 can be easily exposed unless the growth conditions of the thin film are changed.

In the second step, InGaAsP / G
Although selective wet etching of aAs cannot be performed, there is no practical problem. This is because the thickness of the n ^- InGaAsP layer 7 is considerably thinner than the thickness of the p ⁺ GaAs layer 8, 800 °, and therefore, the actual thickness of the n ^- InGaAsP layer 7 is 100 °, and is etched at 200 °. However, the amount of over etching is at most 100Å
This is because it is sufficiently smaller than the thickness of the p ⁺ GaAs layer 8.

The method of manufacturing such a semiconductor device is based on In
Since the method has a second step of etching the GaAsP layer with a second etchant capable of etching, n ⁻ InGa generated by switching between As and P during thin film growth.
The AsP layer 7 can be etched, and p ⁺ GaAs
The layers can be exposed. Therefore, the base resistance can be reduced.

Also, HCl and H ₂ O _{2 of} the second etching solution are used.
Is adjusted so that the etching rates for InGaAs and InGaP are the same, so that n ⁻ In
Independent of the distribution of As and P in the GaAsP layer 7,
It is possible to obtain an etching rate. By using such a second etching solution, n ^- InGaAsP
Even if the distribution of As and P in the layer 7 fluctuates greatly locally and there is a portion where the InGaAs component or the InGaP component is concentrated, the unevenness of the etching does not occur, and the n ^- InGaAsP layer 7 is uniformly formed. Can be etched.

[Second Embodiment] FIG. 3 shows a second embodiment of the present invention.
Showing the method of manufacturing the semiconductor device according to the first embodiment.
It is. The second embodiment of the present invention is the first embodiment
The difference from the first step 3 is that HCl and H_Two
HCl instead of the first etchant consisting of O
This is where a first etching solution is used. [Third Embodiment] FIG. 4 shows a third embodiment of the present invention.
4 is a flowchart illustrating a method for manufacturing a semiconductor device.
The third embodiment of the present invention is different from the first embodiment.
In the first step 4, HCl and H_TwoConsisting of O
Instead of the first etchant, HCl and H_ThreePO _FourAnd from
This is where a first etching solution is used.

[Fourth Embodiment] FIG. 5 shows a fourth embodiment of the present invention.
10 is a flowchart showing a method for manufacturing the semiconductor device according to the embodiment. The difference between the fourth embodiment of the present invention and the first embodiment is that in the second step 11, HCl, H
Instead of the second etchant composed of ₃ PO ₄ , H ₂ O ₂ , and H ₂ O, a second etchant composed of HCl, H ₂ O ₂ , and H ₂ O is used.

[Fifth Embodiment] The fifth embodiment of the present invention is different from the second embodiment in that, in the second step, a second etching solution comprising HCl, H ₂ O ₂ and H ₂ O is used. It is where to use. [Sixth Embodiment] The sixth embodiment of the present invention is different from the third embodiment in that in the second step, HCl,
A second etchant comprising H ₂ O ₂ and H ₂ O is used.

Next, the present invention will be described in detail with reference to examples. (Example 1) In the thin film structure of the HBT shown in FIG.
The n ⁺ InGaAs cap layer 5 is made of E using chlorine gas.
The n ^- InGaP layer 6 was exposed by etching with a CR device. Next, etching was performed using a solution in which HCl and H ₂ O were mixed at a ratio of 3: 2 as a first etching solution (first step). This first etching solution, InGaP
Is 20 ° / sec,
GaAs is hardly etched. Then H
Cl, H ₃ PO ₄ , H ₂ O ₂ , H ₂ O at 40: 4: 1: 90
The etching was performed using the solution mixed in (2) as a second etching solution (second step).

(Conventional Example 1) n^-I
After the nGaP layer 6 is exposed, HCl and H_TwoO and
Using the solution mixed at 3: 2 as an etching solution,
Ching was performed. (Conventional Example 2) n^-InGaP layer 6
And HCl and H_ThreePO _FourMixed with 1:15
Etching is performed using the combined solution as an etchant.
Was.

The following tests were performed and evaluated for the method of manufacturing the semiconductor device of Example 1, Conventional Example 1 and Conventional Example 2.

[Surface State of n ^- InGaAsP Layer] In the first embodiment, after the first step, an atomic force microscope (A
The state of the surface of the n ^- InGaAsP layer 7 was examined using FM). As a result, the RMS roughness value was 10 °, which was almost the same as the value of the n ⁻ InGaP layer 6 before performing the first step, that is, 12 °, and the surface was flat.

[Voltage-Current Characteristics] In the first embodiment, the first
After the step, two platinum needles were brought into contact with the surface of the n ^- InGaP layer 6 to evaluate the two-terminal characteristics when a voltage was applied between the two needles. Similarly, the respective surfaces of the semiconductor devices obtained in Example 1, Conventional Example 1, and Conventional Example 2 were evaluated. FIG. 7 shows n ^- In
8 shows the result of the surface of the GaP layer 6, the result of Example 1 is shown in FIG. 9, the result of Conventional Example 1 is shown in FIG. 9, and the result of Conventional Example 2 is shown in FIG. Table 1 shows a voltage (withstand voltage) when a current flows at 10 μA in FIGS. 7 to 10.

[0032]

[Table 1]

7 to 10, the horizontal axis represents voltage, and the vertical axis represents current. The rise of the current is caused by the influence of the Schottky barrier caused by bringing the semiconductor and the metal into contact. As the semiconductor surface has a higher carrier concentration, the thickness of the Schottky barrier becomes thinner and the tunnel current increases, so that the current flows more easily. When the p ⁺ GaAs layer 8 is exposed on the surface,
The rising voltage becomes 0 V, and the voltage-current characteristics become linear.

As shown in FIG. 7, the n ^- InGaP layer 6
Shows that the effect of the Schottky barrier is large because the carrier concentration is low, and the rising voltage of the current is 6
It was quite high, above V.

FIG. 8 shows that the rising voltage of the current in Example 1 is almost 0 V, the current-voltage characteristics are linear, and the base p ⁺ GaAs layer 8 is completely exposed. .

On the other hand, as shown in FIG. 9, in the conventional example 1, since the etching is stopped on the surface of the n ^- InGaAsP layer 7, about 2 V of the rising voltage of the current remains. Also,
As shown in FIG. 10, in the conventional example 2, the rising voltage of the current is 1
V, which indicates that a portion of the n ^- InGaAsP layer 7 was etched by adding H ₃ PO ₄ to HCl. However, in the conventional example 2, since the rise voltage does not change even if the etching time is increased,
It is considered that part of the surface of the n ^- InGaAsP layer 7 was lightly oxidized and etched by a small amount of dissolved oxygen contained in the solution.

As shown in FIGS. 7 to 10, n ^- I
It can be seen that the current flows well by etching the nGaP layer 6. HCl + H
By performing the treatment with ₃ PO ₄ , the rising voltage in the two-terminal characteristic is reduced, which indicates that the treated surface is closer to the p ⁺ GaAs layer 8 as the base layer. This indicates that the surface of the n ^- InGaAsP layer 7 can be slightly etched by adding H ₃ PO ₄ to HCl.

According to Table 1, the breakdown voltage of the surface of the n ^- InGaP layer 6 was 7.6 to 8.0 V. In Conventional Example 1 and Conventional Example 2, since the n ⁻ InGaP layer 6 is etched, the breakdown voltage is reduced. However, in Conventional Example 1, it becomes 3 V, in Conventional Example 2, it becomes 1.4 V, and the base p ⁺ GaAs
It can be seen that the s layer 8 has not been etched. On the other hand, in Example 1, the voltage was as small as 0.1 V, and it was found that the p ⁺ GaAs layer 8 was almost completely removed.

[0039]

As described above, the method for manufacturing a semiconductor device according to the present invention is a method having a second step of etching InGaAsP with a second etchant capable of etching. The n ⁻ InGaAsP layer generated by the switching of P can be etched, and the p ⁺ GaAs layer can be reliably exposed.
Therefore, the base resistance can be reduced.

Further, HCl and H ₂ O _{2 of} the second etching solution are used.
Is adjusted so that the etching rates for InGaAs and InGaP are the same, so that n ⁻ In
An etching rate independent of the distribution of As and P in the GaAsP layer can be obtained. By using such a second etchant, even if the distribution of As and P in the n ^- InGaAsP layer is largely fluctuated locally and there is a portion where the InGaAs component or the InGaP component is concentrated, etching unevenness occurs. This does not occur, and the n ^- InGaAsP layer can be etched with high uniformity.

[Brief description of the drawings]

FIG. 1 is a flowchart illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a layer structure of an example of a semiconductor device.

FIG. 3 is a flowchart illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a flowchart illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a flowchart illustrating a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 6 is a graph showing a relationship between a concentration ratio of HCl to H ₂ O ₂ in a second etching solution and an etching rate for InGaP and InGaAs.

[7] by removing the n ⁺ InGaAs cap layer shown in FIG. ^11, n - is a graph showing the voltage-current characteristics of the semiconductor device in which expose the InGaP layer.

FIG. 8 is a graph showing voltage-current characteristics of a semiconductor device manufactured by the method of manufacturing a semiconductor device according to the present invention after the p ⁺ GaAs layer is exposed.

FIG. 9 is a graph showing a voltage-current characteristic of a semiconductor device manufactured by a conventional method of manufacturing a semiconductor device, and a graph showing a voltage-current characteristic of a surface after being etched by HCl.

FIG. 10 is a graph showing voltage-current characteristics of a semiconductor device manufactured by a conventional method of manufacturing a semiconductor device.
5 is a graph showing voltage-current characteristics of a surface after etching with + H ₃ PO ₄ .

FIG. 11 is a layer structure diagram for describing a problem of the semiconductor device shown in FIG. 2;

[Explanation of symbols]

1, 3, 4 First step 2, 11 Second step 5 n ⁺ InGaAs emitter cap layer 6 n ^- InGaP layer 7 n ^- InGaAsP layer 8 p ⁺ GaAs layer 9 n ^- GaAs layer 10 S. I. GaAs substrate

Claims (5)

[Claims] 1. A method of manufacturing a semiconductor device including a GaAs layer and an InGaP layer formed on the GaAs layer, wherein a first etching solution etches the InGaP layer with a first etchant.
A method for manufacturing a semiconductor device, comprising: a step of etching InGaAsP with a second etchant capable of etching. 2. The method according to claim 1, wherein the second etchant is an HC containing an oxidizing agent.
2. The method according to claim 1, wherein the value is 1. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the oxidizing agent is H ₂ O ₂ . 4. The method according to claim 1, wherein the second etchant is InGaAs and I
4. The method of manufacturing a semiconductor device according to claim 1, wherein the same etching rate is applied to nGaAsP. 5. The method for manufacturing a semiconductor device according to claim 1, wherein the first etching solution is hydrochloric acid or an aqueous solution of hydrochloric acid.