JPH04286126A - Heterojunction bipolar transistor - Google Patents

Abstract

PURPOSE:To supply an AlGaAs/GaAs heterojunction bipolar transistor in which a selectively etching method for automatically stopping etching in an emitter layer except a thickness of an outer base protective layer can be performed. CONSTITUTION:An AlGaAs/GaAs heterojunction bipolar transistor of this invention has a semiconductor layer 4 containing In in an emitter layer 5. Dry etching can be selectively stopped in the layer 5, and since an outer base protective layer can be easily formed, the fine transistor having a small decrease in a current amplification factor can be manufactured with excellent uniformity and reproducibility.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to AlGaAs/GaA
s-heterojunction bipolar transistor.

0002

[Prior art] Heterojunction bipolar transistors are
It is a bipolar transistor that uses a wide bandgap semiconductor for the emitter. The characteristics of this transistor are
Because it uses a wide bandgap emitter, it has high current gain and high drive capability, allowing for ultra-high speed operation.

[0003] In order to improve the performance of heterojunction bipolar transistors, efforts were made to miniaturize the elements. , ED86-145, emitter
A heterojunction bipolar transistor having the structure shown in FIG. 3 has been reported, which allows the distance between the bases to be miniaturized to 0.2 μm. Here, 1 is a high resistance GaAs substrate, 2 is a collector layer,
3 is the base layer, 5 is the AlGaAs emitter layer, 6 is n+
A GaAs contact layer, 7 a SiO2 layer, 8 an emitter electrode, 9 a base electrode, 10 a collector electrode, and 12 a surface recombination center.

On the other hand, miniaturization of elements brings about a reduction in current gain due to the so-called emitter size effect, causing difficulties in circuit design. This is because as the emitter/base junction area is reduced, the influence of the recombination current due to the surface recombination center 12 existing on the surface of the external base region between the emitter and base electrodes becomes relatively large.

One of the means for solving this problem is the transistor structure shown in FIG. Mr. Hayama et al. reported in IEICE Technical Report, ED 89-147 that a part of the AlGaAs emitter layer 5 is used as an external base protection layer to significantly improve the device characteristics.

[0006]

However, the thickness d of the external base protective layer in FIG. 4 needs to be reduced to a thickness at which the layer is completely depleted;
It was nm. Regarding the formation of the external base protective layer, if the etching depth is controlled by the etching time, the Al
The total thickness of the GaAs emitter layer and the n+GaAs layer above it is as much as 400 nm, and it is difficult to leave 50 nm of the layer unetched. Therefore, unless there is a selective etching method that automatically stops etching leaving only the thickness d of the external base protective layer, it is difficult to fabricate ultra-high speed transistors with good reproducibility and uniformity.

SUMMARY OF THE INVENTION An object of the present invention is to provide an AlGaAs/GaAs heterojunction bipolar transistor capable of a selective etching method in which etching is automatically stopped leaving a thickness d of the external base protective layer.

[0008]

[Means for Solving the Problems] The present invention provides AlGaAs
/GaAs heterojunction bipolar transistor is characterized by having a semiconductor layer containing In in the AlGaAs emitter layer.

[0009]

[Operation] Conventional dry etching uses AlGaAs and G.
There have been methods for uniform rate etching of aAs and selective etching of GaAs for AlGaAs, but no selective etching method for AlGaAs and GaAs. Therefore, it is difficult to stop etching while leaving the thickness d of the external base protective layer in the middle layer of the AlGaAs emitter layer.

In the transistor of the present invention, by inserting the semiconductor layer 4 containing In into the emitter layer, Cl2
AlGaAs, GaA by dry etching with gas
s is etched at a constant rate, whereas the semiconductor layer 4 containing In has a very low etching rate.
Etching automatically stops at the semiconductor layer 4 containing the . Therefore, with the transistor of the present invention, it has become possible to manufacture a low-noise, ultra-high-speed transistor with good reproducibility and uniformity, a large current amplification factor, and low noise.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings.

The structure of the heterojunction bipolar transistor of this embodiment will be explained while explaining its manufacturing method. FIG. 1 shows the structure of the heterojunction bipolar transistor of this embodiment, and FIG. 2 shows the manufacturing process thereof.

First, as shown in FIG. 2(a), a GaAs layer (Si 1×101
7cm-31000nm), Ga corresponding to base layer 3
After growing the As layer (Be 2×10 19 cm - 3150 nm), a semiconductor layer 4 containing In, here In0.
15Ga0.85As(Be2×1019cm-3
2 nm) was grown. Furthermore, an AlGaAs layer (Si 3×1017c) corresponding to the emitter layer 5 is formed.
m-3 50 nm) corresponding to the external base protective layer thickness d (50 nm here), a semiconductor layer 4 containing In, here In0.15Al0.85As (
Si (3×10 17 cm −3 2 nm) was grown. Furthermore, AlGaA corresponding to the emitter layer 5
s layer (Si 3×1017cm-3 100nm)
, a GaAs layer corresponding to the n+GaAs contact layer 6 (
Si 7×10 18 cm −3 150 nm) was grown. Next, a mask 11 is formed over the emitter region. Here, SiN (500 nm) was used.

Next, as shown in FIG. 2(b), the mask 1
1 as a mask, n+GaAs contact layer 6 and AlGa
The As emitter layer 5 was removed by dry etching using Cl2 gas. At this time, the semiconductor layer 4 containing In, here In0.15Al0.85As (Si3×1017 cm
-3 2 nm) was not etched by Cl2 dry etching, so it acted as an etching stop layer, and the etching was stopped leaving the emitter layer with the external base protective layer thickness d (50 nm). Thereafter, as shown in FIG. 2(c), a SiO2 layer 7 was formed on the sidewall. Next, Figure 2 (
As shown in d), In0.15Al0.85As(S
i 3×10 17 cm −3 2 nm) was removed by wet etching, and the base layer was etched again by dry etching using Cl 2 gas. At this time, In
Semiconductor layer 4 containing In0.15Ga0.85A here
s(Be 2×1019cm-3 2nm) is C
Since it is not etched by the dry etching of 12, it acts as an etching stop layer, and the etching does not reach the base layer as in the conventional structure of only a GaAs layer. The transistors were then fabricated using conventional processes. The above process was described by Mr. Hayama et al. in IEICE Technical Report, ED.
The manufacturing process is the same as that reported in 86-145.

In this manner, the heterojunction bipolar transistor shown in FIG. 1 was manufactured. In this heterojunction bipolar transistor, the external base protection thickness d13 was uniform, no distribution occurred within the sample plane, and etching variation between samples was small. For this reason, a heterojunction bipolar transistor with good uniformity and less reduction in current amplification factor due to emitter size effects was made.

[0016]

[Effects of the Invention] As explained above, by having a transistor structure in which a semiconductor layer containing In is inserted into the AlGaAs emitter layer, etching can be stopped leaving only the thickness d of the external base protective layer in the AlGaAs emitter layer. Heterojunction bipolar transistors with less reduction in current amplification due to emitter size effects have become possible.
It has become possible to manufacture products with good uniformity and reproducibility.

[Brief explanation of the drawing]

FIG. 1 is a structural diagram of a heterojunction bipolar transistor of the present invention.

FIG. 2 is a manufacturing process diagram of the heterojunction bipolar transistor shown in FIG. 1;

FIG. 3 is a structural diagram of a conventional heterojunction bipolar transistor.

FIG. 4 is a structural diagram of a conventional heterojunction bipolar transistor.

[Explanation of symbols]

1 High resistance GaAs substrate 2 Collector layer 3 Base layer 4 Semiconductor layer containing In 5 AlGaAs emitter layer 6 n+GaAs contact layer 7 SiO2 layer 8 Emitter electrode 9 Base electrode 10 Collector electrode 11 Mask 12 Surface recombination center d　External base protective layer thickness

Claims (1)

[Claims] 1. An AlGaAs/GaAs heterojunction bipolar transistor, comprising a semiconductor layer containing In in an AlGaAs emitter layer.
aAs/GaAs heterojunction bipolar transistor.