JP2001023922A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the manufacturing method of a semiconductor device, which reduces the selection ratio of etching of an insulating film to a metal film, for forming a plug and can lessen a loss of the plug. SOLUTION: This manufacturing method of a semiconductor device is performed, in a method such that an insulating film 3 is formed on a substrate 1 or a polycrystalline film 2 formed on the substrate 1, a hole 4 penetrating in the thickness direction of the film 3 is formed in this film 3, an adhesive layer 5 consisting of a titanium layer and/or a titanium compound layer is formed on the film 3, and the inner wall surface of the hole 4 in such a way as to cover the upper surface of the film 3 and the inner wall surface of the hole 4, a metal film 6 is formed on this layer 5 in such a way as to fill the hole 4. Thereafter first, the film 6 on the film 3 is removed through a dry etching and ten the layer 5, which is exposed by the removal of the film 6, on the film 3 is removed by dry etching with a mixed gas of Cl2 gas with Kr gas or a mixed gas of Cl2 gas with Xe gas, and a plug 6a' is formed in the hole 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device in which a metal layer formed on an insulating film having a through hole is etched back to form a buried plug in the through hole. About the method.

[0002]

2. Description of the Related Art In recent years, semiconductor devices have been required to have higher integration and higher functionality, and as a result, the importance of fine processing techniques has been increasing. Due to the miniaturization, the width of the wiring, the diameter of the contact hole, the through hole and the like are reduced. Therefore, in order to improve the reliability of the connection between the wiring layer and the substrate or between the wiring layers, after forming a through hole in the interlayer insulating film,
A technique of once filling the through hole with a lower resistance conductive material such as tungsten and thereafter forming a wiring layer such as aluminum thereon has been used.

FIG. 2 shows this process. First, referring to FIG. 2A, a polysilicon film 2 is formed as a lower wiring on a substrate 1 by a CVD (Chemical Vapor Deposition) method. Next, an interlayer insulating film 3 is formed so as to cover the polysilicon film 2. The interlayer insulating film 3 is, for example, a SiO ₂ film, a BPSG (borophosphosilicate glass) film, a PSG (phosphosilicate glass) film, or the like formed by a CVD method. Next, as a hole penetrating through the interlayer insulating film 3 in the thickness direction, a through hole 4 reaching the polysilicon film 2 is formed.

[0004] Next, referring to FIG.
An adhesion layer 5 made of titanium is formed on the interlayer insulating film 3 by sputtering so as to cover the inner wall. Next, a tungsten film 6 is formed on the adhesion layer 5 so as to completely fill the through hole 4.

Next, the tungsten film 6 on the interlayer insulating film 3
And the adhesive layer 5 are sequentially removed by etching.
1 shows a schematic view of an etching apparatus 10. Etching equipment 1
0 reaction chamber13Inside the shower head as the upper electrode
And the susceptor 19 as the lower electrode
Have been. The shower head 12 has a high frequency power supply 15
Connected and the susceptor 19 is grounded. Susceptor 1
The wafer 18 is placed on the wafer 9. Also, the susceptor
19 is to avoid temperature runaway on the surface of wafer 18 during reaction.
Cooling gas passage 19a is provided. Ma
In addition, the shower head 12 has a process gas (etching).
Gas) inlet tube 11 is connected. Around wafer 18
Surroundings for concentrating the plasma P on the wafer 18
A focus ring 14 is provided. Reaction chamber13
Is connected to a vacuum exhaust system via an exhaust pipe 17.

When the surface of the wafer 18 is etched by the etching apparatus 10 described above, first, the reaction chamber 13 is etched.
The inside is decompressed by a vacuum exhaust system connected via an exhaust pipe 17, and is introduced through an introduction pipe 11 and a shower head 12.
A process gas is introduced into the reaction chamber 13. In this state, a high frequency is applied to the shower head 12 also serving as an upper electrode, thereby generating a plasma P of a process gas in the reaction chamber 13 and supplying the plasma P to the surface of the wafer 18 to etch the surface of the wafer 18. I do.

In FIG. 2B, in the etching back of the tungsten film 6 on the interlayer insulating film 3 and the adhesion layer 5, first, the tungsten film 6 is etched using, for example, SF ₆ and Ar as a process gas. When the adhesion layer 5 on the film 3 is exposed, this is removed by etching using a mixed gas of Cl ₂ and N ₂ or a mixed gas of Cl ₂ and Ar. And through hole 4
Tungsten remains only inside, and this becomes a plug.

[0008]

However, in the above method, a mixed gas of Cl ₂ and N ₂ or a mixed gas of Cl ₂ and Ar ₂ is used.
The etching rate between the interlayer insulating film 3 and the tungsten in the through hole 4 that is etched during the etching of the adhesion layer 5 using a mixed gas of , The plug loss increases. As shown in FIG. 2C, the plug loss is a height L of the plug 6a made of tungsten, which is lower than the height of the interlayer insulating film 3, and represents a difference L in the height.

As a result, as shown in FIG. 2D, when an upper wiring 7 of, for example, aluminum is formed on the interlayer insulating film 3 in a later step, a large step is formed in the upper wiring 7, and the contact coverage is deteriorated. However, in the worst case, the upper wiring 7 is disconnected. The deterioration of the contact coverage causes a decrease in the reliability of the semiconductor product and a decrease in the yield.

The present invention has been made in view of the above problems, and has as its object to provide a method of manufacturing a semiconductor device in which the etching selectivity between an insulating film and a metal forming a plug can be reduced to reduce plug loss.

[0011]

In order to solve the above problems, according to the present invention, an insulating film is formed on a substrate or a polysilicon film formed on the substrate, and the insulating film is formed on the insulating film in a thickness direction. A through hole is formed, and an adhesion layer made of titanium and / or a titanium compound is formed so as to cover the insulating film and the inner wall surface of the hole formed in the insulation film, and fill the hole on the adhesion layer. Then, a metal film is formed. Thereafter, first, the metal film on the insulating film is removed by dry etching, and then,
An adhesion layer on the insulating film exposed by the removal of the metal film Cl ₂
The plug is removed by dry etching with a mixed gas of H ₂ and Kr or a mixed gas of Cl ₂ and Xe to form an embedded plug of metal in the hole. By using the above gas for etching the adhesion layer, the etching selectivity between the insulating film and the metal can be reduced, and plug loss can be reduced.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. The same parts as those in the conventional example are denoted by the same reference numerals, and detailed description thereof will be omitted.

FIG. 1 shows a step of forming a tungsten buried plug according to an embodiment of the present invention. As in the conventional case, first, as shown in FIG. 1A, a polysilicon film 2 is formed on a substrate 1 as a lower wiring by a CVD method. Next, an interlayer insulating film 3 is formed so as to cover the polysilicon film 2.
To form The interlayer insulating film 3 is, for example, a SiO ₂ film, a BPSG (borophosphosilicate glass) film, a PSG (phosphosilicate glass) film, or the like formed by a CVD method. Next, a through hole 4 reaching the polysilicon film 2 is formed in the interlayer insulating film 3.

Next, as shown in FIG. 1B, an adhesion layer 5 made of titanium is formed on the interlayer insulating film 3 by sputtering so as to cover the inner wall of the through hole 4. next,
The through hole 4 is completely buried, and the adhesion layer 5
A tungsten film 6 is formed thereon.

Thereafter, as in the prior art, the etching apparatus 10
, The tungsten film 6 on the interlayer insulating film 3 and the adhesive layer 5 are sequentially etched and removed. In the present embodiment, the etching of the adhesive layer 5 is performed using a gas different from the conventional one.

First, the tungsten film 6 on the interlayer insulating film 3
The first step of etching the tungsten film 6 is as follows: process gas and flow rate: sulfur hexafluoride (SF ₆ ) = 110 sccm argon (Ar) = 90 sccm reaction chamber pressure: 37.3 Pa high frequency (13.56 MHz) Applied power: 600 W Etching is performed under the condition of etching time: 35 seconds. Then, as a second step, process gas and flow rate: sulfur hexafluoride (SF ₆ ) = 80 sccm argon (Ar) = 40 sccm reaction chamber pressure: 28 2.0 Pa High frequency (13.56 MHz) Applied power: 300 W Etching time: Etching is performed under the conditions until the end point is detected. The end point is detected by the adhesion layer 5
Is detected when this appears, and this detection is performed by measuring the emission intensity of a chemical reaction during etching as a wavelength from a window attached to the chamber. Next, as a third step (overetching of the tungsten film 6), process gas and flow rate: sulfur hexafluoride (SF ₆ ) = 80 sccm argon (Ar) = 40 sccm reaction chamber pressure: 28.0 Pa high frequency (13.56 MHz) Applied power: 300 W Etching time: 30 seconds Etching is performed.

Thereafter, the adhesion layer 5 on the interlayer insulating film 3 exposed by etching the tungsten film 6 is etched under the following conditions. Process gas and flow rate: chlorine (Cl ₂ ) = 20 sccm Krypton (Kr) or xenon (Xe) = 200 sccm Reaction chamber pressure: 5.3 Pa High frequency (13.56 MHz) Applied power: 550 W Etching time: 70 seconds

By the above etching, as shown in FIG. 1C, a good tungsten plug 6a 'with small plug loss can be formed. Explaining this effect, the etching of the interlayer insulating film 3 is mainly performed by so-called sputter etching in which an inert gas is ionized and made to collide with the ion, and the etched portion is cut off by the impact. Using an active gas can increase the impact and increase the etching rate. Therefore, in the present embodiment,
Heavier Kr or Xe is used instead of N ₂ and Ar used for etching the adhesion layer. As a result, the etching rate of the interlayer insulating film 3 can be increased, and the etching selectivity between the interlayer insulating film 3 and tungsten (where the etching rate of the interlayer insulating film 3 is a and the etching rate of tungsten is b, the selectivity is b / a) ) And the plug loss can be reduced.

Thereafter, as shown in FIG. 1D, an upper wiring 7 'made of aluminum is formed on the interlayer insulating film 3 so as to cover the plug 6a' by, for example, a sputtering method. As a result, a semiconductor product in which the upper wiring 7 'connected to the polysilicon film 2 by the plug 6a' is formed on the interlayer insulating film 3 is completed. Since the plug loss is small, it is possible to form the upper layer wiring 7 'with good contact coverage and shape accuracy, to prevent disconnection, and to improve the yield of semiconductor products.

Although the embodiments of the present invention have been described above, the present invention is, of course, not limited thereto, and various modifications can be made based on the technical concept of the present invention.

In the above embodiment, the polysilicon film 2 having high adhesion to the interlayer insulating film 3 is formed on the substrate 1, but the interlayer insulating film 3 is formed directly on the substrate 1. Is also good.

In the above embodiment, tungsten is used as the material of the plug. However, the present invention is not limited to this, and a high melting point metal such as molybdenum or another metal such as aluminum may be used.

The adhesion layer is not limited to titanium, but may be a titanium compound such as titanium nitride. Further, a two-layer structure of titanium and titanium nitride may be used.

In addition to the SF ₆ used for etching the tungsten film 6, a gas of another fluorine-based compound may be used.

[0025]

As described above, according to the first aspect of the present invention, the plug loss of the metal plug filling the through hole of the insulating film can be reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a step of forming a plug according to an embodiment of the present invention, wherein A is a state in which a through hole is formed in an interlayer insulating film, and B is a through hole on an interlayer insulating film with an adhesion layer as a base. C is a state in which a tungsten film is formed by embedding a tungsten film, C is a state in which a tungsten film and an adhesion layer are etched to form a buried plug of tungsten, and D is an aluminum wiring on the interlayer insulating film and the plug. The state in which the layer was formed is shown.

FIG. 2 is a cross-sectional view showing a step of forming a plug of a conventional example, where A is a state in which a through hole is formed in an interlayer insulating film;
B shows a state in which a tungsten film is formed by filling a through hole on the interlayer insulating film with the adhesion layer as a base,
C shows a state in which a tungsten buried plug with a large plug loss is formed by etching the tungsten film and the adhesion layer on the interlayer insulating film, and D shows a state in which an aluminum wiring layer is formed with a step on the interlayer insulating film and the plug. Show.

FIG. 3 is a schematic diagram illustrating a configuration of a plasma etching apparatus.

[Explanation of symbols]

1 ... substrate, 2 ... polysilicon film, 3 ... insulating film, 4
... Through-hole, 5... Adhesion layer, 6... Tungsten film, 6 a ′... Plug, 7 ′... Aluminum wiring layer.

Continued on front page F-term (reference) 4M104 BB14 CC01 DD16 DD19 DD37 DD65 FF17 FF18 FF22 HH13 5F004 AA11 BA04 BB13 CA01 CA02 CA03 CB15 DA00 DA04 DA18 DA23 DA30 DB08 DB10 DB12 EA28 EB01 EB02 EB03 5F03 JJ19 JJ19 JJ08 JJ19 JJ08 PP06 PP15 QQ08 QQ10 QQ13 QQ15 QQ31 QQ37 RR04 RR14 RR15 SS11 XX02

Claims (3)

[Claims] An insulating film is formed on a substrate or a polysilicon film formed on the substrate, and a hole penetrating in the thickness direction is formed in the insulating film. An adhesion layer made of titanium and / or a titanium compound is formed so as to cover a wall surface, and a metal film is formed on the adhesion layer so as to fill the holes, and thereafter, the metal film on the insulating film is formed. And a method of manufacturing a semiconductor device in which the adhesion layer is sequentially removed by dry etching to form an embedded plug of the metal in the hole, wherein the etching of the adhesion layer is performed by mixing Cl ₂ and Kr. A method for manufacturing a semiconductor device, wherein the method is performed using a gas or a mixed gas of Cl ₂ and Xe. 2. The method according to claim 1, wherein the metal is tungsten, and the adhesion layer is titanium. 3. The method according to claim 1, wherein after the buried plug is formed, a wiring layer connected to the buried plug is formed on the insulating film. .