JP2001015606A - Power source circuit library - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of cells corresponding to various kinds of specifications by a method wherein an output transistor is made a first power source circuit cell, a control circuit is made a second power source circuit cell, and these are independently prepared. SOLUTION: An output transistor 22 is made a first power source circuit cell 10, a control circuit constituted of a reference voltage circuit 20 and a differential amplifier circuit 21 is made a second power source circuit cell 11, and these are prepared on a power source circuit library. When power source circuits are assembled on a semiconductor integrated circuit, the first power source circuit cell 10 and a second power source circuit cell 11 are taken out. A gate terminal 30 of the first power source circuit cell 10 and a control terminal 32 of the second power source circuit cell 11 are connected, and a drain terminal 31 of the first power source circuit cell 10 and a monitor terminal 33 of the second power source circuit cell 11 are connected. As a result, the number of cells can be reduced while coping with various kinds of specifications.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit library for converting a power supply voltage and outputting the converted power supply voltage.

[0002]

2. Description of the Related Art As shown in FIG. 7, a power supply circuit converts a first power supply into a second power supply and supplies it to a load circuit. FIG. 8 shows a configuration diagram of a general power supply circuit. 8, the power supply circuit includes a control circuit including a reference voltage circuit 20 and a differential amplifier circuit 21, and an output transistor 22 that converts a first power supply to a second power supply. Then, the reference voltage value generated by the reference voltage circuit 20 and the fed back second voltage value are compared by the differential amplifier circuit 21 to perform an operation of controlling the gate voltage of the output transistor 22.

With the recent progress in miniaturization of semiconductor processes, a semiconductor integrated circuit has a plurality of power supplies for lowering the withstand voltage of a transistor and interfacing with another LSI, and it is necessary to incorporate the power supply circuit in the semiconductor integrated circuit. Has occurred.

In order to incorporate a power supply circuit into a semiconductor integrated circuit, it is necessary to make the power supply circuit into a library. In a conventional circuit library, a cell that realizes one function by combining a control circuit and an output transistor is prepared as one cell.

[0005]

However, the power supply circuit has an output voltage value, a supply current capability, a layout area,
A wide variety of specifications are required, such as a self-consumption current and an output voltage range, and it is necessary to prepare an extremely large number of cells as a power supply circuit library. Also, since a very large amount of current flows in the power supply circuit, it is necessary to install the power supply circuit as close to the I / O as possible and to cause a power supply drop due to a parasitic resistance unless the connection is made as thick as possible. Very much. Nevertheless, the design of semiconductor integrated circuits incorporating power supply circuits has not been done in the past, and designers have not gained sufficient experience. Has occurred.

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a configuration of a power supply circuit library that reduces the number of cells while responding to various specifications, and a library that can incorporate various power supply circuits while maintaining the easiness of conventional design. It is intended to provide a configuration.

[0007]

In order to achieve the above object, a power supply circuit library according to the present invention comprises an output transistor having a first power supply as a source and a second power supply as a drain, and a gate of the output transistor. A power supply circuit library including a control terminal to be connected and a control circuit having a monitor terminal connected to the drain of the output transistor, and used to construct a power supply circuit having a function of converting a first power supply to a second power supply The output transistor is provided as a first power supply circuit cell, and the control circuit is provided as a second power supply circuit cell.

With this configuration, in the conventional design method, it is necessary to prepare the number of cells of the product of the type of the control circuit and the type of the output transistor on the power supply circuit library. By preparing only the number of cells equal to the sum of the type of the control circuit and the type of the output transistor, it is possible to design a power supply circuit of the same type as the conventional one, and it is possible to greatly reduce the number of cells to be prepared. .

In the power supply circuit library according to the present invention, it is preferable that the first power supply circuit cell and the second power supply circuit cell are prepared as I / O cells. This is because the power supply circuit can be incorporated into the semiconductor integrated circuit only by treating the power supply circuit cell as an I / O cell at the time of design. Also, since it can be treated as an I / O cell, an automatic placement and routing tool that has been widely used in the past can be used. Therefore, it is necessary to place it as close to the I / O as possible and connect with as thick a wiring as possible. This is because the constraints unique to the power supply circuit can be easily satisfied, and the burden on the designer is reduced.

In the power supply circuit library according to the present invention, the gate terminal of the output transistor and the control terminal of the control circuit, and one drain terminal of the output transistor and the monitor terminal of the control circuit are arranged at the same height, respectively. It is preferable to arrange the power supply circuit cells in a shape. Since the gate terminal and the drain terminal of the first power supply circuit cell are arranged at the same height as the terminal of the second power supply circuit cell to be connected on the layout, wiring is connected simply by arranging the cells. This is because design simplicity can be maintained.

In the power supply circuit library according to the present invention, when the required current supply capacity value is divided by the current IO, if it is divisible, the first power supply circuit cells of the quotient number are arranged in an array. If it is not divisible, it is preferable to arrange the first power supply circuit cells by the number obtained by adding 1 to the quotient in an array. This is because the degree of freedom in design with respect to the supply current capability value required in power supply circuit design can be increased while maintaining the ease of design.

Further, a power supply circuit library according to the present invention includes an output transistor and a control circuit, wherein a drain terminal wiring of the output transistor is arranged at the same height as one drain terminal of the first power supply circuit cell. And the drain terminal of the output transistor of the third power circuit cell projects laterally beyond the cell frame of the third power circuit cell and is connected to the drain terminal of the adjacent first power circuit cell. It is preferred that it can be done.

By arranging the first power supply circuit cell and the third power supply circuit cell next to each other in an array, the output of each cell (drain terminal of the output transistor) can be made common, and the power supply circuit for active and the power supply circuit for active use can be shared. By incorporating a sleep power supply circuit, a low power consumption oriented LSI can be designed.

[0014]

Embodiment 1 Hereinafter, a power supply circuit library according to Embodiment 1 of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of the power supply circuit library according to the first embodiment of the present invention.

In FIG. 1, an output transistor 22 is a first power supply circuit cell 10, and a control circuit comprising a reference voltage circuit 20 and a differential amplifier circuit 21 is a second power supply circuit cell 11.
As a power supply circuit library. When the power supply circuit is incorporated on the semiconductor integrated circuit, the first power supply circuit cell and the second power supply circuit cell are called, and the gate terminal 30 of the first power supply circuit cell and the control terminal 3 of the second power supply circuit cell
2, and by connecting the drain terminal 31 of the first power supply circuit cell and the monitor terminal 33 of the second power supply circuit cell.

With such a configuration, in the conventional design method, it is necessary to prepare the number of cells of the product of the type of the control circuit and the type of the output transistor in the power supply circuit library. In contrast, the first embodiment
According to this, it is possible to design a power supply circuit of the same type as that of the related art simply by preparing only the number of cells equal to the sum of the type of the control circuit and the type of the output transistor.

(Embodiment 2) Hereinafter, a power supply circuit library according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 2 is a configuration diagram of the power supply circuit library according to the second embodiment of the present invention.

In FIG. 2, a first power supply circuit cell 10 and a second power supply circuit cell 11 are prepared as one of I / O cells 15 on an I / O cell library. When the power supply circuit cells are arranged in an array, the gate terminal of the first power supply circuit cell 10 and the control terminal of the second power supply circuit cell 11, and the drain terminal of the first power supply circuit cell 10 and the second power supply The terminal heights are matched on the layout so that the monitor terminals of the circuit cells 11 are connected.

By adopting such a configuration, I / O can be performed at the time of design.
Only by treating a power supply circuit cell as a cell, a design in which a power supply circuit is incorporated on a semiconductor integrated circuit can be realized.
At the same time, since it can be handled as an I / O cell, it is possible to use an automatic placement and routing tool that has been widely used in the past. Therefore, it is possible to easily satisfy the restriction peculiar to the power supply circuit that it is placed as close to the I / O as possible and connected with as thick a wiring as possible, and the burden on the designer is reduced.

(Embodiment 3) Hereinafter, a power supply circuit library according to Embodiment 3 of the present invention will be described with reference to the drawings. FIG. 3 is a configuration diagram of the power supply circuit library according to the third embodiment of the present invention.

In FIG. 3, a basic unit IO is provided for the supply current of the output transistor which is the first power supply circuit cell 10, the required supply current capability value is divided by the basic unit IO, and the number of arrays is equal to the number of quotients. The first power supply circuit cells 10 are arranged in a line.

For example, if the basic unit is 100 mA, and the required supply current capability value is 300 mA, the division becomes 3 when the division is performed, so that the required number of cells becomes 3. Therefore, in this case, as shown in FIG.
Next to the two second power supply circuit cells 11, three first power supply circuit cells 10 are arranged in an array.

On the other hand, if the required supply current capability value cannot be divided by dividing the required supply current capability value by the basic unit IO, the minimum number of cells satisfying the required supply current capability value is used. That is, the number obtained by adding 1 to the divided quotient is the minimum value.

For example, if the basic unit is 100 mA and the required supply current capability is 150 mA, the division result is 1.5 and the quotient is 1, so the required supply current capability is satisfied. This is a configuration in which two first power supply circuit cells, which is the minimum number to be performed, are arranged in an array.

The third embodiment is different from the first embodiment described above.
Each cell is prepared as an I / O cell in the same manner as in (2) and (2), and since the gate terminal and the drain terminal of the first power supply circuit cell are arranged at the same height on the layout, wiring is connected only by arranging the cells. Thus, it is possible to increase the degree of freedom in design with respect to the supply current capability value required in the power supply circuit design while maintaining the ease of design.

Embodiment 4 Hereinafter, a power supply circuit library according to Embodiment 4 of the present invention will be described with reference to the drawings. 4 and 5 are configuration diagrams of a power supply circuit library according to the fourth embodiment of the present invention.

FIG. 4 shows an output transistor and a control circuit.
FIG. 3 is a configuration diagram of a third power supply circuit cell 12 in which 1 is arranged at the same height as one drain terminal of the first power supply circuit cell.
Although the third power supply circuit cell 12 is basically a power supply circuit cell composed of a control circuit and an output transistor, the output (drain terminal of the output transistor) wiring 31 is connected to the cell frame. It is characterized in that it is projected laterally beyond.

When an output transistor, which is a first power supply circuit cell, is disposed adjacent to the output transistor, the output (the drain terminal of the output transistor) is automatically connected. FIG. 5 shows a configuration example in which a third power supply circuit cell 12 is provided next to a power supply circuit composed of a first power supply circuit cell 10 and a second power supply circuit cell 11. As shown in FIG. 5, the output (drain terminal of the output transistor) of each cell can be made common only by arranging the first power supply circuit cell and the third power supply circuit cell next to each other in an array.

The fourth embodiment is effective for a low power consumption LSI incorporating a power supply circuit for active and a power supply circuit for sleep. That is, since a large amount of current is consumed when the LSI is in the active state, power is supplied from an active power supply circuit. However, if power is supplied from the active power supply circuit when the LSI is in the sleep state, the power consumed by the active power supply circuit is large, and the power consumed by the power supply circuit itself is wasted. In order to realize an LSI with low power consumption, it is necessary to turn off the active power supply circuit in the sleep state and supply power from the sleep power supply circuit with low self-power consumption.

Since the power supply circuit for active use has various specifications, the power supply circuit is constituted by combining the first power supply circuit cell group and the second power supply circuit cell group as described above. However, since the power supply circuit for sleep requires only low power consumption, the number of combinations of the control circuit and output transistor is extremely small, and the library is prepared as a cell in which the control circuit and output transistor are combined in advance. Even so, the number of cells in the library hardly changes. In addition, since the outputs of the active power supply circuit and the sleep power supply circuit are common, it is easier to design if the outputs can be made common only by arranging them in an array.

For this reason, low power consumption oriented LSIs include:
As shown in FIG. 5, an active power supply composed of a first power supply circuit cell and a second power supply circuit cell, and a sleep power supply composed of a third power supply circuit cell are arrayed as I / O cells. By arranging them in such a manner, the power supply library is configured such that the output 31 and the control lines 30 and 32 or the control lines 31 and 33 are automatically wired.

In the embodiment described above, the reference voltage circuit 20 and the differential amplifier circuit 21 are collectively used as a control circuit, and are prepared on the library as second power supply circuit cells. Thus, the same effect can be expected even if the reference voltage circuit 20 and the differential amplifier circuit 21 are prepared on the library as the second A power supply circuit cell 13 and the second B power supply circuit cell 14, respectively.

[0033]

As described above, according to the power supply circuit library of the present invention, the number of cells on the library can be reduced while meeting various specifications. Further, it is possible to design with a high degree of freedom using the power supply circuit cells while maintaining the easiness of the conventional design.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a power supply circuit library according to a first embodiment of the present invention;

FIG. 2 is a configuration diagram of a power supply circuit library according to a second embodiment of the present invention;

FIG. 3 is a configuration diagram of a power supply circuit library according to a third embodiment of the present invention;

FIG. 4 is a configuration diagram of a power supply circuit library according to a fourth embodiment of the present invention;

FIG. 5 is a configuration diagram of a power supply circuit library according to a fourth embodiment of the present invention;

FIG. 6 is a configuration diagram of a power supply circuit library according to a fifth embodiment of the present invention.

FIG. 7 is a diagram illustrating the role of a power supply circuit.

FIG. 8 is a diagram showing a conventional example of a power supply circuit library.

[Explanation of symbols]

 Reference Signs List 1 power supply library 2 I / O cell library 10 first power supply circuit cell 11 second power supply circuit cell 12 third power supply circuit cell 13 second A power supply circuit cell 14 second B power supply circuit cell 15 normal I / O cell 20 Reference voltage circuit 21 Differential amplifier circuit 22 Output transistor 30 Gate terminal 31 Drain terminal (output terminal) 32 Control terminal 33 Monitor terminal

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Jun Kajiwara 1006 Kazuma Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. Terms (reference) 5B046 AA08 BA03 KA06 5F064 DD25 EE52 HH10 HH12

Claims (5)

[Claims] An output transistor having a first power source as a source and a second power source as a drain; a control terminal connected to a gate of the output transistor;
A power supply circuit library comprising: a control circuit having a monitor terminal connected to a drain of the output transistor; and a power supply circuit used to construct a power supply circuit having a function of converting the first power supply to the second power supply. A power supply circuit library, wherein the output transistor is provided as a first power supply circuit cell, and the control circuit is provided as a second power supply circuit cell, respectively. 2. The power supply circuit library according to claim 1, wherein said first power supply circuit cell and said second power supply circuit cell are prepared as I / O cells, respectively. 3. The power supply circuit according to claim 1, wherein a gate terminal of the output transistor and a control terminal of the control circuit, and a drain terminal of the output transistor and a monitor terminal of the control circuit are arranged at the same height, respectively. 3. The power supply circuit library according to claim 1, wherein the cells are arranged. 4. When a required current supply capacity value is divided by a current IO, the first power supply circuit cells for the number of quotients are arranged in an array if they are divisible, and if not divisible, they are divided into quotients. 3. The power supply circuit library according to claim 1, wherein the number of the first power supply circuit cells equal to 1 is arranged in an array. 4. 5. A third power supply circuit cell including the output transistor and the control circuit, wherein a drain terminal wiring of the output transistor is arranged at the same height as one drain terminal of the first power supply circuit cell. In addition, a drain terminal of the output transistor of the third power supply circuit cell projects laterally beyond a cell frame of the third power supply circuit cell, and is connected to the drain terminal of the adjacent first power supply circuit cell. The power supply circuit library according to claim 1, wherein the power supply circuit library can perform the operation.