JP2001015458A - Production of semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing a semiconductor wafer in which thin semiconductor wafers can be sliced effectively. SOLUTION: A laminate 20 of a plurality of semiconductor wafers is mounted on a carbon slice plate 36 and clamped by means of a clamp base 24. The laminate 20 is lifted along with the clamp base 24 and the semiconductor wafers constituting the laminate 20 are sliced by means of a wire saw 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor wafer, and more particularly, to a method for manufacturing a semiconductor wafer which is effective for cutting a thin semiconductor wafer.

[0002]

2. Description of the Related Art Power transistors and power MOSFETs
For manufacturing a power device such as T, a diffusion wafer in which a high-concentration dopant is diffused on one side of a silicon wafer is used. As a method for manufacturing the diffusion wafer, a method is known in which a silicon wafer in which a dopant is diffused on both surfaces is divided into two parts. According to the method of dividing into two, two single-sided diffusion wafers can be obtained from one silicon wafer, which is preferable also from the viewpoint of productivity, and this method is now mainstream.

Further, in the above-mentioned two-division method, various methods for dividing a plurality of silicon wafers at a time have been tried in order to improve production efficiency. Such batch cutting of a plurality of wafers has already reached the level of practical use by using a wire saw, and numerous known examples have been reported.

[0004]

In the manufacture of power devices, the thickness of the wafer is not so much a problem, and if a thin semiconductor wafer can be divided, a reduction in material costs can be expected. Therefore, it is desired to improve the cutting accuracy of the wafer as compared with the known method and to reduce the production cost.

Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor wafer which is effective for cutting a thin semiconductor wafer.

[0006]

As means for achieving the above object, the following approach has been taken and will be described here. First, the precision of division by the following method was considered.

FIG. 1 is a schematic perspective view showing a test method of dividing a semiconductor wafer. In the division shown in FIG.
, And is cut by the wire saw 12 with the outer peripheral surface of the laminated body 20 fixed with wax. When the semiconductor wafer was actually cut by this method and the parallelism was examined, the following results were obtained. The parallelism is a parameter indicating how uniform the thickness of one semiconductor wafer is in a plane.

FIG. 2 is a conceptual diagram showing a method of measuring the parallelism. As shown in the figure, the thicknesses at arbitrary points A to E of the divided semiconductor wafer 18 are measured, and the difference between the minimum value and the maximum value of the measured results is taken and the values are parallelized. Degree. If the difference between the minimum value and the maximum value is small, the parallelism is good, and if the difference is large, the parallelism is bad.

FIG. 3 is a graph showing the measurement results of the wafer parallelism measured by the method shown in FIG. As shown in the figure, the parallelism measured by the method of FIG. 2 was small near the center of the lamination and was large outside. More specifically, the variation in the thickness of the vertical lines A, E, and C in FIG. 2 is large, and the variation in the vertical lines appears in the poor parallelism of the semiconductor wafer stacked outside shown in FIG. ing. That is, a specific distribution occurs in the degree of parallelism depending on the lamination position of the semiconductor wafer. From this measurement result, it can be considered that the semiconductor wafer is cut in the following state.

FIG. 4 is a schematic side view showing a state of the semiconductor wafer at the time of cutting. Poor parallelism of the vertical lines indicates that the cut portion of each semiconductor wafer 18 will spread in a fan shape as shown in FIG. This is because, as shown in FIG. 1, even if the outer peripheral surface of the laminate 20 is fixed with the wax 44, if the cutting proceeds, the wax 44 is also cut at the same time, so that the holding force of the laminated state decreases. is there. Since the division of the semiconductor wafer 18 is performed from the upper part to the lower part of the stacked body 20, the interval between the semiconductor wafers 18 is gradually increased from the upper part, and as a result, the stacked body 20 is formed into a fan shape as shown in FIG. Become.

As described above, when the cutting proceeds while each semiconductor wafer 18 is opened, the semiconductor wafers 18 stacked on the outside are cut.
Are cut obliquely, and as a result, the parallelism after division has a distribution as shown in FIG. As the thinner semiconductor wafer is obtained, the allowable value of the degree of parallelism becomes stricter. Therefore, it is difficult to cut the thin semiconductor wafer by the above-described fan-shaped cutting method.

In view of this, from the viewpoint of suppressing the fan-shaped spread, the creative operation was repeated, and the idea of "cutting while sandwiching in the stacking direction" was obtained. The present invention seeks to solve the above-described problems based on such an idea.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Summary of the Invention) A feature of the present invention conceived based on the above idea is that a cutting operation is performed while holding a laminate. As a result, even if the wire enters the inside of the semiconductor wafer and the divided portion attempts to spread outward, the pinching force suppresses the spread. As a result, the dividing operation proceeds while the semiconductor wafer is standing up, and the parallelism after the division is improved.

FIG. 5 is a schematic side view showing a method for dividing a semiconductor wafer according to the present invention. Hereinafter, the configuration of the present invention will be described with reference to FIG.

First, what is important in the present invention is that the wire 30 is inserted with the stacked body 20 of the semiconductor wafer 18 held therebetween, as shown in FIG. The sandwiching of the stacked body 20 is performed along the stacking direction of the semiconductor wafer 18, and preferably, the stacked body 20 is sandwiched from both ends. Thus, by sandwiching from both ends, the laminated state can be always maintained regardless of the position where the wire 30 is divided.

As a method of sandwiching both ends of the stacked body 20, a method of contacting the holding members 14 with the semiconductor wafers 18 located at both ends of the stacked body 20, as shown in FIG. This sandwiching may be performed by applying a force from both sides of the laminated body 20 or by applying a force from the other surface while fixing one side. The clamping force is applied to the semiconductor wafer 18.
Is not damaged.

The significance of sandwiching the laminated body 20 from both ends becomes clearer as compared with the conventional method of fixing the outer peripheral surface of the laminated body 20 with wax. That is, in the conventional wax fixing, when the cutting proceeds, the wax is also cut at the same time, so that the fixed state cannot be obtained at all times. Member 14
Does not overlap the path of the wire 30 shown by the dotted line in the figure, so that the laminated state can be always maintained.

As described above, when the wire 30 is inserted with the laminated body 20 held therebetween, the semiconductor wafer 18 constituting the laminated body 20 is cut in an upright state.
Ideally, as shown in the figure, each of the semiconductor wafers 18 is accurately divided into two through the center of the semiconductor wafer 18 where the path of the wire 30 is erected. As a result, the parallelism of the semiconductor wafer after division is improved, so that a semiconductor wafer having a small thickness can be cut.

It should be noted that the present invention does not exclude fixing the outer periphery of the laminate 20 with wax, and it is within the scope of the present invention to cut while holding the laminate fixed with wax. For example, the lamination of the semiconductor wafer 18
Methods of performing outside the wire saw, then securing with wax, and clamping within the wire saw are within the scope of the present invention.

In addition, a method of performing both lamination and clamping of the semiconductor wafer inside the wire saw, and a method of laminating and holding the laminated body using a predetermined jig outside the wire saw inside the wire saw. A method of throwing in and performing the cutting operation as it is is also within the scope of the present invention.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (Summary) A laminate 20 composed of a plurality of semiconductor wafers is placed on a carbon slice plate 36, and the laminate 20 is clamped by a clamp table 24. Then, the laminate 20 is raised together with the clamp table 24, and the laminate 20
Is divided by the wire saw 12 (see FIG. 8).

(Preferred Embodiment) The above-described technical idea of "cutting while being sandwiched in the stacking direction" is a very useful idea in the field of manufacturing a diffusion wafer. Here, an example is shown in which this characteristic technical idea is embodied in a mode considered to be industrially preferable. In the following description, among the components described above, those that do not need to be particularly described are given the same names and the same reference numerals, and detailed description thereof will be omitted.

In this embodiment, an example of upper cutting (upper cut) will be described, but the same applies to lower cutting (down cut). The embodiments described below are embodied examples of the present invention, and do not limit the present invention.

FIG. 6 is a perspective view showing a step of stacking semiconductor wafers. As shown in the figure, in the case of manufacturing a diffusion wafer by the two-piece method, first, a plurality of semiconductor wafers 18 in which dopants are diffused on both sides in advance are placed on a carbon slice plate 36, and the stacked body 20 is removed. Form.

The carbon slice plate 36 is a relatively soft support plate made of carbon, and is cut by the wire saw 12 together with the semiconductor wafer 18. A curved surface corresponding to the curvature of the semiconductor wafer 18 is formed at an upper portion of the carbon slice plate 36, that is, at a portion where the semiconductor wafer 18 is mounted, and the orientation flat of each semiconductor wafer 18 is directed upward. It is placed on this curved surface in a state.

Next, by rotating the clamp shaft 34, the clamping plate 32 is pressed against the laminated body 20, and the laminated body 20 is sandwiched between the clamping plate 32 and the reference surface 38. At this time, the force for sandwiching the stacked body 20 is set to such an extent that the semiconductor wafer 18 is not broken. Here, since it is necessary to adjust the parallelism between the clamping plate 32 and the reference surface 38, it is needless to say that a case having a function of adjusting the parallelism between the two is also included in the present invention.

Thereafter, the clamp table 24 holding the laminated body 20 is put into a wire saw and installed.

FIG. 7 is a side view showing the step of confirming the lamination state of the semiconductor wafer. After inserting the clamp table 24 into the inside of the wire saw, as shown in the figure, the wire 30 is arranged above the laminated body 20 sandwiched by the clamp table 24, and the camera 26 is further arranged thereon. .

The camera 26 is arranged so as to be movable in the direction indicated by the arrow in the figure, that is, in the laminating direction of the semiconductor wafers, and simultaneously captures the orientation flat of the wires 30 and the semiconductor wafer 18 from above. This camera 2
The image captured by 6 is enlarged and displayed on a monitor (not shown) connected to the camera 26, and the operator positions the wire 30 based on the enlarged display.

The positioning of the wires 30 is performed with reference to the semiconductor wafer 18 stacked near the center, as shown in FIG. For example, as shown in the figure, the semiconductor wafer 1 is placed at the center of the thickness of the fifth semiconductor wafer 18 from the reference plane 38.
A wire 30 for cutting 8 is arranged, and this position is set as a cutting position.

As described above, the reason for positioning the wires with reference to the semiconductor wafer stacked near the center is that the semiconductor wafer stacked outside, for example, the reference plane 3
This is because the position of the wire 30 that cuts the semiconductor wafer in contact with the clamping plate 32 is greatly shifted due to a stacking error, based on the semiconductor wafer in contact with 8. On the other hand, when a semiconductor wafer stacked near the center is used as a reference for wire positioning, a stacking error can be reduced and processing accuracy can be further improved.

After the cutting position of the reference wafer is determined as described above, the cutting position of the remaining semiconductor wafer 18 is confirmed as follows. First, while moving the camera 26 little by little, the semiconductor wafer 18 and the wires 30 above it are sequentially imaged. And each wire 3
If the position of 0 is not within the allowable range from the center of the thickness of each semiconductor wafer 18, the lamination of the semiconductor wafers 18 is performed again, and the positioning of the wires 30 is performed again. At this time,
A wafer for thickness correction and a spacer for adjusting the thickness may be used. On the other hand, if the position of each wire 30 is within an allowable range from the center of the thickness of each semiconductor wafer 18,
It is determined that cutting is possible, and the process proceeds to the next cutting step.

FIG. 8 is a perspective view showing a semiconductor wafer dividing step. As shown in FIG. 7, after positioning the wires shown in FIG. 7, the wire saw table unit 42 loaded with the clamp table is raised, and the semiconductor wafers constituting the stacked body 20 are divided by the wire saw 12. I do. Here, the rising direction of the table, the reference surface 38 on the wire saw table unit 42 and the clamping plate 3
Needless to say, the parallelism adjustment function 2 is provided in the wire saw 12 or the mechanism.

The wire saw 12 has a single wire 30
Is wound around the work rollers 28 multiple times. Then, by the multiple winding of the wire 30, a plurality of cutting portions 1 for cutting the semiconductor wafer are formed.
0 is formed. Each work roller 28 has a V-groove formed by a chaser bite process, and the wire 30
It is wound along this V groove. Chezer bite processing is a processing method in which a plurality of V-grooves are simultaneously formed using a comb-like blade. Since the pitch error of the V-grooves is extremely small according to this processing method, the processing method of the work roller 28 is used. Very preferred. Since the wire saw itself is publicly known, other descriptions regarding the wire saw are omitted. When a diffusion wafer was manufactured by the above method, a semiconductor wafer thinner than the conventional one was successfully cut, and a dispersion wafer with less variation in thickness and excellent parallelism could be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic perspective view showing a method for cutting a semiconductor wafer on a trial basis.

FIG. 2 is a conceptual diagram illustrating a method of measuring parallelism.

FIG. 3 is a graph showing a measurement result of a wafer parallelism measured by the method shown in FIG. 2;

FIG. 4 is a schematic side view showing a state of the semiconductor wafer at the time of cutting.

FIG. 5 is a schematic side view showing a method for dividing a semiconductor wafer according to the present invention.

FIG. 6 is a perspective view showing a step of stacking semiconductor wafers.

FIG. 7 is a side view showing a step of checking a stacked state of the semiconductor wafer.

FIG. 8 is a perspective view showing a dividing step of the semiconductor wafer.

[Explanation of symbols]

10: cutting part, 12: wire saw, 14: clamping member,
18 semiconductor wafer, 20 laminated body, 24 clamp base, 26 camera, 28 work roller, 30 wire, 32 clamping plate, 34 clamp shaft,
36: carbon slice plate, 38: reference plane, 42: wire saw table unit, 44: wax, 46: orientation flat

Continued on the front page (72) Inventor Hideki Ota 2612 Yonomiya, Hiratsuka-shi, Kanagawa Prefecture Inside Komatsu Electronic Metals Co., Ltd. (72) Inventor Toshio Mimura 2612 Shinomiya, Hiratsuka-shi, Kanagawa Prefecture Komatsu Electronic Metals Co., Ltd. (72) Invention Person Takeyuki Kato 2612 Shinomiya, Hiratsuka-shi, Kanagawa Prefecture, Japan (72) Inventor Manabu Kaneko 2612 Shinomiya, Hiratsuka-shi, Kanagawa Prefecture, Japan Inside Komatsu Electronic Metals Co., Ltd. (72) Inventor Hitoshi Shiba, Shinomiya, Hiratsuka-shi, Kanagawa Prefecture 2612 Komatsu Electronic Metals Co., Ltd. F-term (reference) 3C058 AA05 AA07 AA18 AB04 AB08 AB09 CB01 CB05 DA03 DA17 3C069 AA01 BA06 BB03 CA05 CB01 EA02

Claims (3)

[Claims] A step of forming a stacked body by laminating a plurality of semiconductor wafers; a step of holding the stacked body in a stacking direction of the semiconductor wafer; Cutting the semiconductor wafer constituting the laminate in a state with a wire saw (12). 2. The method for manufacturing a semiconductor wafer according to claim 1, wherein the sandwiching of the laminate is performed from both ends of the laminate. 3. A step of forming a laminate (20) by laminating a plurality of semiconductor wafers (18); a step of clamping the laminate using a clamp table (24); and a clamp clamping the laminate. Mount the table with a wire saw (1
2) A method of manufacturing a semiconductor wafer, comprising: a step of setting the inside of the laminate, and a step of cutting the semiconductor wafer constituting the laminate by the wire saw while holding the laminate by a clamp table.