JP3274190B2 - Method for manufacturing semiconductor epitaxial substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor epitaxial substrate (hereinafter referred to as an epitaxial wafer) having an epitaxial layer formed on a semiconductor substrate (hereinafter referred to as a substrate or wafer).
It is used in a method for manufacturing an epitaxial wafer having a thick epitaxial layer used for power devices such as OSFETs and IGBTs.

[0002]

2. Description of the Related Art Conventionally, in order to manufacture a high breakdown voltage element such as a power MOSFET or an IGBT which is an individual semiconductor device, a thick Si (silicon) single crystal wafer is formed on a thick Si.
A so-called epitaxial wafer having an epitaxial layer formed thereon is used.

Usually, this wafer is made of Sb (antimony).
Alternatively, a high concentration of B (boron) (for example, ≧ 5 × 10 ¹⁸ ato
ms / cm ³ ) is used. When the breakdown voltage is 500 V or more, for example, P (phosphorus) or B (boron) is doped at a low concentration (about 10 ¹⁴ atoms / cm ³ or less), and the thickness of the epitaxial layer is 70 μm or more. Have been.

A generally used power MOSFET
FIG. 11 shows a configuration of an epitaxial wafer for manufacturing an IGBT, and FIGS. 14 and 15 show schematic cross-sectional views of configurations of a power MOSFET and an IGBT.

FIG. 14 shows an N-channel type double diffusion structure D-MOSFET which uses an epitaxial wafer in which a low-concentration N ⁻ epitaxial layer 2 is formed on a high-concentration N ⁺ wafer 1. On the epitaxial layer 2, a gate electrode 5 facing the channel 4 of the surface layer via the gate insulating film 3 is formed. The P base region 6 and the N ⁺ source region 7 are formed by diffusion using the gate electrode 5 as a mask for impurity selective diffusion. Reference numeral 8 denotes an interlayer insulating film, 9 denotes a source electrode, and 10 denotes a drain electrode.

FIG. 15 shows an IGBT. The schematic configuration is such that a P ⁺ region 11 is inserted between the drain electrode 10 and the N ⁺ drain region 1 of the D-MOSFET. It is manufactured by a method according to the power D-MOSFET using an epitaxial wafer composed of a thin high-concentration N ⁺ epitaxial layer 12a and a low-concentration thick N ⁻ epitaxial layer 12b on a high-concentration P ⁺ wafer 11. Reference numeral 19 denotes an emitter electrode, and 50 denotes a collector electrode.

FIG. 11 shows the D-MOSFET and the IG
Shows a cross-sectional view of an epitaxial wafer used for BT, FIG (a) is, N as a power MOSFET ^- on
N ⁺ type, and FIG. 2B shows N ^- onP for IGBT.
⁺ Type each is an epitaxial wafer. As the N ⁺ wafer 1 or the P ⁺ wafer 11, a 100 mmφ or 125 mmφ Si wafer is currently used, and the thickness of the epitaxial layer 2 or 12a, 12b is about 1
It is about 00 μm.

In the future, as the withstand voltage increases, the thickness of the epitaxial layer further increases, and on the other hand, a wafer having a diameter of 150 mmφ or more is required to improve the productivity of the device. At this time, a problem in the related art is that the warp of the epitaxial wafer is further increased due to an increase in the thickness of the epitaxial layer and an increase in the diameter of the wafer.

[0009] Figure 12 is the same in FIG N ⁺ wafer 21 is no warping as shown in (a) (thickness 625 .mu.m), a thickness of 100μm as shown in FIG. (B) N ^- epitaxial layer 2
FIG. 4 is a cross-sectional view showing the warpage of an N ⁻ onN ⁺ type epitaxial wafer when No. 2 is formed. FIG. 13 shows a P ⁺ wafer 31 (625 μm in thickness) having no warpage shown in FIG. 13A and a 100 μm thick N ⁺ wafer as shown in FIG.
^- it is a sectional view showing a warpage of ONp ⁺ -type epitaxial wafer ^- N when forming the epitaxial layer 32. In the case of the N ^- onN ⁺ type shown in FIG. 12, the main surface of the wafer tends to be warped in a concave direction, and the N ^- onP ⁺ type shown in FIG. 13 tends to be warped in a convex direction.

[0010] Of the main surface of the wafer or the epitaxial wafer, the main surface on the side where the epitaxial layer is deposited or on the epitaxial layer side is called the main surface. Also, the term “wafer warpage” simply refers to the warpage of the main surface of the wafer.

The warping direction is such that the lattice constant of a high-concentration N ⁺ substrate doped with Sb (antimony) is larger than that of a low-concentration N ⁻ epitaxial layer doped with P (phosphorus), and B (boron) is doped. Since the lattice constant of the highly doped P ⁺ substrate is smaller than that of the N ^- epitaxial layer doped with P (phosphorus), the so-called lattice mismatch between the epitaxial layer and the substrate is elastic. This is because deformation occurs. The magnitude of this warpage is
According to the theory of elasticity, it is expected to increase in proportion to the thickness of the epitaxial layer and in proportion to the square of the wafer diameter, and has actually been confirmed experimentally.

[0012] As a result of the trial, for example, when an epitaxial layer having a thickness of 100 µm is formed using a wafer of 150 mmφ, the main surface of the N ^- onN ⁺ -type epitaxial wafer has a warp of about 80 µm in the concave direction, and the N ^- onN ⁺ -type epitaxial wafer has a warp of about 80 µm. ^In the case of the -onP ⁺ type, the warpage changes by about 40 μm in the convex direction. As a result, when a wafer having no warp is used, the epitaxial wafer is about 80 μm in N ^{− on} N ⁺ type,
^The -onP ⁺ type will result in a warpage of about 40 μm.

Conventionally, the direction of warpage of a wafer is not specified. For example, in the case of a 150 mmφ wafer, the distribution of warpage is (+40 μm
-40 μm), that is, the maximum value of the warpage is 40 μm. Therefore, almost half of the wafer has the epitaxial layer deposited with the main surface convex and the other has the epitaxial layer deposited with the concave surface. When using Therefore it does not specify the direction of a warp wafer, warpage of the epitaxial wafer, N ^- Onn ⁺ up to about 120μm in type (concave), and N ^- up to about 80μm in ONp ⁺ -type
(Convex).

In the epitaxial wafer, various films are deposited on the epitaxial layer in a device manufacturing process (also referred to as a wafer process, a process performed in the form of a wafer). Usually, it further increases in the convex direction, and when the change amount is large, it may reach 100 μm or more.

In general, when the warpage increases, the wafer cannot be held by the vacuum chuck in the wafer transfer system of the mask aligner used in the PEP process (Photo Engraving Process, photo-etching method). Requires a great deal of trouble and makes it impossible to manufacture devices. Therefore, it is a major problem to reduce the warpage of the epitaxial wafer, and particularly to reduce the warpage of the N ⁻ onP ⁺ type epitaxial wafer as much as possible.

[0016]

As described above, in an epitaxial wafer having an epitaxial layer grown on the wafer, if the lattice constant of the substrate crystal is different from the lattice constant of the epitaxial layer, warpage occurs. For example, a heavily Sb-doped N ⁺ wafer will
Since the lattice constant is larger than that of the (phosphorus) -doped N ^- epitaxial layer, the warp shape of the wafer increases in the concave direction by depositing the N ^- epitaxial layer, and a high concentration of B (boron) -doped P ^{Since the +} substrate wafer has a smaller lattice constant than the low-concentration P (phosphorus) -doped N ^- epitaxial layer, the warp shape of the wafer increases in the convex direction by depositing the N ^- epitaxial layer.

Individual semiconductor devices such as power MOSFETs and IGBTs are manufactured using epitaxial wafers. In recent years, there is a great need for high breakdown voltage and mass production of these devices. Although the thickness of the epitaxial wafer tends to be larger, the warp of the epitaxial wafer increases. Usually, when this warpage becomes large, mask alignment in the device manufacturing process,
Holding by a vacuum chuck becomes difficult, and in the worst case, manufacturing becomes impossible. It is an important issue to minimize the warpage of an epitaxial wafer as much as possible.

The present invention provides a manufacturing method for reducing the warpage of a Si epitaxial wafer, and more particularly, to a method for forming a thick epitaxial layer on a large-diameter wafer to facilitate device manufacturing. With the goal.

[0019]

SUMMARY OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor epitaxial substrate for forming an epitaxial layer having a lattice constant different from that of a semiconductor substrate (wafer) on a semiconductor substrate (wafer). Identifying the irregularities of the substrate, and, when the lattice constant of the epitaxial layer is larger than the lattice constant of the substrate, on the main surface of the substrate having a concave warp shape, and when the lattice constant of the epitaxial layer is larger than the lattice constant of the substrate. If less than a constant,
Forming an epitaxial layer on the main surface of the substrate having a convex warpage, respectively.

Note that the lattice constant is
The length of the edge of the unit cell of the crystal lattice. The main surface of the substrate (also called a wafer) refers to the main surface on which the epitaxial layer is formed. The definition of the warpage is based on the flatness of the wafer (JEIDA-43-1987, Japan Electronics Industry Development Association).

[0021]

As described above, when an epitaxial layer having a lattice constant different from that of a semiconductor substrate is formed on a semiconductor substrate, warpage occurs due to misfit of the lattice constant. For example, if an epitaxial layer having a lattice constant larger than the lattice constant of the semiconductor substrate is formed, the main surface of the substrate undergoes a change in the warpage in the convex direction, and if an epitaxial layer having a lattice constant smaller than the lattice constant of the semiconductor substrate is formed,
The main surface of the substrate undergoes a change in concave warpage.

According to the present invention, the direction of the warpage of the main surface of the wafer, which has not been conventionally defined, is aligned with the direction opposite to the direction of the change in the warp caused by epitaxial growth.
The purpose of the present invention is to cancel the change of the warp during the epitaxial growth and reduce the absolute value of the warp of the epitaxial wafer.

Measures are taken in advance by measuring the unevenness of the warp shape of the main surface of the wafer with a warp inspection device or the like, and taking measures to distinguish them. Next, when the lattice constant of the epitaxial layer is larger than the lattice constant of the substrate, for example, when manufacturing an N ^- onP ⁺ type epitaxial wafer, the main surface of the wafer on which the epitaxial layer is formed undergoes a change in the warpage in the convex direction. The main surface of the concave warp is aligned as the epitaxial layer forming surface, that is, the main surface. When the lattice constant of the epitaxial layer is smaller than the lattice constant of the substrate, for example, N ^- on
When manufacturing an N ⁺ type epitaxial wafer,
When the epitaxial layer is formed, the main surface of the wafer undergoes a change in the warpage in the concave direction. Therefore, the main surface having a convex warpage is aligned as the main surface.

When the main surface of the wafer on which the epitaxial layer is to be formed is determined as described above and the main surface is epitaxially grown by a known method, the warp of the wafer undergoes a change in the warpage in the opposite direction. Thereby, the average of the absolute values of the warpage of the plurality of epitaxial wafers is significantly reduced.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a process flow chart showing an outline of a manufacturing process from a single crystal ingot to an epitaxial wafer in one embodiment of the manufacturing method of the present invention.

Usually, the warping direction of a silicon wafer is substantially determined by a slicing step of cutting a single crystal ingot into a wafer, and the initial warping direction is substantially preserved even after a subsequent lapping step, etching step and mirror polishing step. You. Therefore, the front and back sides at the time of slicing may be designated, and the subsequent steps may be performed.

This will be described in more detail with reference to FIGS. FIG. 2 shows a single crystal ingot 20
It is assumed that the wafer is cut into a wafer in the direction of the arrow in the perspective view of FIG. FIG. 3 is a plan view of the cut wafer 21.
The cylindrical surface of the single crystal ingot 20 is provided in advance with a cutting surface 20a serving as a first orientation flat 21a (regular) of the wafer 21 and a cutting surface 20b serving as a second orientation flat 21b (for distinguishing front and back) of the wafer 21. ing.

Assuming that the outer surface of the wafer being sliced is the first principal surface and the inner surface (the surface being cut) is the second principal surface, the first principal surface (or the second principal surface) of the wafer cut from the same ingot. The directions of warpage of the main surface are all the same. However, whether the direction of the warpage is concave or convex depends on the slicing conditions. Therefore, in order to align the warp directions of the wafer, the first
In order that the main surface and the second main surface can be easily distinguished from each other, for example, two orientation flats may be provided asymmetrically as shown in FIG.

Next, a method of manufacturing an N ^- onP ⁺ type epitaxial wafer will be described as an example. First, a single crystal ingot having an impurity concentration of boron of about 10 ¹⁹ atoms / cm ³ is sliced to prepare a wafer provided with first and second orientation flats as shown in FIG. A lapping step and an etching step are performed by a known technique using a wafer sliced from one ingot (or a divided ingot when a long ingot is divided into several pieces) as one lot.

After the completion of the etching step, several wafers are extracted per lot, and the direction of the warp of the first main surface (or the second main surface) of the wafer is determined to be concave or convex by a capacitance type warpage inspection device or the like. Measure.

In this embodiment, since the lattice constant of the N ^- epitaxial layer is larger than that of the P ⁺ substrate, when the N ^- epitaxial layer is formed as described above, the main surface of the wafer undergoes a warp change in the convex direction. . Therefore, the epitaxial film formation surface of the P ⁺ wafer 31, that is, the warpage of the main surface is made concave. As a result of the sampling measurement, for example, when the warpage of the second main surface 31b is concave, in this lot, FIG.
As shown in (a), the second main surface 31b of the wafer 31 is the main surface.

After mirror polishing the second main surface 31b of the wafer 31, the epitaxial layer 3 having an impurity concentration (phosphorus, P) of about 10 ¹⁴ atoms / cm ³ is formed on the second main surface 31b by a known technique.
When 2 is deposited, the warp of the wafer 31 undergoes a change in the convex direction as shown in FIG. 4B, and an epitaxial wafer 30 with reduced warp is obtained.

In the case of an N ^- onN ⁺ type epitaxial wafer, a wafer 41 having an impurity concentration (antimony Sb) of about 10 ¹⁸ atoms / cm ³ is prepared as shown in FIG. As described above, the lattice constant of the N ⁻ epitaxial layer is
Since the lattice constant is smaller than the lattice constant of the N ⁺ substrate, the formation of the N ⁻ epitaxial layer causes the main surface to undergo a warp change in the concave direction. Therefore, the deposition surface 41b of the N ⁺ wafer 41
The warpage is convex. FIG. 5B shows an N ⁺ wafer 41.
The impurity concentration (phosphorus, P) of about 10 ¹⁴ a
This shows the epitaxial wafer 40 after the deposition of the epitaxial layer 42 of toms / cm ³ , in which the warpage is greatly improved.

At present, in a reduction exposure apparatus (stepper) used for transferring a circuit pattern onto a wafer,
The warpage tolerance is about 150 μm. Therefore, the wafer must be warped to 150μm or less at any stage during device fabrication.

Usually, the amount of change in the warpage during the device manufacturing process is about 110 μm in the convex direction. Therefore, the initial warpage of the epitaxial wafer when entering the device process must be 40 μm or less in the convex direction.

As described above, when an epitaxial wafer is manufactured, a warp occurs due to a difference in lattice constant. In particular, when a thick epitaxial layer having a thickness of 100 μm or more is formed, the warp of the epitaxial wafer is reduced by 40 μm in the prior art.
It was difficult to control it below m.

For example, in a 150 mmφ wafer used for a high withstand voltage power device such as an IGBT, a low-concentration N ⁻ epitaxial layer (impurity concentration of about 5 × 10 ¹⁸ atoms / cm ³ ) is formed on a high-concentration P ⁺ substrate (impurity concentration of about 5 × 10 ¹⁸ atoms / cm ³ ). FIG. 6 shows the amount of warpage when ¹³ atoms / cm ³ is deposited. That is, the horizontal axis in FIG. 6 indicates the thickness (μm) of the epitaxial layer in the N ^{− on} P ⁺ type epitaxial wafer, and the vertical axis indicates the amount of warpage (μm) of the epitaxial wafer, that is, the amount of change in warpage. The straight line 60 in the figure shows the relationship between the thickness of the epitaxial layer and the magnitude of the warpage that occurs at that time, and the magnitude of the warp change is proportional to the thickness of the epitaxial layer. For example, using a substrate having a diameter of 150 mmφ with a warp of 0 μm and depositing an epitaxial layer having a thickness of 100 μm, a warp of 40 μm is generated.

FIGS. 7 and 8 show the distribution of the warpage of the main surface (film formation surface) of the 150 mmφ wafer immediately before the epitaxial film formation step. FIG. 7 shows the conventional case and FIG. 8 shows the case of the present invention. is there. The horizontal axis is the amount of warpage (μm)
, The convex warpage is positive, and the concave warpage is negative. The vertical axis indicates frequency (number of sheets). Conventionally, since the direction of the warpage of a wafer is not specified, as shown in FIG. 7, the wafer frequency indicating the convex direction and the concave direction shows the same distribution in almost half each. In the present invention, since the direction of warpage of the main surface of the wafer is aligned in the concave direction as described above, a frequency distribution as shown in FIG. 8 is shown.

Next, FIG. 9 (conventional) shows the warp distribution of an epitaxial wafer when an N ⁻ epitaxial layer having a thickness of 100 μm is formed on the P ⁺ wafer having the warp distribution shown in FIGS.
And FIG. 10 (the present invention). As described above, when a 100 μm thick N ⁻ epitaxial layer is formed on a P ⁺ wafer, a warp change of 40 μm occurs in the convex direction. Therefore, the frequency distribution of the magnitude of the warpage after the film formation is shown in FIGS. Become like FIG. 9 and FIG. 10 show the warp distribution of the epitaxial wafer at the initial stage when the device process is introduced. In the prior art, the warpage exceeds 40 μm in about half, whereas in the case of the present invention, the total number can be suppressed to 40 μm or less.

As a result, even if the epitaxial wafer of the present invention goes through the steps of device fabrication such as diffusion, oxidation and protection film deposition, the absolute value of the warp does not exceed 150 μm, and the PEP step is processed without any abnormality. It became possible. In the prior art, about half or more of the epitaxial wafers were in the middle of the device process and the warp exceeded 150 μm, so it was impossible to perform about half of the epitaxial wafers until the final step of device manufacturing. It has become possible to process the epitaxial wafer up to the final process. As a result, a great improvement in device yield and material efficiency could be realized.

In the above embodiment, the step of identifying the unevenness of the warp shape on the main surface of the wafer includes forming the first and second orientation flats on the wafer during the slicing step, and forming the first and second orientation flats on the wafer. After making it easy to distinguish the main surface from the main surface, before the mirror polishing step, a warp measurement is performed by sampling, and the unevenness of the first main surface (therefore, the second main surface) is known, and the first or second surface is measured. Which of the principal surfaces is to be the film-forming surface has been determined. The division between the first main surface and the second main surface of the wafer may be performed by a method of providing a plurality of cuts asymmetrically in an invalid area of the wafer instead of the above-mentioned orientation flat.

The step of identifying the unevenness of the warp shape on the main surface of the wafer is not limited to the above embodiment. For example,
If the warpage measurement may be performed on all the wafers, or if the arrangement of the wafers is always constant due to the automation of the process, the above-described means for separating the front and back of the wafer is unnecessary. The order in which the identification step is performed is not necessarily limited to the step before the mirror polishing step. If the step is performed before the epitaxial film formation step, the identification step can be performed in a desired order in consideration of productivity.

[0044]

As described above in detail, in the present invention, the direction of the warpage of the main surface (film formation surface) of the wafer, which has not been conventionally defined, is changed to the direction opposite to the direction of the warp change caused by epitaxial growth. By aligning the directions, the change in the warp during the epitaxial growth was canceled, and the warp of the epitaxial wafer was reduced. According to the present invention, even in a device manufacturing process using an epitaxial wafer in which a thick epitaxial layer is formed on a large-diameter wafer, a method of manufacturing an epitaxial wafer having sufficiently small warpage that does not hinder the process can be provided. .

[Brief description of the drawings]

FIG. 1 is a process flow chart showing an outline of an embodiment of a manufacturing method of the present invention.

FIG. 2 is a perspective view of an ingot used in the embodiment.

FIG. 3 is a plan view of a wafer used in the embodiment.

FIG. 4A is a cross-sectional view of a P ⁺ wafer, and FIG. 4B is a cross-sectional view of an N ⁻ onP ⁺ epitaxial wafer when the present invention is applied to the production of an N ^{− on} P ⁺ type epitaxial wafer. FIG.

FIG. 5A is a cross-sectional view of an N ⁺ wafer, and FIG. 5B is a cross-sectional view of an N ⁻ on N ⁺ epitaxial wafer when the present invention is applied to the manufacture of an N ^{− on} N ⁺ type epitaxial wafer. FIG.

FIG. 6 is a diagram showing a relationship between the thickness of an epitaxial layer and the amount of warpage at that time.

FIG. 7 is a distribution diagram of the magnitude of warpage of a main surface of a wafer (epitaxial film formation surface) in a conventional example.

FIG. 8 is a distribution diagram of the magnitude of warpage of a wafer main surface (epitaxial film formation surface) in an example of the present invention.

FIG. 9 is a distribution diagram of the magnitude of warpage of an epitaxial wafer after an epitaxial layer is formed on the wafer of FIG. 7;

FIG. 10 is a distribution diagram of the magnitude of warpage of an epitaxial wafer after an epitaxial layer is formed on the wafer of FIG. 8;

11 (a) is a D-MOSFET, FIG. 11 (b)
FIG. 1 is a cross-sectional view illustrating an example of an epitaxial wafer used for an IGBT.

[12] N ⁺ N on the wafer ^- a view for explaining the direction of the warp when the epitaxial layer is formed, FIG. (A) is a cross-sectional view of the N ⁺ wafer, FIG. (B) is N ^- Onn It is sectional drawing of a ⁺ type epitaxial wafer.

[13] P ⁺ wafer on the N ^- a view for explaining the direction of the warp when the epitaxial layer is formed, FIG. (A) is a cross-sectional view of the P ⁺ wafers, FIG (b) is N ^- ONp It is sectional drawing of a ⁺ type epitaxial wafer.

FIG. 14 is a sectional view showing a schematic configuration of a power D-MOSFET.

FIG. 15 is a cross-sectional view illustrating a schematic configuration of an IGBT.

[Explanation of symbols]

1,11,21,31,41 Wafer 2,12a, 12b Epitaxial layer 22,32,42 Epitaxial layer 20 Ingot 21a, 21b Orientation flat 30,40 Epitaxial wafer 31b, 41b Main surface of wafer

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-5-82405 (JP, A) JP-A-3-60116 (JP, A) JP-A-2-220431 (JP, A) JP-A-2- 62032 (JP, A) JP-A-1-256126 (JP, A) JP-A-63-236308 (JP, A) JP-A-62-196813 (JP, A) JP-A-57-102008 (JP, A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/20-21/208 H01L 21/02 H01L 21/336

Claims (1)

(57) [Claims] In a method for manufacturing a semiconductor epitaxial substrate, wherein an epitaxial layer having a lattice constant different from that of the substrate is formed on a semiconductor substrate, a step of identifying a warp-shaped unevenness on a main surface of the semiconductor substrate; When the lattice constant is larger than the lattice constant of the substrate, it is on the main surface of the substrate having a concave warp shape, and when the lattice constant of the epitaxial layer is smaller than the lattice constant of the substrate, the convexity of the substrate is higher. Forming an epitaxial layer on a main surface having a warped shape of a mold, respectively.