JP2001005776A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2001005776A5 JP2001005776A5 JP2000131103A JP2000131103A JP2001005776A5 JP 2001005776 A5 JP2001005776 A5 JP 2001005776A5 JP 2000131103 A JP2000131103 A JP 2000131103A JP 2000131103 A JP2000131103 A JP 2000131103A JP 2001005776 A5 JP2001005776 A5 JP 2001005776A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU0050 | 1993-07-20 | ||
| AUPQ0050 | 1999-04-29 | ||
| AUPQ0050A AUPQ005099A0 (en) | 1999-04-29 | 1999-04-29 | Sequential bus architecture |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001005776A JP2001005776A (ja) | 2001-01-12 |
| JP2001005776A5 true JP2001005776A5 (US07205300-20070417-C00007.png) | 2007-06-14 |
| JP4761487B2 JP4761487B2 (ja) | 2011-08-31 |
Family
ID=3814250
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000131103A Expired - Fee Related JP4761487B2 (ja) | 1999-04-29 | 2000-04-28 | バスアーキテクチャ及びそれを用いた情報処理装置 |
Country Status (5)
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6934785B2 (en) * | 2000-12-22 | 2005-08-23 | Micron Technology, Inc. | High speed interface with looped bus |
| US7032134B2 (en) * | 2001-03-28 | 2006-04-18 | Intel Corporation | Microprocessor design support for computer system and platform validation |
| US7103008B2 (en) * | 2001-07-02 | 2006-09-05 | Conexant, Inc. | Communications system using rings architecture |
| US20030172190A1 (en) * | 2001-07-02 | 2003-09-11 | Globespanvirata Incorporated | Communications system using rings architecture |
| JP4838458B2 (ja) * | 2001-09-13 | 2011-12-14 | 富士通セミコンダクター株式会社 | 半導体装置 |
| KR100477641B1 (ko) * | 2002-01-15 | 2005-03-23 | 삼성전자주식회사 | 버스 시스템 및 그 데이터 전송경로 결정방법 |
| US7113488B2 (en) * | 2002-04-24 | 2006-09-26 | International Business Machines Corporation | Reconfigurable circular bus |
| US7360007B2 (en) * | 2002-08-30 | 2008-04-15 | Intel Corporation | System including a segmentable, shared bus |
| US20070027485A1 (en) * | 2005-07-29 | 2007-02-01 | Kallmyer Todd A | Implantable medical device bus system and method |
| US20070076502A1 (en) * | 2005-09-30 | 2007-04-05 | Pyeon Hong B | Daisy chain cascading devices |
| US7652922B2 (en) | 2005-09-30 | 2010-01-26 | Mosaid Technologies Incorporated | Multiple independent serial link memory |
| EP1932158A4 (en) | 2005-09-30 | 2008-10-15 | Mosaid Technologies Inc | MEMORY WITH OUTPUT CONTROL |
| US20080263248A1 (en) * | 2007-04-20 | 2008-10-23 | Harriman David J | Multi-drop extension for a communication protocol |
| US9035957B1 (en) * | 2007-08-15 | 2015-05-19 | Nvidia Corporation | Pipeline debug statistics system and method |
| EP2372490A1 (en) * | 2010-03-31 | 2011-10-05 | Robert Bosch GmbH | Circuit arrangement for a data processing system and method for data processing |
| DE102010003521A1 (de) * | 2010-03-31 | 2011-10-06 | Robert Bosch Gmbh | Modulare Struktur zur Datenverarbeitung |
| US11127110B2 (en) * | 2017-03-01 | 2021-09-21 | Arm Limited | Data processing systems |
| CN111522757B (zh) * | 2020-04-23 | 2023-08-22 | 上海琪云工业科技有限公司 | 一种基于i2c总线的中断读取与清除的控制方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4378589A (en) * | 1976-12-27 | 1983-03-29 | International Business Machines Corporation | Undirectional looped bus microcomputer architecture |
| US4263736A (en) * | 1978-10-11 | 1981-04-28 | Colorado Time Systems, Inc. | Modular display system |
| US4356404A (en) * | 1981-05-26 | 1982-10-26 | Gte Automatic Electric Labs Inc. | Circuit for equipping a variable number of bus units on a closed loop bus |
| US4641308A (en) * | 1984-01-03 | 1987-02-03 | Texas Instruments Incorporated | Method of internal self-test of microprocessor using microcode |
| US4816993A (en) * | 1984-12-24 | 1989-03-28 | Hitachi, Ltd. | Parallel processing computer including interconnected operation units |
| DE3603751A1 (de) * | 1986-02-06 | 1987-08-13 | Siemens Ag | Informationsuebergabesystem zur uebergabe von binaeren informationen |
| FR2605768B1 (fr) * | 1986-10-23 | 1989-05-05 | Bull Sa | Dispositif de commande de bus constitue par plusieurs segments isolables |
| US4916647A (en) * | 1987-06-26 | 1990-04-10 | Daisy Systems Corporation | Hardwired pipeline processor for logic simulation |
| JPH0646413B2 (ja) * | 1987-08-10 | 1994-06-15 | 日本電気株式会社 | デ−タ処理プロセッサ |
| US5119481A (en) * | 1987-12-22 | 1992-06-02 | Kendall Square Research Corporation | Register bus multiprocessor system with shift |
| JPH01274539A (ja) * | 1988-04-27 | 1989-11-02 | Fujitsu Ltd | リングネットワーク |
| US5347515A (en) * | 1992-03-27 | 1994-09-13 | Pittway Corporation | Method and apparatus for global polling having contention-based address identification |
| US5375097A (en) * | 1993-06-29 | 1994-12-20 | Reddy; Chitranjan N. | Segmented bus architecture for improving speed in integrated circuit memories |
| GB9510509D0 (en) * | 1995-05-24 | 1995-07-19 | Thomson Consumer Electronics | A digital data bus system including arbitration |
| JPH0991262A (ja) * | 1995-09-20 | 1997-04-04 | Fuji Xerox Co Ltd | マルチプロセッサシステム |
| JP3202648B2 (ja) * | 1997-04-11 | 2001-08-27 | 甲府日本電気株式会社 | データ転送装置およびデータ転送システム |
-
1999
- 1999-04-29 AU AUPQ0050A patent/AUPQ005099A0/en not_active Abandoned
-
2000
- 2000-04-21 US US09/553,856 patent/US6662256B1/en not_active Expired - Lifetime
- 2000-04-28 DE DE60041300T patent/DE60041300D1/de not_active Expired - Lifetime
- 2000-04-28 EP EP00303602A patent/EP1049021B1/en not_active Expired - Lifetime
- 2000-04-28 JP JP2000131103A patent/JP4761487B2/ja not_active Expired - Fee Related
