JP2000323986A - 位相ロック装置及び位相ロック方法 - Google Patents
位相ロック装置及び位相ロック方法Info
- Publication number
- JP2000323986A JP2000323986A JP2000121417A JP2000121417A JP2000323986A JP 2000323986 A JP2000323986 A JP 2000323986A JP 2000121417 A JP2000121417 A JP 2000121417A JP 2000121417 A JP2000121417 A JP 2000121417A JP 2000323986 A JP2000323986 A JP 2000323986A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- phase
- lock
- component
- amplitude
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/101—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop
- H03L7/102—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop the additional signal being directly applied to the controlled loop oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/14—Preventing false-lock or pseudo-lock of the PLL
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US299705 | 1994-08-31 | ||
| US09/299,705 US6084481A (en) | 1999-04-26 | 1999-04-26 | Phase locking method and apparatus using switched drive signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000323986A true JP2000323986A (ja) | 2000-11-24 |
| JP2000323986A5 JP2000323986A5 (enExample) | 2007-06-14 |
Family
ID=23155914
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000121417A Pending JP2000323986A (ja) | 1999-04-26 | 2000-04-21 | 位相ロック装置及び位相ロック方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6084481A (enExample) |
| JP (1) | JP2000323986A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6585338B2 (en) | 2000-12-22 | 2003-07-01 | Honeywell International Inc. | Quick start resonant circuit control |
| US9276622B2 (en) | 2013-03-14 | 2016-03-01 | Qualcomm Incorporated | Local oscillator (LO) generator with multi-phase divider and phase locked loop |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3158820A (en) * | 1961-05-01 | 1964-11-24 | Avco Corp | Electronic servo system for automatically locking two alternating current sources inphase |
-
1999
- 1999-04-26 US US09/299,705 patent/US6084481A/en not_active Expired - Lifetime
-
2000
- 2000-04-21 JP JP2000121417A patent/JP2000323986A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US6084481A (en) | 2000-07-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6680632B1 (en) | Method/architecture for a low gain PLL with wide frequency range | |
| EP1466410B1 (en) | Low-jitter loop filter for a phase-locked loop system | |
| EP1115198B1 (en) | Frequency detector and phase-locked loop circuit including the detector | |
| US5384551A (en) | Fast locking phase locked loop frequency synthesizer | |
| US4280104A (en) | Phase locked loop system with improved acquisition | |
| JPH0645921A (ja) | 位相ロックループ | |
| US7599462B2 (en) | Hybrid analog/digital phase-lock loop with high-level event synchronization | |
| US7680236B1 (en) | Hybrid analog/digital phase-lock loop for low-jitter synchronization | |
| US5917352A (en) | Three-state phase-detector/charge pump with no dead-band offering tunable phase in phase-locked loop circuits | |
| US7084709B1 (en) | Hybrid analog/digital phase lock loop frequency synthesizer | |
| US6703878B2 (en) | Input jitter attenuation in a phase-locked loop | |
| Tang et al. | A new fast-settling gearshift adaptive PLL to extend loop bandwidth enhancement in frequency synthesizers | |
| US6621354B1 (en) | Feedback methods and systems for rapid switching of oscillator frequencies | |
| AU713906B2 (en) | Data clock recovery circuit | |
| JP2000323986A (ja) | 位相ロック装置及び位相ロック方法 | |
| JP2002043939A (ja) | Pll周波数シンセサイザ回路 | |
| CN107508596B (zh) | 一种带有辅助捕获装置的多环锁相电路及频率预置方法 | |
| US6008699A (en) | Digital receiver locking device | |
| US7598816B2 (en) | Phase lock loop circuit with delaying phase frequency comparson output signals | |
| JPH04111533A (ja) | Pll回路 | |
| JP2000078001A (ja) | デジタルpll回路 | |
| JP3230501B2 (ja) | 周波数シンセサイザ | |
| US3886455A (en) | Phase lock loop including an oscillating sub-loop | |
| EP0968568B1 (en) | Emulating narrow band phase-locked loop behavior on a wide band phase-locked loop | |
| CN1148877C (zh) | 数字接收机锁定装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070420 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20070420 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090910 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090916 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20100225 |