JP2000307424A - Electronic circuit and liquid crystal display device using same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To correct variance in offset among DA converters even in such a case of having variance of offset and to equalize the characteristics of all the DA converters, and then to make a uniform display which is free of variance on the whole by driving the liquid crystal display device. SOLUTION: Multiple DA converters 1 are arranged horizontally and each have a latch circuit 2 which stores a digital signal, a memory circuit 3 which stores offset correction data, and an adding circuit 4 which adds the offset correction data to the digital signal. The circuit at the left end measures the offset quantity of each DA converter 1 and converts the offset quantity into digital data and is composed of the latch circuit 2, DA converters 1, and an encoder circuit 6 which generates digital offset correction data with the output of a comparator 5 comparing the analog outputs of the horizontally arranged DA converters 1 with the analog output of the DA converter in the offset quantity measuring circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit comprising a plurality of DA converters and a liquid crystal display device using the same, and in particular, each DA converter has means for storing digital data for correcting an offset amount. And a means for adding or subtracting digital data for correcting the offset amount to a digital input signal.
The present invention relates to an electronic circuit including an A converter and a liquid crystal display device using the same.

[0002]

2. Description of the Related Art Conventionally, a circuit using a plurality of D / A converters is composed of only a data latch circuit and a D / A converter as shown in FIG. FIG. 8 shows a case where such a circuit is applied to a liquid crystal display device. In the figure, a plurality of DA converters are used as means for transferring a video signal to a plurality of vertical signal lines.

[0003]

However, the above-mentioned prior art has the following problems. In other words, the characteristics of each DA converter vary considerably,
In particular, when an amplifier having a CMOS configuration is used for the analog buffer circuit in the output stage, the DC offset greatly differs for each amplifier. One DA signal always has one DA
Since a signal is written from the converter, the characteristic variation of the DA converter is visually recognized as it is as a variation in image display. More specifically, a vertical band-shaped pattern is visually recognized for each block of the DA converter, thereby deteriorating the display quality. There was a problem.

Accordingly, an object of the present invention is to provide a circuit capable of correcting even if there is offset variation of a DA converter and making the characteristics of all the DA converters the same. I have. A further object of the present invention is to realize a liquid crystal display device having uniform display characteristics without variation throughout by applying the same to a liquid crystal display device.

[0005]

An electronic circuit according to the present invention for solving the above problems includes a plurality of first DA converters, each of which converts digital data for correcting an offset amount. An offset storage unit for storing the digital input signal; and an arithmetic unit for adding or subtracting digital data for correcting the offset amount to the digital input signal.

[0006]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an electronic circuit according to the present invention. In the figure, a plurality of DA converters 1 are arranged in the horizontal direction of the figure, each of which has a latch circuit 2 for storing a digital signal, a memory circuit 3 for storing offset correction data,
An adder 4 is provided for adding the offset correction data to the digital signal. The circuit shown at the left end of the figure is a circuit that measures the amount of offset of each DA converter and converts the amount of offset into digital data, and a latch circuit 2 that stores digital signals and converts digital data into analog signals. An encoder circuit 6 that generates digital offset correction data based on the output of a comparator 5 that compares the analog output of the DA converter 1 and the analog output of the DA converter 1 arranged in the horizontal direction with the analog output of the DA converter in the offset amount measuring circuit. Made up of

Next, the operation of the circuit of the present invention will be described. First, the same level digital data is transferred to each data latch circuit. At this time, the memory circuit storing each offset correction data is reset to a predetermined level. Each DA
Although digital signals of the same level are transferred to the converters, the analog outputs of the respective DA converters have different analog output values because an offset amount unique to each DA converter is added. Where each D
The switches connected to the output of the A converter are sequentially turned on. The analog output of each D / A converter is the D / A in the offset correction data generation A / D converter circuit.
The offset amount of the analog output of each DA converter with respect to the analog output of the D / A converter in the offset correction AD converter is measured, and the offset amount is output as digital data by an encoder circuit. The data is sequentially written to a memory circuit provided for each converter.

By the above operation, the data corresponding to the offset amount for each DA converter is stored in the offset correction memory circuit provided for each DA converter, and all the DA converters thereafter obtain the same characteristics. Will be able to

FIG. 2 is a block diagram showing an embodiment in which the electronic circuit of the present invention is applied to a liquid crystal display device. In the figure, an analog output of a DA converter is transferred to a vertical signal line via a signal transfer switch. The pixel portion includes a pixel transistor, an additional capacitor, and a liquid crystal. Scan lines are sequentially selected by an output of the vertical shift register, the pixel transistor is turned on, and a signal is written to a pixel electrode.
The above-described operation for offset correction may be performed when the power is turned on, and more preferably during the blanking period for each field.

As described above, even if there is a variation in the characteristics of the DA converter, correction is made for each of them, so that a uniform display can be obtained as a whole.

FIG. 3, FIG. 4 and FIG. 5 show the D of the electronic circuit of the present invention.
It is a block diagram of an A converter. In the figure, the digital input signal is 8 bits, the upper 3 bits and the lower 5 bits.
An example is shown in which DA conversion is performed by separating bits. In the present embodiment, the offset correction is performed by (1/1) of the digital input signal.
2) Possible up to LSB.

In the circuit of FIG. 4, ten reference voltages are generated by a series resistor division and a buffer circuit.

In the circuit shown in FIG. 5, the upper three bits of the digital signal are decoded, and two of the ten reference voltage sources are selected from one another.

Next, the lower 5 bits of the digital input signal,
The upper 4 bits of the 5-bit offset correction signal are added to generate 6-bit data. The two reference voltages selected earlier are input to the illustrated 7-bit D / A converter, and D / A conversion is performed within the range of the two reference voltages. Here, 6-bit data obtained by adding the lower 5 bits of the digital input signal and the upper 4 bits of the offset correction digital signal is input to the upper 6 bits of the 7-bit DA converter, and The lower 1 bit is input to the lower 1 bit of the 7-bit DA converter. As described above, the offset correction can be performed with an accuracy of 1/2 LSB of the digital input signal, and the correction range can be up to 15 LSB of the input digital signal.

FIG. 6 is a block diagram of an AD converter circuit of an electronic circuit according to the present invention. In this embodiment, the output of the shift register circuit is sequentially input from the most significant bit, the data obtained by adding the data and the digital input data is DA converted, and the analog output is sequentially compared with the analog output of a DA converter (not shown). By repeating this operation up to the least significant bit of the DA converter, digital correction data is determined. The result is encoded by an encoder circuit and stored in a memory for each DA converter.

Although the embodiment of the present invention has been described above, the present invention is not limited to application to a liquid crystal display device, but may be applied to a voice processing circuit, an image processing circuit, and the like.

[0018]

According to the present invention described above, even if there is a variation in the offset amount of the D / A converter, a unique correction can be made for each of the D / A converters. When such a circuit is applied to a liquid crystal display device, a uniform display can be obtained throughout.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing an embodiment of an electronic circuit according to the present invention.

FIG. 2 is a block diagram showing an embodiment of a liquid crystal display device according to the present invention.

FIG. 3 is a circuit block diagram showing a DA converter according to the present invention.

FIG. 4 is a circuit block diagram showing a DA converter according to the present invention.

FIG. 5 is a circuit block diagram showing a DA converter according to the present invention.

FIG. 6 is a circuit diagram showing an embodiment of an AD converter circuit unit according to the present invention.

FIG. 7 is a block diagram showing a circuit using a conventional DA converter.

FIG. 8 is a block diagram showing a case where a circuit of the related art is applied to a liquid crystal display device.

[Explanation of symbols]

 1 DA converter 2 Latch circuit 3 Memory circuit 4 Addition circuit 5 Comparator 6 Encoder circuit

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) G09G 3/36 G09G 3/36 H03M 1/66 H03M 1/66 C

Claims (7)

[Claims] 1. An offset storage unit for storing digital data for correcting an offset amount, the first DA converter including a plurality of first DA converters, and correcting the offset amount with respect to the digital input signal. An electronic circuit for adding or subtracting digital data for performing the operation. 2. An AD for correcting the offset amount.
The electronic circuit according to claim 1, further comprising at least one converter, wherein an output of the AD converter is stored in the offset storage unit. 3. An electronic circuit including a plurality of first DA converters, wherein each of the first DA converters includes: an offset storage unit that stores digital data for correcting an offset amount; Calculating means for adding or subtracting digital data for correcting the offset amount; and at least one A for correcting the offset amount
A D converter, the A / D converter further comprising: one second D / A converter; a shift register for transferring a signal in order from an upper bit of the digital signal; an adding unit for adding a digital input signal and an output signal of the shift register; Means for converting the added digital signal into an analog signal by the second DA converter and comparing the analog output of the first DA converter with the analog output of the second DA converter; and digital offset correction by the output of the comparing means. An electronic circuit, comprising: encoder means for generating a signal; and storing an output of the AD converter in the offset storage means. 4. The first DA converter is capable of inputting a bit number m that is at least 2 bits larger than the bit number n of a digital signal input from the outside, and the lower L bits (L> = 1) of the DA converter. Inputs the lower L bits of the k-bit offset correction data and outputs the upper (m-L)
4. The bit according to claim 1, wherein a digital signal obtained by adding an n-bit digital input signal and a higher-order (kL) -bit signal of an offset correction signal is input. Electronic circuit. 5. The first DA converter has a plurality of continuous-level reference voltage generating circuits, and outputs the i-th of the continuous reference voltages according to the upper j-bit signal of the n-bit digital input signal. 4. The electron according to claim 1, wherein the (i + 2) -th two are selected and further divided between the two reference voltage levels by a lower n-j bit signal. circuit. 6. An active matrix circuit substrate having a plurality of scanning lines and a plurality of signal lines, and having a pixel electrode connected to an intersection of the plurality of scanning lines and the plurality of signal lines via a switch, 6. A liquid crystal display device comprising a liquid crystal sandwiched between a counter substrate and a liquid crystal display device, wherein the means for supplying a video signal to the plurality of signal lines is the electronic circuit according to any one of claims 1 to 5. Characteristic liquid crystal display device. 7. The liquid crystal display device according to claim 6, wherein the active matrix circuit and an electronic circuit for supplying a video signal to the signal line are formed on the same substrate.