JP2000299358A - Manufacture of film carrier tape for mounting semiconductor device - Google Patents
Manufacture of film carrier tape for mounting semiconductor deviceInfo
- Publication number
- JP2000299358A JP2000299358A JP11108480A JP10848099A JP2000299358A JP 2000299358 A JP2000299358 A JP 2000299358A JP 11108480 A JP11108480 A JP 11108480A JP 10848099 A JP10848099 A JP 10848099A JP 2000299358 A JP2000299358 A JP 2000299358A
- Authority
- JP
- Japan
- Prior art keywords
- carrier tape
- semiconductor element
- film carrier
- mounting
- base film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Abstract
Description
【０００１】[0001]
【発明の属する技術範囲】この発明は、半導体素子実装
フィルムキャリアテープの製造方法に関し、特に、ベー
スフィルムと銅などの金属箔とからなる２層フィルムキ
ャリアテープを用いた半導体素子実装フィルムキャリア
テープの製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor element-mounted film carrier tape, and more particularly to a method for manufacturing a semiconductor element-mounted film carrier tape using a two-layer film carrier tape comprising a base film and a metal foil such as copper. It relates to a manufacturing method.
【０００２】[0002]
【従来の技術】近年、ベースフィルムと銅箔とを接着剤
を用いずに層状に形成した２層フィルムキャリアテープ
を用いた半導体素子実装フィルムキャリアテープは、ベ
ースフィルムと銅箔との間に接着剤層を有する３層フィ
ルムキャリアテープを用いた半導体素子実装フィルムキ
ャリアテープに比べて屈曲性に優れており、使い勝手の
よい半導体素子実装フィルムキャリアテープとして注目
されている。2. Description of the Related Art In recent years, a semiconductor element mounting film carrier tape using a two-layer film carrier tape in which a base film and a copper foil are formed in a layer without using an adhesive is bonded between the base film and the copper foil. Compared with a semiconductor element mounting film carrier tape using a three-layer film carrier tape having an agent layer, the film carrier tape is attracting attention as an easy-to-use semiconductor element mounting film carrier tape having excellent flexibility.
【０００３】従来の２層フィルムキャリアテープを用い
た半導体素子実装フィルムキャリアテープの製造方法に
ついて、以下簡単に説明する。A method of manufacturing a film carrier tape for mounting a semiconductor element using a conventional two-layer film carrier tape will be briefly described below.
【０００４】まず、２層フィルムキャリアテープの両端
部にパンチングにて、テープを搬送するためのスプロケ
ットホールを形成する。次に、２層フィルムキャリアテ
ープの銅箔側の表面にレジストを塗布する。その後、レ
ジスト面側から露光、現像、エッチングを行い、不要な
銅箔部分を除去して所望のリードパターンを形成する。First, sprocket holes for transporting a tape are formed at both ends of a two-layer film carrier tape by punching. Next, a resist is applied to the copper foil side surface of the two-layer film carrier tape. Thereafter, exposure, development, and etching are performed from the resist surface side, and unnecessary copper foil portions are removed to form a desired lead pattern.
【０００５】さらに、リードパターンにメッキ処理を施
した後に、半導体素子を実装する実装範囲に、異方性導
電ペースト材などの充填材を塗布する。そして、リード
パターンのリード部と半導体素子のバンプとを合わせ
て、熱圧着などの方法で半導体素子を実装する。Further, after plating the lead pattern, a filler such as an anisotropic conductive paste material is applied to a mounting area for mounting the semiconductor element. Then, the semiconductor element is mounted by a method such as thermocompression bonding by combining the lead of the lead pattern with the bump of the semiconductor element.
【０００６】[0006]
【発明が解決しようとする課題】上記従来の半導体素子
実装フィルムキャリアテープにおいて、高温高湿の環境
で、充填材が、半導体素子や２層フィルムキャリアテー
プのベースフィルムから剥離するといった半導体素子の
実装不良が発生する場合があった。SUMMARY OF THE INVENTION In the above-mentioned conventional film carrier tape for mounting a semiconductor element, in a high-temperature and high-humidity environment, the filler is peeled off from the base film of the semiconductor element or the two-layer film carrier tape. In some cases, defects occurred.
【０００７】このように半導体素子の実装不良がある
と、半導体素子のバンプとリードパターンのリード部が
離れて導通不良を起こしたり、半導体素子の電極が直接
湿気にさらされて腐食したりという障害の原因になる。[0007] When there is a defective mounting of the semiconductor element, the bumps of the semiconductor element are separated from the lead portions of the lead pattern to cause conduction failure, or the electrodes of the semiconductor element are directly exposed to moisture and corroded. Cause
【０００８】したがって、この発明は、高温高湿環境で
も、充填材が剥離せずに、半導体素子の実装不良のな
い、品質の安定した半導体素子実装フィルムキャリアテ
ープの製造方法を提供することを課題とする。Accordingly, an object of the present invention is to provide a method for producing a semiconductor element-mounted film carrier tape having a stable quality without causing a peeling of a filler even in a high-temperature and high-humidity environment and having no defective mounting of a semiconductor element. And
【０００９】[0009]
【課題を解決するための手段】上記課題を解決するため
に、本願の発明者は、上述の充填材の剥離の原因を次の
ように考えた。すなわち、ポリイミドなどの材料からな
るベースフィルムは比較的吸水性の高い材料である。そ
して、高温高湿環境によって、ベースフィルムから吸湿
され、ベースフィルムと充填材の間などに侵入した水分
が、その後に蒸発して気泡となり、充填材の接着力を弱
める。Means for Solving the Problems In order to solve the above problems, the inventor of the present application considered the cause of the separation of the filler as follows. That is, the base film made of a material such as polyimide is a material having relatively high water absorption. Then, in a high-temperature and high-humidity environment, moisture absorbed from the base film and invaded between the base film and the filler or the like is subsequently evaporated to bubbles, thereby weakening the adhesive force of the filler.
【００１０】この発明は、上記課題を解決するためにな
されたものであり、すなわち、添付図面に付した符号を
カッコ内に付記すると、この発明は、ベースフィルム
（４）と金属箔（３）とが層状に形成された２層フィル
ムキャリアテープ（２）の金属箔（３）の不要な部分を
除去してベースフィルム（４）上にリードパターン（３
ａ）を形成する工程と、充填材（９）を介在してリード
パターン（３ａ）上に半導体素子（１）を実装する工程
とを有する半導体素子実装フィルムキャリアテープの製
造方法において、半導体素子（１）を実装する工程前
に、２層フィルムキャリアテープ（２）の半導体素子
（１）の実装範囲（１０）内であって、ベースフィルム
（４）の表面または裏面に剥離防止部（３ｂ）を形成す
る工程を備えたことを特徴とする半導体素子実装フィル
ムキャリアテープの製造方法である。The present invention has been made in order to solve the above-mentioned problems. That is, when the reference numerals in the attached drawings are added in parentheses, the present invention provides a base film (4) and a metal foil (3). An unnecessary portion of the metal foil (3) of the two-layer film carrier tape (2) formed in a layered form is removed to form a lead pattern (3) on the base film (4).
a) forming a semiconductor element-mounted film carrier tape including a step of forming a semiconductor element (1) on a lead pattern (3a) with a filler (9) interposed therebetween; Before the step of mounting 1), the separation preventing portion (3b) is provided on the front or back surface of the base film (4) within the mounting range (10) of the semiconductor element (1) of the two-layer film carrier tape (2). The method of manufacturing a film carrier tape for mounting a semiconductor element, the method further comprising:
【００１１】その際、剥離防止部（３ｂ）を形成する工
程を、リードパターン（３ａ）を形成する工程と合わせ
て、リードパターン（３ａ）とは異なる金属箔（３）の
部分をベースフィルム（４）面に残存させて形成するこ
とができる。At this time, the step of forming the peeling prevention portion (3b) is combined with the step of forming the lead pattern (3a), and a portion of the metal foil (3) different from the lead pattern (3a) is formed on the base film (3). 4) It can be formed to remain on the surface.
【００１２】また、剥離防止部（３ｂ）を形成する工程
を、リードパターン（３ａ）を形成する工程の後に、吸
水性の低い材料をベースフィルム（４）面に付着して形
成することができる。Further, the step of forming the peel preventing portion (3b) can be formed by adhering a material having low water absorption to the surface of the base film (4) after the step of forming the lead pattern (3a). .
【００１３】[0013]
【発明の実施の形態】この発明の実施の形態を図面によ
って説明する。図１〜４にて、２層フィルムキャリアテ
ープ上に半導体素子を実装して、半導体素子実装フィル
ムキャリアテープの製造が完了するまでの工程を説明す
る。Embodiments of the present invention will be described with reference to the drawings. The steps from mounting a semiconductor element on a two-layer film carrier tape to completing the manufacture of the semiconductor element-mounted film carrier tape will be described with reference to FIGS.
【００１４】まず、ポリイミドフィルムなどのベースフ
ィルム４と、銅箔などの金属箔３とが、蒸着などの方法
により、接着剤層を設けずに層状に形成された２層フィ
ルムキャリアテープ２に、図２に示すように、パンチン
グにて、テープを搬送するためのスプロケットホール５
を形成する。First, a two-layer film carrier tape 2 in which a base film 4 such as a polyimide film and a metal foil 3 such as a copper foil are formed in layers without providing an adhesive layer by a method such as vapor deposition, As shown in FIG. 2, sprocket holes 5 for transporting the tape by punching
To form
【００１５】次に、２層フィルムキャリアテープ２の金
属箔３側の表面にレジストを塗布する。そして、２層フ
ィルムキャリアテープ２のレジスト塗布面から、露光、
現像、エッチングを行うことにより、図３に示すよう
に、ベースフィルム４上に、リードパターン３ａと剥離
防止部３ｂとを形成する。Next, a resist is applied to the surface of the two-layer film carrier tape 2 on the metal foil 3 side. Then, from the resist-coated surface of the two-layer film carrier tape 2, exposure,
By performing development and etching, as shown in FIG. 3, a lead pattern 3a and a separation preventing portion 3b are formed on the base film 4.
【００１６】このように、２層フィルムキャリアテープ
２の金属箔３のうち、リードパターン３ａと剥離防止部
３ｂとのみが残存されて、それ以外の不要な部分は除去
される。ここで、金属箔であるリードパターン３ａと剥
離防止部３ｂとは、適度に間隔をあけて形成されてお
り、電気的に充分に絶縁が保たれている。As described above, in the metal foil 3 of the two-layer film carrier tape 2, only the lead pattern 3a and the separation preventing portion 3b remain, and other unnecessary portions are removed. Here, the lead pattern 3a, which is a metal foil, and the separation preventing portion 3b are formed at an appropriate distance from each other, and are sufficiently electrically insulated.
【００１７】その後、リードパターン３ａにメッキ処理
を施した後に、半導体素子１が実装される実装範囲１０
に、異方性導電ペースト材などの充填材９を塗布する。
そして、図４に示すように、リードパターン３ａのリー
ド部３ｃにバンプ１ａが当接するように位置を合わせ
て、半導体素子１を熱圧着などにより実装する。Then, after the lead pattern 3a is plated, the mounting area 10 on which the semiconductor element 1 is mounted is mounted.
Is applied with a filler 9 such as an anisotropic conductive paste material.
Then, as shown in FIG. 4, the semiconductor element 1 is mounted by thermocompression bonding or the like, so that the position is adjusted so that the bump 1a contacts the lead portion 3c of the lead pattern 3a.
【００１８】このような工程を経て、半導体素子１は、
図１に示すように、２層フィルムキャリアテープ２上に
実装されて、半導体素子実装フィルムキャリアテープと
なる。このように、半導体素子１の実装範囲１０の一部
に剥離防止部３ｂを設けているので、充填材９が吸水性
の高いベースフィルム４と直接接触する部分の面積を小
さくすることができる。Through these steps, the semiconductor element 1 is
As shown in FIG. 1, it is mounted on a two-layer film carrier tape 2 to form a semiconductor element mounting film carrier tape. As described above, since the separation preventing portion 3b is provided in a part of the mounting range 10 of the semiconductor element 1, the area of the portion where the filler 9 directly contacts the highly water-absorbing base film 4 can be reduced.
【００１９】そして、金属箔３は比較的吸水性が低いた
めに、高温高湿環境にて、ベースフィルム４から吸湿さ
れた水分が、金属箔３を超えて充填材９に達することが
少なくなる。こうして、高温高湿環境における充填材９
の剥離を少なくして、半導体素子１の実装不良を軽減す
ることができる。Since the metal foil 3 has a relatively low water absorption, the moisture absorbed from the base film 4 in the high-temperature and high-humidity environment rarely reaches the filler 9 beyond the metal foil 3. . Thus, the filler 9 in a high temperature and high humidity environment
Of the semiconductor element 1 can be reduced.
【００２０】なお、図示例では、リードパターン３ａを
形成する工程と合わせて、金属箔３ｂの一部を剥離防止
部３ｂとしてベースフィルム４上に残存させて形成した
が、その代わりに、リードパターン３ａを形成する工程
の後に、ソルダーレジストなどの比較的吸水性の低い材
料をベースフィルム４上に塗布したり、金属箔をメッキ
したりして剥離防止部３ｂを形成してもよい。In the illustrated example, a part of the metal foil 3b is left on the base film 4 as the anti-peeling part 3b in combination with the step of forming the lead pattern 3a. After the step of forming 3a, a material having relatively low water absorption, such as a solder resist, may be applied on the base film 4 or a metal foil may be plated to form the peel preventing portion 3b.
【００２１】また、図示例では、ベースフィルム４と充
填材９との境界、すなわちベースフィルム４の表面に、
剥離防止部３ｂを形成したが、図５に示すように、ベー
スフィルム４の裏面に、金属箔やソルダーレジストなど
の比較的吸水性の低い材料を付着させて剥離防止部３ｂ
を形成してもよい。この場合には、高温高湿環境にて、
ベースフィルム４自体への吸湿を防ぐことができ、充填
材９の剥離を軽減することができる。In the illustrated example, the boundary between the base film 4 and the filler 9, that is, the surface of the base film 4,
The anti-peeling portion 3b was formed. As shown in FIG. 5, a relatively low water-absorbing material such as a metal foil or a solder resist was adhered to the back surface of the base film 4 to form the anti-peeling portion 3b.
May be formed. In this case, in a high temperature and high humidity environment,
Moisture absorption into the base film 4 itself can be prevented, and peeling of the filler 9 can be reduced.
【００２２】さらに、図５に示す半導体素子実装フィル
ムキャリアテープは、ベースフィルム４の表裏面に金属
箔３を有する２層フィルムキャリアテープに対して、両
面からエッチングなどの処理を施して、ベースフィルム
４の表面にはリードパターン３ａを、裏面には剥離防止
部３ｂを残存させることによっても製造することができ
る。Further, the film carrier tape for mounting a semiconductor element shown in FIG. 5 is obtained by subjecting a two-layer film carrier tape having a metal foil 3 on the front and back surfaces of a base film 4 to a treatment such as etching from both sides. 4 can also be manufactured by leaving the lead pattern 3a on the front surface and leaving the separation preventing portion 3b on the back surface.
【００２３】また、図示例では、充填材９として異方性
導電ペースト材を用いて、半導体素子１を実装したが、
その代わりに、異方性導電フィルムやアンダーフィル材
などを用いて半導体素子１を実装する方法についても用
いることができる。In the illustrated example, the semiconductor element 1 is mounted using an anisotropic conductive paste as the filler 9.
Instead, a method of mounting the semiconductor element 1 using an anisotropic conductive film or an underfill material can be used.
【００２４】[0024]
【発明の効果】請求項１に係る発明によれば、２層フィ
ルムキャリアテープの半導体素子の実装範囲内におい
て、ベースフィルム面に剥離防止部を設ける工程を有し
ており、高温高湿環境でベースフィルムから充填材に達
する水分量を少なくしているので、充填材の剥離が少な
く半導体素子の実装不良を軽減し、品質の安定した半導
体素子実装フィルムキャリアテープの製造方法を提供す
ることができる。According to the first aspect of the present invention, a step of providing a separation preventing portion on the base film surface within the mounting range of the semiconductor element of the two-layer film carrier tape is provided. Since the amount of moisture reaching the filler from the base film is reduced, the peeling of the filler is reduced, the mounting failure of the semiconductor element is reduced, and a method of manufacturing a semiconductor element mounting film carrier tape with stable quality can be provided. .
【００２５】請求項２に係る発明によれば、２層フィル
ムキャリアテープの半導体素子の実装範囲内において、
リードパターンを形成する工程と合わせて、リードパタ
ーンとは異なる金属箔の部分をベースフィルム面に残存
させて剥離防止部を形成しており、高温高湿環境でベー
スフィルムから充填材に達する水分量を少なくしている
ので、充填材の剥離が少なく半導体素子の実装不良を軽
減し、製造工程数を増やすことなく、品質の安定した半
導体素子実装フィルムキャリアテープの製造方法を提供
することができる。According to the second aspect of the present invention, within the mounting range of the semiconductor element of the two-layer film carrier tape,
Along with the lead pattern forming process, a part of the metal foil different from the lead pattern is left on the base film surface to form an anti-peeling part, and the amount of moisture reaching the filler from the base film in a high temperature and high humidity environment Therefore, it is possible to provide a method for manufacturing a semiconductor element-mounted film carrier tape with stable quality without increasing the number of manufacturing steps, reducing the amount of peeling of the filler and reducing the number of manufacturing steps.
【００２６】請求項３に係る発明によれば、２層フィル
ムキャリアテープの半導体素子の実装範囲内において、
リードパターンを形成する工程の後に、吸水性の低い材
料をベースフィルム面に付着させて剥離防止部を形成し
ており、高温高湿環境でベースフィルムから充填材に達
する水分量を少なくしているので、充填材の剥離が少な
く半導体素子の実装不良を軽減し、剥離防止部の材料選
定の自由度が広く、品質の安定した半導体素子実装フィ
ルムキャリアテープの製造方法を提供することができ
る。According to the third aspect of the present invention, within the mounting range of the semiconductor element of the two-layer film carrier tape,
After the step of forming the lead pattern, a material having low water absorption is adhered to the base film surface to form a peel prevention portion, and the amount of moisture reaching the filler from the base film in a high temperature and high humidity environment is reduced. Therefore, it is possible to provide a method for manufacturing a semiconductor element-mounted film carrier tape which has less peeling of the filler material, reduces defective mounting of the semiconductor element, has a high degree of freedom in selecting a material for the anti-separation portion, and has stable quality.
【図面の簡単な説明】[Brief description of the drawings]
【図１】この発明により製造された半導体素子実装フィ
ルムキャリアテープの第１例を示す断面図である。FIG. 1 is a cross-sectional view showing a first example of a semiconductor device-mounted film carrier tape manufactured according to the present invention.
【図２】この発明によるパンチング工程後の２層フィル
ムキャリアテープを示す斜視図である。FIG. 2 is a perspective view showing a two-layer film carrier tape after a punching step according to the present invention.
【図３】この発明によるエッチング工程後の２層フィル
ムキャリアテープを示す斜視図である。FIG. 3 is a perspective view showing a two-layer film carrier tape after an etching step according to the present invention.
【図４】この発明による半導体素子実装時の２層フィル
ムキャリアテープを示す斜視図である。FIG. 4 is a perspective view showing a two-layer film carrier tape when a semiconductor element is mounted according to the present invention.
【図５】この発明により製造された半導体素子実装フィ
ルムキャリアテープの第２例を示す断面図である。FIG. 5 is a cross-sectional view showing a second example of the semiconductor element mounting film carrier tape manufactured according to the present invention.
【符号の説明】 １ 半導体素子 １ａ バンプ ２ ２層フィルムキャリアテープ ３ 金属箔 ３ａ リードパターン ３ｂ 剥離防止部 ３ｃ リード部 ４ ベースフィルム ５ スプロケットホール ９ 充填材 １０ 実装範囲[Description of Signs] 1 Semiconductor element 1a Bump 2 Two-layer film carrier tape 3 Metal foil 3a Lead pattern 3b Separation prevention part 3c Lead part 4 Base film 5 Sprocket hole 9 Filler 10 Mounting range
Claims (3)
された２層フィルムキャリアテープの該金属箔の不要な
部分を除去して前記ベースフィルム上にリードパターン
を形成する工程と、充填材を介在して前記リードパター
ン上に半導体素子を実装する工程とを有する半導体素子
実装フィルムキャリアテープの製造方法において、 前記半導体素子を実装する工程前に、前記２層フィルム
キャリアテープの前記半導体素子の実装範囲内であっ
て、前記ベースフィルムの表面または裏面に剥離防止部
を形成する工程を備えたことを特徴とする半導体素子実
装フィルムキャリアテープの製造方法。1. A two-layer film carrier tape in which a base film and a metal foil are formed in layers, a step of removing an unnecessary portion of the metal foil to form a lead pattern on the base film, and A step of mounting a semiconductor element on the lead pattern with a step of mounting the semiconductor element on the lead pattern, the mounting of the semiconductor element on the two-layer film carrier tape before the step of mounting the semiconductor element. A method for manufacturing a film carrier tape for mounting a semiconductor element, the method comprising: forming a peel prevention portion on the front surface or the back surface of the base film within the range.
リードパターンを形成する工程と合わせて、前記リード
パターンとは異なる前記金属箔の部分を前記ベースフィ
ルム面に残存させて形成したことを特徴とする請求項１
に記載の半導体素子実装フィルムキャリアテープの製造
方法。2. The method according to claim 1, wherein the step of forming the separation preventing portion is formed by leaving a part of the metal foil different from the lead pattern on the base film surface together with the step of forming the lead pattern. Claim 1.
5. The method for producing a film carrier tape for mounting a semiconductor element according to item 1.
リードパターンを形成する工程の後に、吸水性の低い材
料を前記ベースフィルム面に付着して形成したことを特
徴とする請求項１に記載の半導体素子実装フィルムキャ
リアテープの製造方法。3. The method according to claim 1, wherein the step of forming the separation preventing portion is formed by attaching a material having low water absorption to the base film surface after the step of forming the lead pattern. The manufacturing method of the semiconductor element mounting film carrier tape according to the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11108480A JP2000299358A (en) | 1999-04-15 | 1999-04-15 | Manufacture of film carrier tape for mounting semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11108480A JP2000299358A (en) | 1999-04-15 | 1999-04-15 | Manufacture of film carrier tape for mounting semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000299358A true JP2000299358A (en) | 2000-10-24 |
Family
ID=14485831
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11108480A Pending JP2000299358A (en) | 1999-04-15 | 1999-04-15 | Manufacture of film carrier tape for mounting semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000299358A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002289651A (en) * | 2000-12-12 | 2002-10-04 | Mitsui Mining & Smelting Co Ltd | Chip-on film base and its manufacturing method |
-
1999
- 1999-04-15 JP JP11108480A patent/JP2000299358A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002289651A (en) * | 2000-12-12 | 2002-10-04 | Mitsui Mining & Smelting Co Ltd | Chip-on film base and its manufacturing method |
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