JP2000294659A - Manufacture of semiconductor nonvolatile memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent degradation in the film quality of a gate insulating film, by selectively removing a thermal silicon nitride film, on the surface of a semiconductor substrate at the section in which to form a gate insulating film in or after the next process by indispensable nitriding. SOLUTION: After formation of an element isolating region 2 on a silicon substrate 1, an impurity region 3 is made in one part of the active region adjacent to the element isolating region 2, and next a first gate insulating film 4 is made by thermal oxidation method. Then, a window 5 is provided on the impurity region 3 and in one part of the first gate insulating film 4, and a tunnel insulating film 6 is manufactured on the impurity region 3. Then, the tunnel insulating film 6 is heat-nitrided to form a thermal silicon nitride film 8 on the first gate insulating film 4, and then the thermal silicon nitride film 8 is selectively etched off, and a polysilicon electrode 11 is formed and patterned.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Fowler-Nordheim
(FN) Rewrite information using tunnel current,
The present invention relates to a FLOTOX type semiconductor nonvolatile memory having a two-layer polysilicon gate electrode structure.

[0002]

2. Description of the Related Art Conventionally, an FN tunnel current is applied to a tunnel insulating film having a thickness of 8 to 12 nm formed on a semiconductor substrate in a two-layer polysilicon gate electrode structure to at least inject or release electrons. As a means of improving the number of times of rewriting, in a semiconductor nonvolatile memory for electrically rewriting information, rapid lamp thermal nitriding in an ammonia atmosphere of the tunnel insulating film has been attempted. This is because uncombined hands of silicon (Si) or silicon oxide (SiO) existing at the interface between the tunnel insulating film and the semiconductor substrate before thermal nitridation and their distorted bonds try to allow electrons to pass through this tunnel insulating film. When the number of rewrites increases, the total amount of electrons that move at a constant program voltage decreases, causing a decrease in the threshold change of the memory cell and narrowing of the memory window where correct information cannot be read ( narrowin
g), memory cell destruction due to time-dependent destruction of the tunnel insulating film due to an increase in electron or hole traps, etc., hinders an increase in the number of rewrites.

The above-mentioned thermal nitridation treatment terminates the dangling bonds by bonding nitrogen atoms active to dangling bonds of silicon and silicon oxide and their distorted bonds.
By converting a nation or a distorted bond into a new bond containing a nitrogen atom, it acts as stress relaxation and reduces electron or hole traps, so that an effect of improving the number of rewrites has been recognized.

[0004]

In an actual semiconductor nonvolatile memory having a two-layer polysilicon gate electrode structure,
In most cases, a gate insulating film is used in addition to the tunnel insulating film.
Since the second gate insulating film formed between the semiconductor substrate and the second-layer polysilicon gate electrode is thermally nitrided, the first gate insulating film is removed by etching since the first gate insulating film is formed between the layer polysilicon gate electrodes. After that, it is formed by thermal oxidation. This second gate insulating film is often used as a polysilicon oxide film on the first-layer polysilicon gate electrode for the purpose of reducing the number of manufacturing steps and the number of times of high-temperature heat treatment.

[0005] However, in the portion where the second gate insulating film is formed, despite the fact that the first gate insulating film thicker than the tunnel insulating film exists on the surface of the semiconductor substrate, certain thermal nitridation processing conditions are applied. Depending on the combination of the thicknesses of the first gate insulating film, a thermal silicon nitride film is formed on the surface of the semiconductor substrate, and this thermal silicon nitride film functions as an oxidation-resistant mask material, and a certain second gate insulating film Under the conditions of the film thickness or the oxidation conditions, the second gate insulating film does not grow on the semiconductor substrate, or even if the second gate insulating film grows, the withstand voltage characteristics are extremely poor, and the integrated circuit does not operate. was there.

[0006]

SUMMARY OF THE INVENTION Due to the thermal nitridation process indispensable for forming a high-quality tunnel insulating film, a parasitic insulating film is formed on the surface of the semiconductor substrate where the gate insulating film is formed after the next step. The method is characterized in that a step of selectively removing the thermal silicon nitride film by etching is added to the manufacturing process of the semiconductor nonvolatile memory.

As a step of selectively removing the thermal silicon nitride film by etching, a method of immersing the silicon nitride film in an aqueous solution containing ammonia and hydrogen peroxide heated to 70 to 100 ° C. for 5 to 20 minutes is used. . As an etching resistant film in an aqueous solution containing ammonia and hydrogen peroxide,
The surface of the layer polysilicon gate electrode is
A thin IPO film is formed by performing thermal oxidation in an oxygen atmosphere diluted with nitrogen at a temperature of 2 to 3 nm.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor nonvolatile memory according to the first aspect, wherein an ONO film which is a composite laminated insulating film is used instead of the IPO film. After the step of forming a silicon nitride film, a step of selectively etching away a thermal silicon nitride film which is parasitically formed on the surface of the semiconductor substrate is performed.

A thermal oxidation step of a silicon nitride film of the ONO film;
It is also characterized in that the thermal oxidation process of the gate insulating film formed on the semiconductor substrate surface where the thermal silicon nitride film is selectively etched away in an aqueous solution containing ammonia and hydrogen peroxide solution after the thermal nitriding process is also used. I have. The first gate insulating film subjected to the thermal nitriding treatment is etched and removed with an aqueous solution containing hydrogen fluoride (HF) or ammonium fluoride (NH ₄ F) to expose the surface of the semiconductor substrate. Furthermore, the surface of the semiconductor substrate is
By etching in the range of 5 nm, the thermal silicon nitride film existing on the surface of the semiconductor substrate can be completely removed, and the second gate is formed on the surface of the single crystal silicon substrate which is a semiconductor substrate exposed on the surface by etching. By forming the insulating film, a high-quality second gate insulating film can be obtained.

Various processes can be considered for etching the surface of the semiconductor substrate in the range of 2 to 5 nm.
By adopting a method of immersing in an aqueous solution containing ammonia and hydrogen peroxide solution heated to 100 ° C. for 5 to 20 minutes, the chemical reaction using the aqueous solution has high selectivity and etching damage to the surface of the semiconductor substrate or in the vicinity of the surface. Can be selected as little as possible.

There is also a problem in the step of etching the semiconductor substrate surface in the range of 2 to 5 nm using an aqueous solution containing ammonia and hydrogen peroxide solution. That is when the first-layer polysilicon electrode already exists on the first gate insulating film. The aqueous solution containing ammonia and hydrogen peroxide solution
This is because the surface of the first-layer polysilicon electrode is etched simultaneously with the etching of the semiconductor substrate surface. The surface of the etched first-layer polysilicon electrode has larger irregularities than immediately after the deposition, and when this surface is oxidized to produce an IPO film, the electric field concentrates on the irregularities and this time, The quality of the IPO film may deteriorate.

As a method for solving this problem, the surface of the first-layer polysilicon gate electrode is thermally oxidized by a thickness of 2 to 3 nm in an oxygen atmosphere diluted with nitrogen at 800 to 1050 ° C.
By adding a step of forming a thin IPO film and forming an etching-resistant film with respect to an aqueous solution containing ammonia and aqueous hydrogen peroxide, it becomes possible to finally obtain good IPO film quality. Since the thermal silicon nitride film exists as an oxidation-resistant film on the surface of the semiconductor substrate before etching, the first
A thermal oxidation film does not grow on the surface of the semiconductor substrate due to thermal oxidation of the layer polysilicon gate electrode, and an etching resistant film is not formed.

In the case where the memory cell size is reduced, that is, miniaturized, the first cell is generally used instead of only the IPO film.
The surface of the layer polysilicon gate electrode is thermally oxidized to form a polysilicon oxide film, a silicon nitride film is formed thereon by a CVD method, and finally the silicon nitride film is thermally oxidized to grow a silicon oxide film. The formed ONO film is often used as an insulating film between the first and second polysilicon electrodes.

In this case, a laminated composite insulating film up to a silicon nitride film is formed on the first-layer polysilicon electrode, and the first-layer polysilicon is etched in a step of etching the surface of the semiconductor substrate using an aqueous solution containing ammonia and hydrogen peroxide. If the silicon electrode is covered with the silicon nitride film, it is possible to form the second gate insulating film having good quality without deteriorating the quality of the ONO film. It should be noted that an aqueous solution containing ammonia and aqueous hydrogen peroxide etches both the silicon nitride film and the semiconductor substrate surface of the ONO film at almost the same rate, so that the silicon nitride film is expected to be reduced in film thickness. It is necessary to set the film thickness at the position.

A step of thermally oxidizing a silicon nitride film of the ONO film etched with an aqueous solution containing ammonia and hydrogen peroxide solution, and a step of forming a second gate on the surface of the semiconductor substrate etched with the aqueous solution containing ammonia and hydrogen peroxide solution By also using the thermal oxidation step of the insulating film, it is possible to rationally shorten the entire process while optimizing the film quality of the two.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor nonvolatile memory according to the present invention will be described below with reference to the drawings. FIG. 1 is a process sectional view for explaining one embodiment of a method for manufacturing a semiconductor nonvolatile memory according to the present invention. First,
Boron is 8 to 30Ω as a semiconductor impurity of the first conductivity type.
After an element isolation region 2 is formed by a LOCOS method on a P-type semiconductor silicon substrate 1 to which about
The arsenic impurity region 3 of the second conductivity type is formed in a part of the active region adjacent to the photo and ion implantation energy 5.
It is formed by an ion implantation process at a concentration of 0 to 110 KeV and 5E13 to 4E14 cm ⁻² (FIG. 1A). In this figure, an impurity region for isolation provided below the element isolation region 2 is not shown.

Next, after removing the photoresist used as the implantation mask, a first gate insulating film 4 having a thickness of 35 to 65 nm is formed on the P-type semiconductor silicon substrate 1 by a thermal oxidation method. Then, a window 5 is opened by removing a part of the first gate insulating film 4 on the second conductivity type impurity region 3 and a part of the first gate insulating film 4 by a photo-etching process. 8 to 12 using the thermal oxidation method
Next, a tunnel insulating film 6 having a thickness of 10 nm is formed.

After the tunnel insulating film 6 is subjected to rapid ramp thermal nitriding in an ammonia atmosphere, a first-layer polysilicon electrode 7 is formed on the first gate insulating film 4 and the tunnel insulating film 6 by CVD (Chemical). 1 by the Vapor Deposition method
It is formed to a thickness of 50 to 450 nm, and is doped with an impurity of 20 to 50 Ω / □ by a pre-deposition method of phosphorus.
The first-layer polysilicon electrode 7 is patterned by a photo-etching process (FIG. 1B).

Next, after removing the portion of the first gate insulating film 4 on the P-type semiconductor silicon substrate 1 which does not overlap with the first-layer polysilicon electrode 7 by a photo-etching process, the P-type semiconductor silicon is removed. The thermal silicon nitride film 8 formed on the surface of the substrate 1 is placed in an aqueous solution containing ammonia and hydrogen peroxide heated to 70 to 100 ° C. for 5 to 20 minutes.
By immersing for 2 minutes, etching removal is performed in the range of 2 to 5 nm. This thermal silicon nitride film 8 was present on the entire surface of the P-type semiconductor silicon substrate immediately after thermal nitriding (FIG. 1C).

A second gate insulating film 9 having a thickness of 15 to 35 nm is formed on the etched semiconductor substrate surface by a thermal oxidation method, and at the same time, the first layer is formed by the thermal oxidation for forming the second gate insulating film. A film thickness of 30 on the polysilicon gate electrode 7
An IPO film 10 of ~ 55 nm is also prepared. Then, the second
A second-layer polysilicon electrode 11 is formed on the gate insulating film 9 and the IPO film 10 to have a thickness of 250 to 450 nm by a CVD method, and is formed to a thickness of 20 to 50 Ω / cm by a phosphorus pre-deposition method.
Then, the second-layer polysilicon electrode 11 is patterned by a photo-etching process (FIG. 1D).

FIG. 2 is a process sectional view for explaining another embodiment of the method of manufacturing a semiconductor nonvolatile memory according to the present invention. After forming the element isolation region 2 on the P-type semiconductor silicon substrate 1 of the first conductivity type by the LOCOS method in the same manner as in the above-described embodiment, a part of the active region adjacent to the element isolation region 2 is of the second conductivity type. The arsenic impurity region 3 is formed by a photo and ion implantation process (FIG. 2A). Also in this figure, an impurity region for isolation provided below the element isolation region 2 is not shown.

Next, after removing the photoresist used as the implantation mask, a first gate insulating film 4 is formed on the P-type semiconductor silicon substrate 1 by a thermal oxidation method. Then, a window 5 is opened by removing a part of the first gate insulating film 4 on the second conductivity type impurity region 3 and a part of the first gate insulating film 4 by a photo-etching process. The tunnel insulating film 6 is manufactured.

After performing a rapid ramp thermal nitridation process on the tunnel insulating film 6 in an ammonia atmosphere, a first-layer polysilicon electrode 7 is formed on the first gate insulating film 4 and the tunnel insulating film 6 by CVD and photolithography. Then, it is formed by patterning by an etching process (FIG. 2B). Next, the surface of the first-layer polysilicon gate electrode is thermally oxidized by 2 to 3 nm in an oxygen atmosphere diluted with nitrogen at 800 to 1050 ° C.
A thin IPO film 12 is formed to form an etching resistant film with respect to an aqueous solution containing ammonia and hydrogen peroxide solution. Then, a portion of the first gate insulating film 4 that does not overlap the first layer polysilicon electrode 7 on the P-type semiconductor silicon substrate 1 is removed by a photo and etching process.
The thermal silicon nitride film 8 formed on the surface of the type semiconductor silicon substrate 1 is etched away in an aqueous solution containing ammonia and hydrogen peroxide in a range of 2 to 5 nm. This thermal silicon nitride film 8 was present on the entire surface of the P-type semiconductor silicon substrate immediately after thermal nitriding (FIG. 2C).

A second gate insulating film 9 having a thickness of 15 to 35 nm is formed on the etched semiconductor substrate surface by a thermal oxidation method, and at the same time, the first layer is formed by the thermal oxidation for forming the second gate insulating film. A film thickness of 30 on the polysilicon gate electrode 7
An IPO film 10 of ~ 55 nm is also prepared. Then, the second
A second-layer polysilicon electrode 11 is formed on the gate insulating film 9 and the IPO film 10 by patterning by CVD, photo, and etching steps (FIG. 2D).

FIG. 3 is a process sectional view for explaining still another embodiment of the method for manufacturing a semiconductor nonvolatile memory according to the present invention. In the same manner as in the above embodiment, the element isolation region 2 is formed on the first conductivity type P-type
Is formed, an arsenic impurity region 3 of the second conductivity type is formed in a part of the active region adjacent to the element isolation region 2 by a photo and ion implantation process (FIG. 3A). Also in this figure, an impurity region for isolation provided below the element isolation region 2 is not shown.

Next, after removing the photoresist used as the implantation mask, a first gate insulating film 4 is formed on the P-type semiconductor silicon substrate 1 by a thermal oxidation method. Then, a window 5 is opened by removing a part of the first gate insulating film 4 on the second conductivity type impurity region 3 and a part of the first gate insulating film 4 by a photo-etching process. The tunnel insulating film 6 is manufactured.

After performing a rapid ramp thermal nitridation process on the tunnel insulating film 6 in an ammonia atmosphere, a first-layer polysilicon electrode 7 is formed on the first gate insulating film 4 and the tunnel insulating film 6 by CVD and photolithography. Then, it is formed by patterning through an etching process (FIG. 3B). Next, the surface of the first-layer polysilicon gate electrode 7 is thermally oxidized to a thickness of about 10 to 15 nm in an oxygen atmosphere diluted with nitrogen at 950 to 1050 ° C. to form a lower polysilicon oxide film 1 of the ONO film 16.
Form 3 Further, the lower polysilicon oxide film 13
CVD of ammonia and silane gas at 700-800 ℃
Middle silicon nitride film 1 having a thickness of about 10 to 20 nm
4 is deposited. Thereafter, portions of the first gate insulating film 4, the lower polysilicon oxide film 13, and the middle silicon nitride film 14 which do not overlap the first polysilicon electrode 7 on the P-type semiconductor silicon substrate 1 are subjected to photo and etching processes. After removal, the P-type semiconductor silicon substrate 1
The thermal silicon nitride film 8 formed on the surface is etched away in the range of 2 to 5 nm in an aqueous solution containing ammonia and hydrogen peroxide solution. This thermal silicon nitride film 8 is present on the entire surface of the P-type semiconductor silicon substrate immediately after thermal nitriding (FIG. 3C).

A second gate insulating film 9 having a thickness of 15 to 35 nm is formed on the etched semiconductor substrate surface by a thermal oxidation method, and at the same time, the first layer is formed by the thermal oxidation for forming the second gate insulating film. The middle silicon nitride film 14 on the polysilicon gate electrode 7 is thermally oxidized to form an upper silicon oxide film 15 having a thickness of about 3 to 5 nm. Then, a second layer is formed on the second gate insulating film 9 and the ONO film 16 which is a three-layer laminated composite insulating film of the lower polysilicon oxide film 13, the middle silicon nitride film 14, and the upper silicon oxide film 15. The polysilicon electrode 11 is patterned by a CVD, photo, and etching process (FIG. 3D).

[0029]

In a process accompanying a thermal nitridation process for improving rewriting characteristics in a semiconductor nonvolatile memory,
Deterioration of the quality of the gate insulating film formed after the thermal nitriding treatment can be prevented by adding a step of selectively etching the thermal silicon nitride film which is formed parasitically on the surface of the semiconductor silicon substrate.

[Brief description of the drawings]

FIG. 1 is a process cross-sectional view illustrating one embodiment of a method for manufacturing a semiconductor nonvolatile memory according to the present invention.

FIG. 2 is a process cross-sectional view for explaining another embodiment of the method for manufacturing a semiconductor nonvolatile memory according to the present invention.

FIG. 3 is a process cross-sectional view for explaining still another embodiment of the method for manufacturing a semiconductor nonvolatile memory according to the present invention.

[Explanation of symbols]

 Reference Signs List 1 P-type semiconductor silicon substrate 2 Element isolation region 3 Impurity region 4 First gate insulating film 5 Window 6 Tunnel insulating film 7 First-layer polysilicon gate electrode 8 Thermal nitride film 9 Second gate insulating film 10 IPO film 11 second layer polysilicon electrode 12 thin IPO film 13 lower layer polysilicon oxide film 14 middle layer silicon nitride film 15 upper layer silicon oxide film 16 ONO film

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) PR05 PR12 PR16 PR43 PR53 ZA07

Claims (5)

[Claims] An element isolation region is formed on a semiconductor substrate of a first conductivity type by a LOCOS method, and then an impurity region of a second conductivity type is formed in a part of an active region adjacent to the element isolation region by a photo and ion implantation process. After removing the photoresist used as the implantation mask,
Forming a first gate insulating film on the semiconductor substrate by a thermal oxidation method, and removing a partial region of the first gate insulating film on the impurity region of the second conductivity type by a photo and etching process Forming a tunnel insulating film on the impurity region of the second conductivity type using a thermal oxidation method; performing a rapid ramp thermal nitridation process on the tunnel insulating film in an ammonia atmosphere; A first layer polysilicon electrode is formed on the film by CVD (Chemical Vapor Depo).
forming the first-layer polysilicon gate electrode by an impurity doping method by phosphorus pre-deposition, and patterning the first-layer polysilicon electrode by a photo-etching step.
Removing a portion of the first gate insulating film in a region on the semiconductor substrate which is sandwiched between a second-layer polysilicon gate electrode and the portion not overlapping the first-layer polysilicon electrode by a photo-etching process; Etching a portion of the semiconductor substrate surface in a region on the semiconductor substrate that is sandwiched between the second-layer polysilicon gate electrode and a portion that does not overlap the first-layer polysilicon electrode;
Forming a second gate insulating film on the etched semiconductor substrate surface by using a thermal oxidation method, and forming the second gate insulating film on the first layer polysilicon gate electrode by thermal oxidation. Forming a second-layer polysilicon electrode on the IPO (Inter Poly Oxide) film and on the second gate insulating film; and doping the second-layer polysilicon gate electrode with an impurity by a phosphorus pre-deposition method. And a step of patterning the second-layer polysilicon electrode by a photo-etching step. 2. A region of the semiconductor substrate between the second-layer polysilicon electrode and the portion not overlapping with the first-layer polysilicon electrode is etched in a range of 2 to 5 nm on the semiconductor substrate. As a process, 70-1
2. The method according to claim 1, wherein the semiconductor memory is immersed for 5 to 20 minutes in an aqueous solution containing ammonia and hydrogen peroxide heated to 00C. 3. The method according to claim 1, wherein the patterning is performed before the step of etching the semiconductor substrate surface in a range of 2 to 5 nm.
The surface of the layer polysilicon gate electrode is
2. The method for manufacturing a semiconductor nonvolatile memory according to claim 1, further comprising a step of performing thermal oxidation in an oxygen atmosphere diluted with nitrogen at a temperature of 2 [deg.] C. to form an IPO film and forming an etching resistant film. 4. A step of forming a polysilicon oxide film by thermally oxidizing a surface of the first layer polysilicon gate electrode instead of only the IPO film, and forming a polysilicon oxide film on the polysilicon oxide film.
A step of forming a silicon nitride film by a CVD method, and a region in which a laminated composite insulating film composed of the polysilicon oxide film and the silicon nitride film is present and sandwiched between a second-layer polysilicon gate electrode on the semiconductor substrate Removing the first gate insulating film in a region that does not overlap with the first-layer polysilicon electrode by a photo-etching step; and sandwiching the second-layer polysilicon gate electrode on the semiconductor substrate. Etching away a portion of the semiconductor substrate surface in a region that does not overlap the first-layer polysilicon electrode; and forming a second gate insulating film on the etched semiconductor substrate surface using a thermal oxidation method. 2. The method according to claim 1, comprising the step of forming. 5. The thermal oxidation of the second gate insulating film is a step also serving as a thermal oxidation step of a silicon nitride film of the laminated composite insulating film, and the final composite insulating film has a configuration of ONO (Oxide-Ni
5. The method for manufacturing a semiconductor nonvolatile memory according to claim 4, wherein the method is a step of forming a tride-oxide film.