JP2000286308A - Semiconductor device and manufacture of the same, wiring board, circuit board, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To assure flatness by utilizing a member used in a mounting/assembly process, omitting an expansion stiffener. SOLUTION: A first process where a semiconductor chip and a substrate 10, where a wiring pattern 20 comprising a first region 12 and a second region 14 adjacent to it is formed are prepared, a second process where the semiconductor chip is mounted in the first region 12, a third process where the second region 14 is pasted in the part of the first region 12 except for the mounting region for the semiconductor chip while the first and second regions 12 and 14 are connected, and a process where an external terminal is provided further outside than the semiconductor chip-mounting region in the first region 12, are provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, a wiring board, a circuit board, and an electronic device.

[0002]

BACKGROUND OF THE INVENTION T-BGA (Tape Ball Grid Array) which is known as one type of semiconductor device package
In the case of a Fan-Out type or Fan-In / Out type CSP, the package size is slightly larger than the chip size. In the semiconductor device of this embodiment, a flexible substrate is used, and solder balls are also provided on portions of the flexible substrate that protrude from the semiconductor chip. And
A stiffener was often used to secure the coplanarity of the solder balls.

However, stiffeners are not only expensive because stainless steel is used in consideration of rigidity and workability, but also have to be procured as separate members only when necessary.

An object of the present invention is to solve this problem. An object of the present invention is to provide a semiconductor device which can omit an expensive stiffener and can secure flatness by utilizing members used in a mounting and assembling process, and a method of manufacturing the same. It is to provide a method, a wiring board, a circuit board, and an electronic device.

[0005]

(1) A method of manufacturing a semiconductor device according to the present invention comprises: a substrate having a first region and a second region adjacent to the first region on which a wiring pattern is formed; A first step of preparing a chip; a second step of mounting the semiconductor chip in the first area; and a step of mounting the semiconductor chip in the first area while the first and second areas remain connected. A third step of attaching the second area to a portion other than the mounting area; and a step of providing external terminals at least outside the mounting area of the semiconductor chip in the first area.

According to the present invention, a semiconductor chip is mounted on a first region of a substrate, and a second region is attached to the first region. Thus, the portion around the semiconductor chip in the first region is reinforced by the second region, and the flatness of the external terminal is ensured. Further, since both the first and second regions are formed of a substrate used in the mounting and assembling process, it is not necessary to prepare an expensive stiffener. Further, since the second region is attached to the first region while being connected to the first region, the workability is excellent. In the present invention, the step of providing an external terminal is often performed after the third step, but may be performed before the third step.

(2) In this method of manufacturing a semiconductor device, a hole having a size larger than the outer shape of the semiconductor chip is formed in the second region of the substrate, and the hole is formed in the third step in the third step. The second region may be attached to the first region by inserting the semiconductor chip.

[0008] This makes it possible to easily attach the second region to a portion around the semiconductor chip in the first region.

(3) In this method of manufacturing a semiconductor device, the substrate may include a region between the first region and the second region.
At least one slit may be formed.

By forming the slit, it becomes easy to bend between the first region and the second region.

(4) In this method of manufacturing a semiconductor device, a connection member connecting the first and second regions across the slit is formed on the substrate, and before the third step, In a state where the first and second regions are connected only by the connection member, a step of punching the substrate with an outer shape of at least a second region of the first and second regions may be included.

(5) In this method of manufacturing a semiconductor device, the connection member may be formed of the same member as the wiring pattern.

According to this, the connection member can be formed at the same time when the wiring pattern is formed.

(6) The method of manufacturing a semiconductor device may include a step of punching the bonded first and second regions after the third step.

By doing so, the outer shape of the semiconductor device can be adjusted.

(7) In this method of manufacturing a semiconductor device, the substrate may have a tape shape, and the first region and the second region may be repeatedly arranged in the longitudinal direction.

(8) In this method of manufacturing a semiconductor device, the substrate has a tape shape, the first region and the second region are arranged in a width direction, and each of the first region and the second region is They may be arranged repeatedly in the longitudinal direction.

According to this, the first and second regions are arranged in the width direction of the tape-shaped substrate, so that a useless portion can be reduced.

(9) In the wiring board according to the present invention, a first region on which a semiconductor chip is mounted and a second region adjacent to the first region are provided.
And a wiring pattern formed on the substrate, wherein the second region of the substrate includes a hole having a size equal to or larger than the outer shape of the semiconductor chip. At least one between the first region and the second region
Three slits are formed.

When the wiring board according to the present invention is used, a semiconductor chip is mounted on a first region of the substrate, a second region is attached to the first region, and a portion around the semiconductor chip in the first region is formed on a second region. The region is reinforced by the area, and the flatness of the external terminal can be ensured. Since the first and second regions are both formed of a substrate, it is not necessary to prepare an expensive stiffener. In the present invention, since the slit is formed in the substrate, the first region and the second region can be easily bent,
Both can be pasted.

(10) In this wiring board, the board may be provided with a connecting member connecting the first and second regions across the slit.

(11) In this wiring board, the connection member may be formed of the same material as the wiring pattern.

According to this, the connection member can be formed at the same time when the wiring pattern is formed.

(12) In this wiring board, the board may have a tape shape, and the first region and the second region may be repeatedly arranged in the longitudinal direction.

(13) In this wiring board, the board has a tape shape, the first area and the second area are arranged in the width direction, and each of the first area and the second area is
They may be arranged repeatedly in the longitudinal direction.

(14) The semiconductor device according to the present invention is manufactured by the above method.

(15) A semiconductor device according to the present invention includes a semiconductor chip on which a plurality of electrodes are formed, a wiring pattern, a first substrate on which the semiconductor chip is mounted, and a wiring pattern. A plurality of external terminals provided, a second substrate attached to the first substrate avoiding the semiconductor chip and made of the same material as the first substrate; and an end of the first substrate. A connection member for connecting the end of the second substrate in a bent state.

According to the present invention, a semiconductor chip is mounted on a first substrate, and a second substrate is attached to the first substrate. Thereby, a portion of the first substrate around the semiconductor chip is reinforced by the second substrate, and flatness of the external terminals is ensured. Further, since the first and second substrates are both made of the same material, it is not necessary to prepare an expensive stiffener. Further, the first and second substrates are:
Since the connection is made by the connection member in a bent state, the workability in the manufacturing process is excellent.

(16) In this semiconductor device, a conductive foil is formed on the second substrate, and the connection member is configured to electrically connect a part of the wiring pattern to the conductive foil. Good.

By doing so, for example, by using the conductive foil as the GND plane, it is possible to reduce the noise input to the signal input to the semiconductor chip.

(17) In this semiconductor device, the wiring pattern, the conductive foil and the connecting member may be formed of the same material.

By using the same material, these manufacturing steps can be simplified.

(18) In this semiconductor device, a plurality of through holes are formed in the first substrate, and the external terminals are provided in the wiring pattern via the through holes, and the external terminals are The second substrate protrudes from the surface of the first substrate opposite to the surface on which the wiring pattern is formed, and the second substrate is coated with an insulating adhesive with the surface on which the conductive foil is formed facing the wiring pattern. Through the first substrate.

According to this, since the conductive foil is provided at a position near the wiring pattern via the insulating adhesive, the effect of reducing noise is high.

(19) The above semiconductor device is mounted on a circuit board according to the present invention.

(20) An electronic apparatus according to the present invention includes the above semiconductor device.

[0037]

Embodiments of the present invention will be described below with reference to the drawings. The package form of the semiconductor device according to the present invention is a T-BGA (Tape Ball Grid Arra).
y) BGA (Ball Grid Array), T-CSP
CSP including (Tape Chip Size / Scale Package)
(Chip Size / Scale Package), TCP (Tape Carrier P) further packaged using TAB bonding technology
ackage) may be applied. In the method for manufacturing a semiconductor device according to the present invention, TAB (Tape Automate
d Bonding), flip chip bonding, eg C
Face-down bonding such as OF (Chip On Film), bonding using an anisotropic conductive material, and the like can be given.

(First Embodiment) FIG. 1 is a diagram showing a wiring board according to a first embodiment of the present invention. 1 to 4 are views showing a method for manufacturing a semiconductor device according to a first embodiment to which the present invention is applied, and FIG. 5 is a view showing a method according to the first embodiment to which the present invention is applied. FIG. 3 is a diagram illustrating a semiconductor device.

The wiring board includes a substrate 10 and a wiring pattern 20.
And The substrate 10 may be formed of any of an organic or inorganic material, or may be formed of a composite structure thereof. As the substrate 10, a multilayer substrate or a build-up substrate may be used. The overall shape of the substrate 10 is not particularly limited, and may be a rectangle, a polygon, or a combination of a plurality of rectangles.
The thickness of the substrate 10 is often determined by its material, but is not limited thereto. Wiring boards are tape carriers and FPC (Flexible Printed) used in TAB technology.
Circuit). In a general tape carrier, a device hole is formed, and an inner lead protrudes into the device hole. However, a tape-shaped flexible substrate having no device hole may be used as the substrate 10.

In all of the embodiments described below, a super engineering plastic film, a polyimide film, or the like having excellent heat resistance is most suitable as a substrate material.

The substrate 10 has a first region 12 and a second region 14.
And The first region 12 is a region where a semiconductor chip is mounted, and is punched out to become a first substrate 42 (see FIG. 5). The second region 14 is located next to the first region 12 and is stamped to form a second substrate 44 (see FIG. 5). A hole 16 having a size larger than the outer shape of the semiconductor chip 30 is formed in the second region 14. First area 12 and second area 14
Are connected. When the substrate 10 has a tape shape, the plurality of first regions 12 and the plurality of second regions 1
4 may be alternately formed along the longitudinal direction.

At least one slit 11 is formed between the first region 12 and the second region 14 on the substrate 10. When the first region 12 and the second region are arranged along the longitudinal direction of the tape-shaped substrate 10, the slit 11 extends in the width direction of the substrate 10. Slit 11
Has a shape in which the substrate 10 is not separated into the first region 12 and the second region 14 and the connection between them is maintained.

The wiring pattern 20 is often formed of copper, and is not shown in detail in FIG. The wiring pattern 20 is formed in the first area 12. The wiring pattern 20 includes a plurality of electrodes 32 of the semiconductor chip 30 (FIG. 5).
) And a plurality of external terminals 40. The wiring pattern 20 may include, for example, a land portion 22 (see FIG. 5) to which the electrode 32 is bonded, and a land portion 24 (see FIG. 5) on which the external terminal 40 is provided.
A plurality of through holes 18 are formed in the first region 12 of the substrate 10 as shown in FIG. A part of the wiring pattern 20, for example, a land portion 24 is located on the through hole 18.

At least one connecting member 2 connecting the first region 12 and the second region 14 across the slit 11
6 is formed on the substrate 10. When the slit 11 is formed long, it is preferable to form a plurality of connecting members 26. The connection member 26 is connected to the wiring pattern 20.
May be connected. Further, the connection member 26 may be formed of the same material as the wiring pattern 20. That is, the connection member 26 may be formed of a conductive material.

Further, the width of the slit 11 is determined by the second region 14 when the second region 14 is bonded to the first region 12 later.
The thickness is preferably equal to or larger than the thickness of the semiconductor chip 30 so that the hole 16 formed in the semiconductor chip 30 can be easily aligned with the semiconductor chip 30. By doing so, the degree of freedom of movement of the second region 14 at the time of positioning of bonding is increased, and positioning is facilitated.

In the second region 14, a conductive foil 28 is formed. When the hole 16 is formed in the second region 14, the conductive foil 28 may be formed so as to surround the hole 16. At this time, the conductive foil 2 is slightly
By forming 8, the conductive foil 28 can be prevented from entering the inside of the hole 16. The inside of the hole 16 is shown in FIG.
The semiconductor chip 30 is located as shown in FIG. By forming the conductive foil 28 avoiding the end of the hole 16, contact between the semiconductor chip 30 and the conductive foil 28 can be prevented. The conductive foil 28 may be connected to the connection member 26. When the connection member 26 is formed of a conductive material, the conductive foil 28 and a part of the wiring pattern 20 may be electrically connected via the connection member 26. For example, a portion of the wiring pattern 20 connected to GND may be connected to the conductive foil 28. This is the same in the embodiments described below. By doing so, the conductive foil 28 becomes a GND plane. Wiring pattern 2
0, the conductive member 26 and the conductive foil 28 may be formed of the same material. On top of these, a resin film such as a solder resist may be formed as an insulating material for the purpose of securing mutual insulating properties and improving humidity resistance reliability.

The wiring pattern 20 includes nickel,
Often plated with gold, solder or tin. Conducting plating ensures conductivity. In particular,
The connection between the wiring pattern 20 and the electrode of the semiconductor chip 30 and the connection between the wiring pattern 20 and the external terminal 40 are improved, the surface is prevented from being oxidized, and the electrical connection resistance is reduced. When plating is performed, a plating lead 29 is formed on the substrate 10. The plating leads 29 are electrically connected to all of the wiring patterns 20. When the conductive foil 28 is electrically connected to the conductive member 26 and the conductive member 26 is electrically connected to the wiring pattern 20, the conductive member 26 and the conductive foil 28 are also plated. Is also good.

The wiring board according to the present embodiment is formed as described above, and a method of manufacturing a semiconductor device using this wiring board will be described below.

(First Step) The wiring substrate shown in FIG. 1 and the semiconductor chip 30 (see FIG. 5) are prepared. When the planar shape of the semiconductor chip 30 is rectangular (square or rectangular), one surface (active surface) of the semiconductor chip 30 is arranged along at least one side (in many cases, two or four opposing sides). Are formed with a plurality of electrodes 32. Alternatively, a plurality of electrodes 3 may be provided at the center of one surface of the semiconductor chip 30.
2 may be arranged in a line. The electrode 32 shown in FIG. 1 includes a pad made of aluminum or the like, and a bump made of a solder ball, a gold wire ball, gold plating, or the like. Nickel, chromium, titanium, or the like may be added between the pad and the bump as a layer for preventing diffusion of the bump metal. Or,
The electrode 32 may be constituted only by the pad without the bump.

(Second Step) As shown in FIG. 2, the semiconductor chip 30 is mounted on the first region 12 of the substrate 10. Further, the semiconductor chip 30 is mounted on the first region 12, and the electrode 32 (see FIG. 5) of the semiconductor chip 30 and the wiring pattern 20 are electrically connected. The mounting method may be face-up bonding or face-down bonding. In the face-up bonding, the electrodes 32 of the semiconductor chip 30 and the wiring patterns 20 are connected by wire bonding.
Is often covered with resin. When mounted face down, conductive resin paste, A
There are methods such as a method using metal bonding with u-Au, Au-Sn, solder, and the like, and a method using shrinkage force of an insulating resin, and any of these methods may be used. The semiconductor device shown in FIG. 5 is one in which a semiconductor chip 30 is face-down bonded using an anisotropic conductive material 34.

The anisotropic conductive material 34 is obtained by dispersing conductive particles (conductive filler) in an adhesive (binder).
Dispersants may be added. Anisotropic conductive material 34
May be attached to the substrate 10 after being formed in a sheet shape in advance, or may be provided on the substrate 10 in a liquid state. Note that a thermosetting adhesive is often used as the adhesive for the anisotropic conductive material 34. Anisotropic conductive material 3
4 is provided at least on the bonding portion of the wiring pattern 20 to the semiconductor chip 30. Or,
An anisotropic conductive material 34 may be provided so as to cover the entire first region 12 of the substrate 10. The anisotropic conductive material 34 is crushed between the electrode 32 and the wiring pattern 20 so that the conductive particles allow electrical conduction between the two.

Further, a step of punching the substrate 10 may be included. In this case, the substrate 10 is punched at a position where the connection between the first region 12 and the second region 14 can be maintained. For example,
The substrate 10 may be punched at the punching position 36 shown in FIG. The punching position 36 is an outer position of at least the second region 14 among the first region 12 and the second region 14. The first and second regions 1 are formed only by the connection member 26.
2, 14 may be connected. When the slit 11 is formed in the substrate 10, the punching position 36 is
As shown in FIG. 2, the position may pass through at least a part of the slit 11. According to this, punching is performed using at least the slit 11. Connecting member 26
Is not formed, punching is performed avoiding the slit 11 to maintain the connection state between the first region 12 and the second region 14. The punching step is preferably performed after the mounting step of the semiconductor chip 30, but may be performed before the mounting step.

(Third Step) As shown in FIG. 4, the first region 1 and the second region 14 remain connected and the first region 1
2, except for the mounting area of the semiconductor chip 30;
The second region 14 is attached. For example, the surface on which the wiring pattern 20 is formed in the first region 12 and the second region 14
Are attached to each other with the surface on which the conductive foil 28 is formed facing each other. At this time, the connection member 26 is in a bent state. The semiconductor chip 30 is inserted into the hole 16 formed in the second region 14. When the anisotropic conductive material 34 is used for bonding the semiconductor chip 30,
An anisotropic conductive material 34 is also provided on a portion of the first region 12 outside the semiconductor chip 30 and
It may be used for bonding the region 12 and the second region 14. Alternatively, the first region 12 and the second region 1 are formed using an adhesive.
4 may be bonded. Preferably, the adhesive is an insulating adhesive. In the present embodiment, the first region 12 and the second region 1 are kept connected with the first region 12 and the second region 14.
Since the members 4 are bonded together, the members do not fall apart, so that workability is good.

(Step of Providing External Terminals) As shown in FIG. 5, external terminals 40 are provided outside the mounting region of the semiconductor chip 30 in the first region 12. This step may be performed after the third step, or may be performed before the third step.
In this step, the external terminals 40 may be provided inside the mounting area as well as outside the mounting area of the semiconductor chip 30 in the first area 12. Solder balls to external terminals 40
It may be. Alternatively, the external terminals 40 may be formed by bending a part of the wiring pattern 20 inside the through hole 18. In the example shown in FIG. 5, the wiring pattern 20 is formed on one surface of the first region 12 of the substrate 10, and the through hole 1
An external terminal 40 is provided on the wiring pattern 20 through 8. Then, the external terminals 40 protrude from the other surface of the first region 12 of the substrate 10.

(Other Steps) When the third step is completed,
As shown in FIG. 4, the connection member 26 may be exposed from the substrate 10 in a bent state. In that case, if necessary, the connection member 26 may be cut and removed. Alternatively, the first region 12 and the second region 14 of the substrate 10 may be further punched. Thus, the outer shape of the package of the semiconductor device can be adjusted.

The semiconductor device can be manufactured by the above steps. The semiconductor shown in FIG.
, A first substrate 42, a second substrate 44, and external terminals 4
0 and a bent connection member 26. First substrate 4
2 is formed by stamping out the first region 12 of the substrate 10 described above. The second substrate 44 is formed by punching the second region 14 of the substrate 10 described above. Slits may be formed in advance in the outer shape positions of the first region 12 and the second region 14 and finally punched only between the slits. In this case, the punching amount is reduced as compared with the punching of the entire outer shape, and the outer shape punching die can be made inexpensive and have a long life. Other configurations are the same as those described in the method of manufacturing the wiring board and the semiconductor device. These configurations are common to the embodiments described below.

According to the semiconductor device of this embodiment,
The semiconductor chip 30 is mounted on the first substrate 42, and external terminals 40 are provided on a portion of the first substrate 42 outside the semiconductor chip 30. Also, the first substrate 42
A second substrate 44 is adhered to a portion of the semiconductor chip 30 avoiding the semiconductor chip 30. Therefore, the second substrate 4
4 performs the same function as the stiffener,
0 flatness can be ensured.

The wiring pattern 20 formed on the first substrate 42 and the conductive foil 28 formed on the second substrate 44
Are connected via a connection member 26. The wiring pattern 20 and the conductive foil 28 are bonded with an adhesive. This adhesive is preferably an insulating adhesive, and may be an anisotropic conductive material as long as electrical conduction between the wiring pattern 20 and the conductive foil 28 is interrupted. Further, in order to ensure insulation between the wiring pattern 20 and the conductive foil 28, an insulating resin layer such as a solder resist may be formed on at least one surface in advance. Thus, the conductive foil 2 is formed on the wiring pattern 20 via the insulating material.
8 is formed, the conductive foil 28 is
If it is connected to the GND potential portion at 0, noise can be cut off by the conductive foil 28.

The semiconductor device according to the present invention described in this embodiment mode and the following embodiment modes may be as follows.

(1) In another embodiment of the semiconductor device according to the present invention, a semiconductor chip is mounted on a surface of a first substrate on which a wiring pattern is formed, and electrodes of the semiconductor chip and the wiring pattern are connected by wires. It is a thing.

This is a semiconductor device of a wire bonding type, which may be, for example, one form of a CSP.
The manufacturing method includes a step of connecting an electrode of a semiconductor chip and a wiring pattern with a wire.

(2) In another embodiment of the semiconductor device according to the present invention, the semiconductor chip and the first substrate are located at an interval, and are connected to the wiring pattern on the first substrate while the first substrate is connected to the first substrate. A lead protruding from the end of the substrate is provided,
The leads are bent and connected to the electrodes of the semiconductor chip.

This semiconductor device may also be one form of the CSP. Note that a resin may be filled between the first substrate and the semiconductor chip with a gap provided therebetween.

The manufacturing method includes a step of connecting electrodes and leads of a semiconductor chip. Note that single point bonding may be applied to lead connection.

(3) In another embodiment of the semiconductor device according to the present invention, the device hole is formed in the first substrate, and the wiring pattern projects (overhangs) from the first substrate into the device hole. The semiconductor device further includes a lead, wherein the electrode of the semiconductor chip and the inner lead are connected.

This semiconductor device is a T-BGA (Tape-Ba
ll Grid Array). The manufacturing method includes a step of connecting the electrode of the semiconductor chip and the inner lead. TAB technology can be applied to this manufacturing method.

(Second Embodiment) FIG. 6 is a view showing a wiring board according to a second embodiment of the present invention. The wiring board shown in FIG. 2 differs from the wiring board shown in FIG. 1 in that a plurality of slits 52 are formed in a substrate 50, and the other configuration is the same as that of the wiring board shown in FIG.
The contents described in the first embodiment can be applied to a method for manufacturing a semiconductor device using this wiring board. In FIG. 6, illustration of the wiring pattern is omitted. The plurality of slits 52 are formed in a straight line. When the substrate 50 has a tape shape,
The slit 52 is formed to extend in a direction perpendicular to the longitudinal direction, that is, in the width direction. Also in the present embodiment, the same effects as in the first embodiment can be achieved.

(Third Embodiment) FIG. 7 is a view showing a wiring board according to a third embodiment of the present invention. The wiring board shown in the figure includes a tape-shaped board 60. The first and second regions 62 and 64 of the substrate 60
0 are arranged in the width direction. By doing so, the portion that is wasted and discarded is reduced, and the substrate 60 can be used efficiently. The first region 64 of the substrate 60
The hole 66 may be formed in the same manner as in the embodiment. Also,
The plurality of first and second regions 62 and 64 may be repeatedly formed in the longitudinal direction of the substrate 60. Also, the first region 62
The slit 68 formed between the substrate 60 and the second region 64 extends in the longitudinal direction of the substrate 60. FIG.
, The illustration of the wiring patterns and the connection members is omitted.

The other structure is the same as that of the wiring board shown in FIG. 1, and the method described in the first embodiment can be applied to a method of manufacturing a semiconductor device using this wiring board.

In addition to the above-described embodiments, when the substrate is flexible (for example, in the case of a thin polyimide film), a slit between the first region and the second region is not necessarily required, and the flexibility of the substrate itself is used. Then, it may be configured to be bent.

FIG. 8 shows a semiconductor device 1 to which the present invention is applied.
The circuit board 1000 on which the circuit board 100 is mounted is shown. Generally, an organic substrate such as a glass epoxy substrate is used for the circuit board. Wiring patterns made of, for example, copper are formed on the circuit board so as to form a desired circuit, and the electrical continuity is achieved by mechanically connecting the wiring patterns and external terminals of the semiconductor device.

FIG. 9 shows a notebook personal computer 120 as an electronic device having a semiconductor device to which the present invention is applied or an electronic device having the circuit board.
0 is shown.

It is to be noted that the constituent element "semiconductor chip" of the present invention is replaced with "electronic element" and bumps are formed on the electrodes of the electronic element (whether active or passive) in the same manner as the semiconductor chip. Can also. Electronic components manufactured from such electronic elements include, for example, resistors, capacitors, coils, oscillators, filters, temperature sensors, thermistors, varistors, volumes, or fuses.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a method for manufacturing a semiconductor device according to a first embodiment to which the present invention is applied.

FIG. 2 is a diagram illustrating a method of manufacturing a semiconductor device according to a first embodiment to which the present invention is applied.

FIG. 3 is a diagram illustrating a method of manufacturing the semiconductor device according to the first embodiment to which the present invention is applied.

FIG. 4 is a diagram illustrating a method of manufacturing a semiconductor device according to a first embodiment to which the present invention is applied.

FIG. 5 is a diagram illustrating a semiconductor device according to a first embodiment to which the present invention is applied;

FIG. 6 is a diagram showing a wiring board according to a second embodiment to which the present invention is applied.

FIG. 7 is a diagram showing a wiring board according to a third embodiment to which the present invention is applied.

FIG. 8 is a diagram showing a circuit board according to an embodiment of the present invention.

FIG. 9 is a diagram illustrating an electronic apparatus including a semiconductor device or a circuit board according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Substrate 11 Slit 12 1st area 14 2nd area 16 hole 20 Wiring pattern 26 Connection member 28 Conductive foil 30 Semiconductor chip 40 External terminal

Claims (20)

[Claims] A first step of preparing a substrate including a first region and a second region adjacent to the first region on which a wiring pattern is formed, and a semiconductor chip; and providing the semiconductor in the first region. A second step of mounting a chip, and the first and second regions are connected to each other while the first and second regions remain connected.
A third step of attaching the second region to a portion of the region other than the mounting region of the semiconductor chip, and providing an external terminal at least outside the mounting region of the semiconductor chip in the first region. A method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein a hole having a size larger than an outer shape of the semiconductor chip is formed in the second region of the substrate. A method of manufacturing a semiconductor device, wherein the semiconductor chip is inserted into the hole and the second region is attached to the first region. 3. The semiconductor device according to claim 1, wherein at least one slit is formed in said substrate between said first region and said second region. Manufacturing method. 4. The method of manufacturing a semiconductor device according to claim 3, wherein a connection member connecting the first and second regions across the slit is formed on the substrate, and the third step is performed. Before, the first member is connected only by the connecting member.
The first and second regions are connected in a state where the first and second regions are connected.
A method of manufacturing a semiconductor device, comprising a step of punching the substrate at least in an outer shape of a second region of the region. 5. The method of manufacturing a semiconductor device according to claim 4, wherein said connection member is formed of the same member as said wiring pattern. 6. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of punching said bonded first and second regions after said third step. Production method. 7. The method of manufacturing a semiconductor device according to claim 1, wherein the substrate has a tape shape, and the first region and the second region are repeatedly arranged in a longitudinal direction. Semiconductor device manufacturing method. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the substrate has a tape shape, the first region and the second region are arranged in a width direction, and The method for manufacturing a semiconductor device, wherein each of the first region and the second region is repeatedly arranged in the longitudinal direction. 9. A first area on which a semiconductor chip is mounted;
A substrate including a second region adjacent to the first region; and a wiring pattern formed on the substrate, wherein a hole having a size equal to or larger than the outer shape of a semiconductor chip is formed in the second region of the substrate. A wiring substrate, wherein the substrate has at least one slit formed between the first region and the second region. 10. The wiring board according to claim 9, wherein a connection member that connects the first and second regions across the slit is formed on the substrate. 11. The wiring board according to claim 10, wherein the connection member is formed of the same material as the wiring pattern. 12. The wiring substrate according to claim 9, wherein the substrate has a tape shape, and the first region and the second region are repeatedly arranged in a longitudinal direction. substrate. 13. The wiring substrate according to claim 9, wherein the substrate has a tape shape, the first region and the second region are arranged in a width direction, and the first region And a wiring board in which each of the second regions is repeatedly arranged in the longitudinal direction. 14. A semiconductor device manufactured by the method according to claim 1. 15. A semiconductor chip having a plurality of electrodes formed thereon, a wiring pattern formed thereon, a first substrate having the semiconductor chip mounted thereon, a plurality of external terminals provided on the wiring pattern, A second substrate attached to the first substrate avoiding the semiconductor chip and made of the same material as the first substrate; an end of the first substrate and an end of the second substrate; And a connection member for connecting in a bent state. 16. The semiconductor device according to claim 15, wherein a conductive foil is formed on the second substrate, and the connection member electrically connects a part of the wiring pattern to the conductive foil. Semiconductor device. 17. The semiconductor device according to claim 16, wherein said wiring pattern, conductive foil, and connecting member are formed of the same material. 18. The semiconductor device according to claim 16, wherein a plurality of through holes are formed in the first substrate,
The external terminal is provided on the wiring pattern via the through hole, the external terminal protrudes from a surface of the first substrate opposite to a surface on which the wiring pattern is formed, and the second substrate is A semiconductor device bonded to the first substrate via an insulating adhesive with a surface on which the conductive foil is formed facing the wiring pattern; 19. A circuit board on which the semiconductor device according to claim 14 is mounted. 20. Electronic equipment having the semiconductor device according to claim 14. Description: