JP2000261308A - Superconducting signal conversion circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase input sensitivity and operation margin and to realize a high speed operation by constituting a superconducting signal conversion circuit with a circuit of Josephson junction where one end is connected to a signal input terminal and the other end to ground, Josephson junction where one end is connected to a signal output terminal and the other end to ground and Josephson junction which is connected between the signal input terminal and the signal output terminal through inductance. SOLUTION: In a circuit where an output signal from the circuit of fluxoid type logic is converted into a signal that can be operated in the circuit of voltage-type logic, DC current (DC) is supplied to Josephson junction J1 through a bias field resistor Rb1 and AC current (AC) is supplied to Josephson junction J2 through a bias field resistor Rb2. The value of damping resistor Rb1 is set so that Josephine junction J1 operates in an over damping state where a Mc Cumber constant is not more than '1'. The value of a damping resistor Rb2 is set so that Josephson junctions J2 and J3 operate in an under damping state where the Mc Cumber constant is not less than '1'.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superconducting integrated circuit comprising a Josephson element operating at a very low temperature as a basic element.

In general, there are roughly two types of superconducting integrated circuits of this type. One is to use a strong nonlinearity appearing in the current-voltage characteristics of the Josephson element, and is called a voltage type logic. The voltage type logic has the same logic type as the logic used in a semiconductor integrated circuit. The other uses the nonlinearity of the current phase characteristic of the Josephson element and is called a fluxoid type logic.

The present invention relates to a superconducting signal conversion circuit for converting an output signal from a fluxoid type superconducting integrated circuit into a signal operable by a voltage type superconducting integrated circuit. Therefore, such a superconducting signal conversion circuit can be used in a case where a circuit of a fluxoid type logic and a circuit of a voltage type logic are mixed, or a case where a circuit of a fluxoid type logic is connected to a semiconductor circuit.

[0004]

2. Description of the Related Art A superconducting integrated circuit of the voltage type logic has a constant voltage for a fixed time (for example, during a clock cycle). This is a circuit that performs a logical operation according to the voltage level. The operation signal of the voltage-type logic superconducting integrated circuit is referred to as a level signal herein.

In a voltage-type logic superconducting integrated circuit, usually,
A Josephson element in an under-damped state having a Mackamba coefficient of 1 or more is used by being biased with an alternating current (the Mackamba coefficient is one constant indicating the characteristic of the Josephson element and is expressed by 2πI ₀ CR _D ² / Φ ₀₎ . is where, I0 is the critical current of the Josephson element, C is the capacitance, R _D is the resistance, [Phi ₀ details showing a single flux quantum, the literature:.. Baifukan issued ultrafast Josephson device P. 38).

On the other hand, a superconducting integrated circuit of the fluxoid type is a single flux quantum (SFQ).
A circuit that outputs a pulse, and performs a logic operation in accordance with the propagation of magnetic flux quantum and the quantum state of the circuit. The operation signal of the superconducting integrated circuit of the fluxoid type logic is referred to as an SFQ pulse signal. In a superconducting integrated circuit of the fluxoid type logic, usually, a Josephson element in an overdamped state having a MacKamba coefficient of 1 or less is used by being biased with a direct current. Therefore, in order to transmit the output information from the superconducting integrated circuit of the fluxoid type to the superconducting integrated circuit of the voltage type, it is necessary to convert the SFQ pulse signal into a level signal and input it.

As a circuit for converting such a SFQ pulse signal into a level signal, a HUFFLE gate capable of outputting a level signal and being biased with the same direct current as a conventional superconducting integrated circuit of a fluxoid type logic (reference) : IEEE
Trans on Mag., Vol.MAG-15, no.1, pp.408-411, 197
9) has been used.

FIG. 4 shows an example of a signal conversion circuit using the HUFFFLE gate. This circuit switches the SQUID1 to a voltage state when a DC current is biased to the SQUID1 composed of the Josephson junctions J1 and J2 and the SQUID2 composed of the Josephson junctions J3 and J4, and when the SFQ pulse is input to the SET terminal. Most of the bias current is the resistance Rd1, the inductance L,
Flow to ground via ID2. The current flowing through the inductance L continues to flow in the same direction until the next SFQ pulse is input to the RESET terminal. SFQ pulse is R
When input to the ESET terminal, SQUID2 switches to the voltage state and SQUID1 is reset to the superconducting state by its reaction, so that most of the bias current is SQUID.
It flows to ground via D1, inductance L, and resistance Rd2. Therefore, a current in the opposite direction to the inductance L continues to flow until the next SFQ pulse is input to the SET terminal. By the above operation, a current of a constant value whose polarity is inverted according to the input of SET and RESET flows to the inductance L. Since the current or voltage flowing through the inductance is a level signal, a level signal can be obtained by extracting this signal as an output. Therefore, SFQ added to the SET or RESET terminal
Pulses can be converted to level signals.

[0009]

However, the signal conversion circuit using the conventional HUFFLE gate has the following problems. First, in order for the HUFFLE gate to operate normally, it is necessary to design the inductance L to a relatively large value. Therefore, the time constant of L / R becomes large and it is difficult to operate at high speed. There is a problem. Second, the HUFFLE gate has a phenomenon called latch-up, which causes a problem that the operation margin is small. This is because two SQUID1 and SQUID2 transition to the voltage state at the same time.
The LE gate cannot operate normally. This latch-up problem can be avoided to some extent by appropriately setting the value of the resistor Rd3, but as a result, there is also a problem that the driving voltage is reduced and the operation speed is reduced. Third, the SFQ pulses were magnetically coupled
In order to input to the SQUID gate, it is necessary to input a pulse having a relatively large current value, and input sensitivity is poor. Fourth,
There have been various problems such as the need to combine two input signals, SET and RESET.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and it is an object of the present invention to provide a superconducting signal conversion circuit which has a large input sensitivity and an operation margin and can operate at high speed. is there.

[0011]

In order to achieve the above object, a superconducting signal conversion circuit according to one embodiment of the present invention comprises:
A first Josephson junction having one end connected to the signal input end and the other end grounded; a second Josephson junction having one end connected to the signal output end and the other end grounded; A third Josephson junction connected between the signal output terminals via an inductance, a DC bias current of a predetermined value is injected into the signal input terminal, and a predetermined value is supplied to the signal output terminal. AC bias current is injected, the first Josephson junction has a characteristic capable of operating in an overdamping state with a Mackamba constant of 1 or less, and the second and third Josephson junctions have a Mackamba constant of 1 It has the characteristic that it can operate in the above underdamping state.

In the above-described circuit, a superconducting critical current value of the third Josephson junction is set to be larger than a superconducting critical current value of the second Josephson junction. good. Furthermore, assuming that the value of the inductance is L and the value of the minimum superconducting critical current value among the superconducting critical current values of the first, second and third Josephson junctions is I, the inductance and the first and second The circuit may be characterized in that the LI product of the superconducting loop including the second and third Josephson junctions is set to be equal to or less than the single flux quantum Φ ₀ .

The first Josephson junction has a first damping resistor having a desired value between the signal input terminal and the ground plane so that the first Josephson junction has a characteristic capable of operating in an overdamping state with a Mackamba constant of 1 or less. The second and third Josephson junctions are characterized in that a second damping resistor having a desired value is connected between a signal output terminal and a ground plane so that the second and third Josephson junctions can operate in an underdamping state with a Mackamba constant of 1 or more. May be used.

A superconducting signal conversion circuit according to another embodiment of the present invention has a first Josephson junction having one end connected to a signal input end and the other end grounded, and one end connected to a first connection point. A second Josephson junction with the other end grounded, a third Josephson junction with one end connected to the signal output end and the other end grounded, between the signal input end and the first connection point. A fourth Josephson junction connected via an inductance, a first resistor connected between the first connection point and the second connection point, and a connection between the second connection point and the output terminal A second resistor is connected, and a third resistor is connected between the first connection point and the output terminal. A DC bias current of a predetermined value is injected into the signal input terminal. ,
An AC bias current of a predetermined value is injected into the second connection point, and the first Josephson junction has a characteristic that it can operate in an overdamping state with a Mackamba constant of 1 or less. The third and fourth Josephson junctions are characterized in that they have a characteristic that they can operate in an under-damping state with a Mackamba constant of 1 or more. Further, the circuit may be such that the superconducting critical current value of the fourth Josephson junction is set to be larger than the superconducting critical current value of the second Josephson junction. Further, assuming that the inductance value is L and the minimum superconducting critical current value among the superconducting critical current values of the first, second and fourth Josephson junctions is I, the inductance and the first and second Josephson junctions are LI of superconducting loop consisting of second and fourth Josephson junctions
The circuit may be characterized in that the product is set to be equal to or less than the single flux quantum Φ ₀ . In addition, a first damping resistor having a desired value is provided between the signal input terminal and the ground plane so that the first Josephson junction has a characteristic capable of operating in an overdamping state with a Mackamba constant of 1 or less. The third and fourth Josephson junctions have a Mackamba constant of 1
A circuit may be provided in which a second damping resistor having a desired value is connected between a signal output terminal and a ground plane so as to have a characteristic operable in the under-damping state.

In a superconducting loop composed of a first Josephson junction, an inductance and a second Josephson junction biased with a direct current, an SFQ pulse, which is an input signal, is supplied to a superconducting loop whose LI product is Φ ₀ or less ( For example, LI = 0.
Under the condition of 5Φ ₀ ), the peak value (maximum current value of the pulse) of the SFQ pulse is amplified. Thus, even if the SFQ pulse has a small peak value, S
It can be converted to an FQ pulse and input to the second Josephson junction. As a result, the second Josephson junction biased by the alternating current can easily transition to the voltage state, and has the effect of increasing the input sensitivity and operation margin of this circuit. The second and third or fourth Josephson junctions that have once transitioned to the voltage state operate in the under-damping state, and thus maintain the voltage state until the AC bias current falls. As a result, a level signal synchronized with the AC bias current can be generated, and the signal conversion from the SFQ pulse to the level signal is realized. The overdamping or underdamping characteristics of the Josephson junction can be easily set by the value of the damping resistance.

[0016]

Next, embodiments of the present invention will be described with reference to the drawings.

(First Embodiment) FIG. 1 is an equivalent circuit diagram showing a configuration of a first embodiment of a superconducting signal conversion circuit according to the present invention. The superconducting signal conversion circuit of the present embodiment includes a Josephson junction (J1, J2, and J3) and a damping resistor (R
d1 and Rd2), inductance (L1), and bias feed resistance (Rb1 and Rb2). (Note that, in the figure, one end of the damping resistor Rd2 is connected to the ground plane, but when an output signal is input to the next gate, one end of the damping resistor Rd2 is connected to the input terminal of the next gate. In such a configuration, a direct current (D
C) is supplied via a bias feed resistor Rb1,
An alternating current (AC) is supplied to the Josephson junction J2 via a bias feed resistor Rb2. The value of the damping resistor Rd1 is set to a desired value so that the Josephson junction J1 operates in an over-damping state with a Mackamba constant β = 1 or less. The value of the damping resistor Rd2 is such that the Josephson junctions J2 and J3 have a McKamba constant β =
It is set to a desired value so as to operate in one or more under-damping states. For example, as an example, these circuit constants can be set as follows. J1 = 0.25 mA, J2 = 0.15 mA, J
3 = 0.18 mA, L1 = 4 pH, Rd1 =
1.5Ω, Rd2 = 20Ω, Rb1 = 14Ω,
Rb2 = 93Ω, Idc = 0.2 mA, Iac
= 0.12 mA Here, the inductance L1 and the Josephson junction J1
Product of the superconducting loop consisting of J2 and J2 and J3 (L = 4
pH, I = 0.15 mA) is set to about 0.29Φ ₀ (magnetic flux quantum).

FIG. 2 is a schematic diagram showing operation waveforms obtained by simulation. From above, input signal (SFQ pulse), A
7 shows a C bias signal and a waveform of a current flowing through a damping resistor Rd2, which is an output waveform of this circuit.

The operation of the present embodiment will be described with reference to these operation waveforms. First, SF injected into the signal input terminal
The Q pulse is amplified in a superconducting loop composed of a Josephson junction (J1, J2, J3) and an inductance (L1), and is input to the Josephson junction (J2). As a result, the Josephson junction (J2) transitions to a voltage state. Since the Josephson junction (J2) is set to operate in the under-damping state, once the state changes to the voltage state, the voltage state is maintained until the AC bias current becomes zero. By the above operation, SF
An output signal (level signal) that rises when the Q pulse is input and falls in synchronization with the AC bias current can be obtained. In this circuit, the input sensitivity is increased because the SFQ pulse is directly input and the peak value of the SFQ pulse is amplified in the superconducting loop. In addition, as a result of the increase in input sensitivity, the operation area of the AC bias current is expanded, and the operation margin of the entire circuit is increased. This circuit does not require a large inductance load unlike a signal conversion circuit using a conventional HUFFLE gate, and is therefore suitable for high-speed operation.

As described above, the superconducting signal conversion circuit according to the embodiment of the present invention has a high input sensitivity to the SFQ pulse signal, has a wide operation margin, and can operate at high speed. There is an effect that a circuit can be realized.

In the above-described embodiment, a damping resistor Rd1 is added in parallel to the Josephson junction J1 so that the Josephson junction J1 operates in an overdamping state with a Mackamba constant β of about 1, and the Josephson junction J2 and A damping resistor Rd2 is added in parallel to the Josephson junction J3 so that J3 operates in an under-damping state with a Mackamba constant β of about several tens. For example, as in the case of a Josephson junction made of a high-temperature superconductor, If the value of the Mackamba constant can be realized as a characteristic of the junction itself, the same effect can be obtained without adding such a damping resistance.

(Second Embodiment) FIG. 3 shows a second embodiment of the present invention.
FIG. 4 is an equivalent circuit diagram illustrating a configuration of a superconducting signal conversion circuit according to the embodiment. The superconducting signal conversion circuit according to this embodiment includes a Josephson junction (J1, J2, J3, and J4), a damping resistor (Rd1 and Rd2), and an inductance (L1).
And bias feed resistors (Rb1 and Rb2) and shunt resistors (R1, R2 and R3). (Note that, in the present embodiment, one end of the damping resistor Rd2 is connected to the ground plane as in the first embodiment. It is connected to the input terminal of the next stage gate.) In such a configuration, the Josephson junction J1
Has a direct current (DC) applied to the bias feed resistor Rb1.
And the Josephson junctions J2 and J3 have
An alternating current (AC) is supplied via a bias feed resistor Rb2 and a shunt resistor (R1, R2 and R3). The value of the damping resistor Rd1 is set to a desired value so that the Josephson junction J1 operates in an over-damping state with a Mackamba constant β = 1 or less. Damping resistance Rd2
Is set to a desired value so that the Josephson junctions J2, J3, and J4 operate in an underdamping state with a McCumber constant β of 1 or more. For example, as an example, these circuit constants can be set as follows. J1 = 0.25 mA, J2 = 0.15 mA, J
3 = 0.15 mA, J4 = 0.18 mA, L1 =
4 pH, Rd1 = 1.5Ω, Rd2 = 10Ω,
Rb1 = 14Ω, Rb2 = 47Ω, R1 = R
2 = R3 = 1Ω, Idc = 0.2 mA, Iac =
0.24 mA Here, the inductance L1 and the Josephson junction J1
Product of the superconducting loop consisting of J2 and J2 and J3 (L = 4
pH, I = 0.15 mA) is set to about 0.29Φ ₀ (magnetic flux quantum).

The circuit according to the second embodiment has the same operation and effect as the circuit according to the first embodiment, but the circuit according to the second embodiment is different from the circuit according to the first embodiment. There is an effect that an output current twice as large as that of such a circuit can be obtained. That is, a level signal of an output current twice as high as that of the SFQ input pulse having the same peak value is obtained. This can be considered that the input sensitivity is doubled as compared with the first embodiment.

As described above, the superconducting signal conversion circuit according to the present embodiment has higher input sensitivity to SFQ pulse signals, has a wide operation margin, and can operate at high speed. There is an effect that can be realized.

Also in the circuit according to the second embodiment, the Josephson junction J1 is operated so that the Josephson junction J1 operates in an overdamping state with a Macmber constant β of about 1.
A damping resistor Rd1 is added in parallel, and a damping resistor Rd2 is added between the output terminal and the ground plane so that the Josephson junctions J2, J3, and J4 operate in an underdamping state with a Mackamba constant β of about several tens. However, if the value of the Mackamba constant can be realized as a characteristic of the junction itself, such as a Josephson junction made of a high-temperature superconductor, a similar effect can be obtained without adding such a damping resistance. Can be.

[0026]

As described above, according to the present invention, SF
A superconducting signal conversion circuit having high input sensitivity to a Q pulse signal, having a wide operation margin, and capable of operating at high speed can be realized.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram for explaining a superconducting signal conversion circuit according to a first embodiment of the present invention.

FIG. 2 is a schematic diagram of a simulation waveform for explaining a superconducting signal conversion circuit according to the first embodiment of the present invention.

FIG. 3 is an equivalent circuit diagram for explaining a superconducting signal conversion circuit according to a second embodiment of the present invention.

FIG. 4 is an equivalent circuit diagram for explaining a conventional technique.

[Explanation of symbols]

 J1-J4 Josephson junction L, L1 Inductance Rd1, Rd2, Rd3 Damping resistance Rb1, Rb2, Rb Bias feed resistance R1, R2, R3 Shunt resistance Idc DC bias current Iac AC bias current In Input signal terminal Out Output signal terminal

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Kazunori Miyahara 1-14-3 Shinonome, Koto-ku, Tokyo Foundation International Research Institute for Superconducting Technology, Superconductivity Engineering Laboratory (72) Inventor Yoichi Enomoto, Koto-ku, Tokyo 1-14-3 Shinonome Foundation International Research Institute for Superconducting Technology, Superconductivity Engineering Laboratory F-term (reference) 4M113 AA44 AD15 AD23 5J042 AA03

Claims (8)

[Claims] 1. A first Josephson junction having one end connected to a signal input end and the other end grounded, a second Josephson junction connected at one end to a signal output end and the other end grounded, A third Josephson junction connected between the signal input terminal and the signal output terminal via an inductance, a DC bias current of a predetermined value is injected into the signal input terminal, and the signal output terminal An AC bias current of a predetermined value is injected into an end of the first and second Josephson junctions, and the first Josephson junction has a characteristic that it can operate in an overdamping state with a Mackamba constant of 1 or less. A superconducting signal conversion circuit characterized in that the junction has a characteristic that it can operate in an under-damping state with a Mackamba constant of 1 or more. 2. The superconducting signal conversion circuit according to claim 1, wherein a superconducting critical current value of the third Josephson junction is:
A superconducting signal conversion circuit, wherein the superconducting signal is set to be larger than a superconducting critical current value of the second Josephson junction. 3. The superconducting signal conversion circuit according to claim 1, wherein L is an inductance value and is a minimum of superconducting critical current values of the first, second, and third Josephson junctions. Is defined as I, the LI product of the inductance and the superconducting loop composed of the first, second and third Josephson junctions is less than the single flux quantum Φ _0. A superconducting signal conversion circuit characterized in that: 4. The superconducting signal conversion circuit according to claim 1, wherein the first Josephson junction has a first value having a desired value such that the first Josephson junction can operate in an overdamping state with a Mackamba constant of 1 or less. Between the signal input terminal and the ground plane, and the second and third Josephson junctions have a second damping resistor having a desired value such that the second and third Josephson junctions can operate in an under-damping state having a Mackamba constant of 1 or more. Is connected between the signal output terminal and the ground plane. 5. A first Josephson junction having one end connected to the signal input end and the other end grounded, and a second Josephson junction having one end connected to the first connection point and the other end grounded. A third terminal having one end connected to the signal output terminal and the other end grounded.
A fourth Josephson junction connected through an inductance between the signal input terminal and the first connection point; and a fourth Josephson junction connected between the first connection point and the second connection point. A first resistor, a second resistor connected between the second connection point and the output terminal, and a third resistor connected between the first connection point and the output terminal. A DC bias current of a predetermined value is injected into the signal input terminal, an AC bias current of a predetermined value is injected into the second connection point, and the first Josephson junction is connected to a Mackamba constant. Has a characteristic that can operate in an overdamping state of 1 or less, and the second, third, and fourth Josephson junctions have characteristics that can operate in an underdamping state in which the Mackamba constant is 1 or more. Superconducting signal conversion circuit. 6. The superconducting signal conversion circuit according to claim 5, wherein a superconducting critical current value of the fourth Josephson junction is:
A superconducting signal conversion circuit, wherein the superconducting signal is set to be larger than a superconducting critical current value of the second Josephson junction. 7. The superconducting signal conversion circuit according to claim 5, wherein L is an inductance value, and is a minimum superconducting current value among superconducting critical current values of the first, second, and fourth Josephson junctions. Assuming that the value of the conduction critical current value is I, the LI product of the superconducting loop including the inductance and the first, second, and fourth Josephson junctions is set to be equal to or less than one flux quantum Φ _0. Superconducting signal conversion circuit. 8. The superconducting signal conversion circuit according to claim 5, wherein the first Josephson junction has a first value having a desired value such that the first Josephson junction can operate in an overdamping state with a Mackamba constant of 1 or less. The second, third, and fourth Josephson junctions have a second value of a desired value such that the second and third and fourth Josephson junctions can operate in an under-damping state with a Mackamba constant of 1 or more. A superconducting signal conversion circuit, wherein the damping resistor is connected between a signal output terminal and a ground plane.