JP2000259117A - Driving method for plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a PDP which is of highly accurate and which has a high- image quality by setting optimum driving voltages of driving waveforms in respective sequences and broading driving voltage margins even in a panel in which ranges of optimum driving voltages are different, making drives high speeds by suppressing delays of discharge and far improving the flicker and the roughness of a picture or the like due to write failures and the reduction of a discharge probability in the leading pulse of a sustenance period. SOLUTION: A PDP which is of highly accurate and which has a very high- image quality is realized by setting the voltage of the initialization pulse of a setup period prior to a write period to a voltage independent from a driving voltage in a sustenance period while using a pulse waveform having inclinations of at least two steps or more to suppress light emissions due to unwanted discharge and also to shorten the setup period and to set driving voltages in respective periods to optimum driving voltages and to suppress write failures while suppressing delays of discharge.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel used for displaying images on a computer, a television and the like.

[0002]

2. Description of the Related Art In recent years, it has been desired to increase the size of image displays such as computer displays and televisions, and accordingly, plasma display panels (hereinafter abbreviated as PDPs) have become thin and lightweight displays.
In high-definition televisions that are currently being put into practical use, full-spec pixels with 1920 pixels
Although the resolution is as high as × 1080, as in other displays, a driving technique that can cope with such a high-definition display is desired in PDPs.

A conventional PDP generally has a configuration as shown in FIG. In the figure, a band-shaped scan electrode group 19a and a band-shaped sustain electrode group 19 are formed on a front substrate 11.
b is formed, and the electrode groups 19a and 19b are covered with a dielectric glass layer 17 made of lead glass or the like, and the surface of the dielectric glass layer 17 has a protective layer 18 made of a MgO vapor-deposited film or the like.
Covered with.

On the back substrate 12, a band-like data electrode group 1 is provided.
4 and an insulator layer 13 made of lead glass or the like that covers the surface, and a partition 15 is provided thereon. The front substrate 11 and the rear substrate 12 are combined so that respective electrode groups are orthogonal to each other. The partition 15 is adhered to the rear substrate 12 and is in contact with the front substrate 11. Normally, the front substrate 11 and the rear substrate 12 face each other and are sealed by the partition walls 15 at intervals of about 100 to 200 microns.

By selectively applying a voltage between the electrode groups 19a and 19b on the front substrate 11 and the data electrode group 14 on the rear substrate 12, the charge generated by the gas discharge at the intersection of the selected electrodes is reduced. By scanning the electrode that is accumulated on the dielectric glass insulating film 17 and to which a voltage is to be applied, 1
After an address operation for accumulating information of pixels for a screen, a sustain discharge operation for applying an AC pulse voltage between the electrode group 19a and the electrode group 19b on the front substrate 11 allows discharge cells selected in the address operation to be simultaneously performed. An image is displayed by emitting light. Since the discharge occurs in the space separated by the front substrate 11, the rear substrate 12, and the partition 15, the light emission does not diffuse. That is, the partition 15 has the purpose of defining the distance between the front substrate 11 and the rear substrate 12 and the purpose of performing high-resolution display.

Further, when performing color display, the phosphor 16 is applied to the periphery of the discharge space blocked by the partition. Since the phosphor is formed by converting ultraviolet light generated by discharge into visible light, three primary colors of red (R), green (G), and blue (B) are used, and the emission intensity of each is reduced. By appropriate adjustment, color display becomes possible.

As a discharge gas, in the case of a single color display, a mixed gas mainly composed of neon, which emits light in the visible region at the time of discharge, and in the case of a color display, the emission of light during discharge is in an ultraviolet region. A mixed gas centered on xenon is selected. The gas pressure assumes the use of PDP under atmospheric pressure,
Usually, the pressure inside the substrate is reduced to 2
It is set in a range from about 00 Torr to about 500 Torr. FIG. 7 shows an electrode matrix diagram of a conventional PDP.

Next, a conventional PDP driving method will be described with reference to FIG. In FIG. 8, first, an initialization pulse is applied to the scan electrode groups 19a1 to 19aN to initialize wall charges in the discharge cells of the panel. At this time, the contrast is improved by suppressing unnecessary light emission by initializing with a weak discharge using a ramp waveform in which a part of a rising part and a part of a falling part of the initialization pulse are inclined. Was.

Next, a scan pulse is simultaneously applied to the first electrode 19a1 of the scan electrode group 19a, and a write pulse is simultaneously applied to the lines 141 to 14M corresponding to the discharge cells for displaying the data electrode group 44, and a write discharge is performed. Accumulate wall charges on the surface of the body layer.

Next, the second line electrode 1 of the electrode group 19a
A scan pulse is applied to 9a2 and a write pulse is simultaneously applied to lines 141 to 14M corresponding to the discharge cells for displaying the data electrode group 14, thereby causing a write discharge to accumulate wall charges on the surface of the dielectric layer. Subsequently, similarly, a latent image for one screen is written by sequentially accumulating wall charges corresponding to cells to be displayed by continuous scanning on the surface of the dielectric layer.

Next, in order to perform a sustain discharge, the data electrode group 14 is grounded, and a sustain pulse is alternately applied to the scan electrode group 19a and the sustain electrode group 19b.
In a cell in which wall charges are accumulated on the surface of the dielectric layer, a discharge occurs when the potential on the surface of the dielectric exceeds the discharge start voltage, and a display selected by a write pulse during a sustain pulse is applied (sustain period). Main discharge of the cell is maintained. Thereafter, an incomplete discharge is generated by applying a narrow erasing pulse, and the wall charges disappear, so that erasing is performed.

As described above, in the conventional PDP driving method,
Display is performed according to a series of sequences including an initialization period, a writing period, a sustaining period, and an erasing period.

When displaying a television picture, the picture is composed of 60 frames per second in the NTSC system. Originally, in a plasma display panel, only two gradations of lighting or extinguishing can be expressed, and in order to display an intermediate color, the lighting time of each color of red (R), green (G), and blue (B) is time-divided. A method of dividing one frame into several subfields and expressing an intermediate color by a combination thereof is used.

FIG. 9 shows a method of dividing a subfield when 256 gradations of each color are expressed in a conventional plasma display panel. The ratio of the number of sustain pulses applied during the sustain period of each subfield is 1, 2, 4, 8, 1
Weighting is performed in binary such as 6, 32, 64, and 128, and 256 gradations are expressed by the combination of these 8 bits.

[0015]

However, in the above-mentioned conventional driving method, the address period is increased due to the increase in the number of scanning lines accompanying the high definition, and the address pulse is shortened and the necessary subfield is secured. It is indispensable to speed up the drive waveform by shortening the initialization period. However, address failure due to a decrease in write discharge probability due to shortening of the address pulse, and an increase in initialization discharge light emission due to a shortening of the initialization period, that is, a decrease in contrast ratio. This is a very serious problem that significantly lowers the image quality.

In order to solve this, it is necessary to set the voltage of the driving pulse in each sequence to an optimum value. However, in the conventional driving method, the voltage Vset1 of the first stage of the initialization pulse prior to the writing period is set. And the voltage Vaddsus applied to the sustain electrode during the writing period and the voltage Ver applied to the sustain electrode during the erasing period are all supplied from the same power supply as the sustain voltage Vsus applied to the discharge cells during the sustain period. In addition, Vset1 = Vaddsus = Ver =
Vsus, and the panel in which the optimum driving voltage range in each sequence is different has a very large problem that the driving voltage margin becomes very narrow and the operation becomes unstable. Was.

The present invention solves the above-mentioned conventional problems. By setting an optimum driving voltage in each sequence of driving waveforms, the driving voltage margin can be increased even in panels having different optimum driving voltage ranges, and discharge can be performed. The object is to provide a high-definition and high-quality PDP by drastically improving screen flickering and roughness due to a writing failure and a decrease in the discharge probability of the first pulse in the sustain period by suppressing delay, thereby improving writing. And

[0018]

In order to achieve the above object, the present invention is directed to a first and a second panel substrates, which are disposed in parallel with each other with a gap therebetween, and the first and second panel substrates are opposed to the second panel substrate. A first electrode group consisting of a plurality of electrode branches and a second electrode group consisting of a plurality of electrode branches covered with a dielectric layer are arranged on the surface of the panel substrate in such a manner that the electrode branches are adjacent to each other in parallel. And a third electrode group comprising a plurality of electrode branches covered with a dielectric layer and arranged in a direction orthogonal to the first electrode group on a surface of the second panel substrate opposed to the first panel. Is disposed, and the gap is partitioned by a partition group, and a setup period, an address period, and a discharge sustain period are provided for each subfield with respect to a plasma display panel in which a phosphor is disposed between the partition walls. Time-division gray scale display method in a field A driving method of a plasma display panel to be driven, comprising: a set-up unit for setting up by applying a pulse voltage to the first electrode group; and setting up a third electrode group while sequentially applying a pulse voltage to the first electrode group. Applying a pulse voltage to a selected electrode in the address section to accumulate wall charges at a selected portion of the dielectric layer, and applying a pulse voltage between the first electrode group and the second electrode A discharge sustaining unit that sustains a discharge; and an erasing unit that applies a pulse voltage between the first electrode group and the second electrode to stop the discharge. , A voltage Vst1 that is higher than the pulse voltage Vsus applied between the first electrode group and the second electrode and lower than the discharge start voltage V1 is raised in 10 μsec or less, and then the discharge is opened at a slope of 9 V / μsec or less. A section in which the voltage is increased to a voltage Vst2 which is equal to or higher than the starting voltage V1;
After dropping to 10μsec or less until st1, 9 to 0V
100-250μ lowered at an inclination of V / μsec or less
and a drive waveform in which the setup period is set to 360 μsec or less.

Further, the falling portion of the pulse waveform applied in the setup section falls from Vst2 to Vsus in a time of 10 μsec or less, and then falls to 0 V with a slope of 9 V / μsec or less for 100 to 250 μsec.
And a drive waveform in which the setup period is set to 360 μsec or less.

Further, according to the present invention, the first and second panel substrates are disposed parallel to each other with a gap therebetween, and a dielectric panel is provided on the surface of the first panel substrate facing the second panel substrate. A first electrode group consisting of a plurality of electrode branches and a second electrode group consisting of a plurality of electrode branches covered with a body layer are arranged in a state where the electrode branches are adjacent to each other in parallel, and the first panel is connected to the first panel. On the surface of the opposing second panel substrate, the first panel substrate is covered with a dielectric layer.
A third electrode group consisting of a plurality of electrode branches arranged in a direction orthogonal to the electrode group of the first electrode group, the gap is partitioned by a partition group, and a phosphor is provided between the partition walls. A method for driving a plasma display panel, wherein the display panel is driven by an in-field time-division gray scale display method having a setup period, an address period, and a sustain period for each subfield, wherein a pulse is applied to the first electrode group. And a set-up unit for setting up by applying a voltage, and applying a pulse voltage to a selected electrode in the third electrode group while sequentially applying a pulse voltage to the first electrode group to select a dielectric layer. An address unit that accumulates wall charges at locations, a discharge sustaining unit that applies a pulse voltage between the first electrode group and the second electrode to maintain a discharge, a first electrode group and a second electrode. And an erasing unit for applying a pulse voltage between the first and second electrodes to apply a pulse voltage between the first electrode group and the second electrode in the discharge maintaining unit. Rises to Vst1, which is the same potential as Vsus, and then from 4 V / μsec to 15 V / μsec to a voltage Vst2 lower than the discharge start voltage V1.
After rising at a slope of not more than c, an interval of rising to a voltage Vst3 of not less than a discharge starting voltage V1 at an inclination of less than 4V / μsec, and thereafter, decreasing to 10μsec or less to Vst1, and then 9V / μsec or less to 0V. And a section of 100 to 250 μsec, which is lowered at an inclination of, and uses a drive waveform in which the setup period is set to 360 μsec or less.

Further, the falling portion of the pulse waveform applied by the set-up section falls from Vst2 to Vsus in a time of 10 μsec or less and then (V1-Vsus) with a slope of 4 V / μsec or more and 15 V / μsec or less. It has a section of 100 to 250 μsec in which the voltage is lowered to 0 V with a slope of less than 4 V / μsec after the lowering, and a drive waveform in which the setup period is set to 360 μsec or less is used.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS. PD used in the present invention
The structure of the P panel is the same as the conventional one. In order to examine the change in luminous efficiency due to the driving waveform, the output of the arbitrary waveform generator was amplified by a high-speed high-voltage amplifier and applied to the discharge cells of the PDP, thereby driving with various waveforms.
At the same time, the emission peak waveform was observed using the photodiode PD. The measurement of the contrast ratio was performed by lighting a part of the panel white in a dark room and measuring the luminance ratio between the dark part and the bright part.

Hereinafter, specific driving waveforms will be described with reference to the drawings. (Embodiment 1) FIG. 1 is a timing chart showing a driving method according to Embodiment 1 of the present invention. The difference from the conventional PDP driving method is that the voltage Vst1 of the first stage is set to Vsus <Vst1 <V1 at the rising portion of the initialization pulse.
By setting the voltage higher than the sustain voltage Vsus applied to the discharge cells in the sustain period, the initializing period is shortened by shortening the subsequent voltage rising period T1 due to a gentle slope up to Vst2. That is, it is driven by independent voltages in the period and the sustain period.

In the conventional driving method, Vst1 and Vsus
Are set to the same voltage, Vst must be set to perform high-contrast and sufficient initialization within a limited initialization period.
When the voltage is increased, as shown in FIG. 2, during the sustain period, an overvoltage is applied, so that a discharge occurs at a falling portion of a pulse, and a wall voltage necessary for maintaining the discharge in the next pulse is wasted. Due to the self-erasing discharge, the discharge is not stably maintained, and proper driving cannot be performed.

When Vsus is reduced to suppress the self-erasing discharge during such a sustain period, Vst1 decreases, and the time T1 required to increase the voltage Vst2 required for initialization increases. Increase. If the rate of rise of the voltage from Vst1 to Vst2 is increased in order to suppress the increase in the initialization period, the light emission due to the initialization discharge increases and the contrast ratio remarkably decreases as shown in Table 1.

[0026]

[Table 1]

As described above, in the conventional driving method, the optimum driving voltage range, that is, the driving margin is very narrow.

FIG. 3 shows a driving voltage waveform V and a light emission peak waveform L detected by a photodiode during a sustain period when driving is performed using the driving method according to the first embodiment of the present invention.
5 shows a time-axis trace of FIG.

From these figures, it can be seen that self-erase discharge during the sustain period is suppressed by driving Vst1 and Vsus at independent voltages, and Vst1 can be set high so that Vst2 can be set without extending the initialization period. It can be seen that since the voltage can be increased with a gentle slope up to this point, sufficient initialization can be realized.

Table 2 shows a comparison between the contrast ratio and the Vsus margin when the conventional driving method and the driving method according to the first embodiment are used.

[0031]

[Table 2]

Although the Vsus margin, which was only about 4 V in the past, has been expanded to 4.5 V by 18 times by using the driving method according to the first embodiment,
The contrast is kept the same as before without lowering.

As is apparent from this, the driving method of the PDP according to the first embodiment suppresses the self-erasing discharge in the sustain period without extending the initialization period and increasing the light emission due to the initialization discharge. In addition, it is possible to realize a PDP which is very excellent in that the contrast is high and the operation margin is greatly improved.

In the first embodiment, the driving circuit for driving the PDP employs a method of applying a driving waveform obtained by voltage-amplifying the output of an arbitrary waveform generator by a high-speed high-voltage amplifier to each electrode. It is not limited to
Similarly, a method of driving the ground of a ramp waveform generating circuit using a Miller integrating circuit, floating the ground, generating an initializing pulse waveform by adding a voltage, and driving with a separate power supply from a rectangular pulse generating circuit that generates a sustaining pulse is also excellent. Needless to say, a high image quality can be realized.

The falling portion of the initialization waveform is V
After decreasing from st2 to Vsus in a time of 10 μsec or less, the voltage is decreased to 0 V with a slope of 9 V / μsec or less 1
And a section of 00 to 250 μsec,
It goes without saying that excellent image quality can also be realized by a method using a drive waveform whose setup period is set to 360 μsec or less.

(Embodiment 2) FIG. 4 is a timing chart of driving waveforms according to Embodiment 2 of the present invention. The difference from the first embodiment is that at the rising portion of the initializing pulse, after the voltage rises to Vst1 having the same potential as Vsus,
After ramping up to a voltage Vst2 lower than the discharge starting voltage V1 with a slope of 4 V / μsec or more and 15 V / μsec or less,
By increasing the voltage to a voltage Vst3 equal to or higher than the discharge start voltage V1 with a slope of less than V / μsec, the time until the initialization discharge starts can be shortened, and the discharge start voltage V1
That is, it is possible to set the voltage rising speed in the vicinity more slowly.

In the conventional driving method, if the rate of voltage rise near V1 is made slow, the initialization period will increase, and other sequences will not be pressed down to sufficiently speed up the driving.

In the driving method of the first embodiment, Vst1 can be set independently of Vsus, so that Vst1 can be set to a higher voltage than in the prior art, so that the rate of voltage rise near V1 can be reduced. However, if the voltage is increased to about 350 V in one step, erroneous discharge is likely to occur depending on the variation of the discharge cells in the panel, and the image quality is reduced.

In order to increase the voltage to about 350 V in one step, the power M having a very high withstand voltage and a high slew rate is required.
An OSFET is required, which increases the cost of the driving circuit.

FIG. 5 shows a driving voltage waveform V and a light emission peak waveform L detected by a photodiode during a sustain period when driving is performed using the driving method according to the second embodiment of the present invention.
5 shows a time-axis trace of FIG.

From these figures, it can be seen that, by driving with an initialization waveform having a two-step slope from Vst1, the occurrence of self-erasing discharge during the sustain period is suppressed, and the vicinity of V1 is maintained without increasing the initialization period. It can be seen that the light emission due to the setup discharge can be further suppressed by making the voltage rising speed slower.

Table 3 shows a comparison between the initialization time, the contrast ratio, and the Vsus margin when the conventional driving method and the driving method according to the second embodiment are used.

[0043]

[Table 3]

Although the time required for initialization is shortened by using the driving method according to the second embodiment, the contrast ratio is improved to about 1.5 times and the Vsus margin is 4.5. It has improved twice.

As is apparent from this, the driving method of the PDP according to the second embodiment solves the conflicting problems of shortening the initialization period and improving the contrast ratio, and further increases the driving voltage margin in the sustain period. As a result, stable driving becomes possible, and a very excellent high-definition PDP can be realized in that the deterioration of the image quality caused by the increase in the driving pulse speed accompanying the high definition is remarkably improved.

In the second embodiment, a method of applying a drive waveform obtained by voltage-amplifying the output of an arbitrary waveform generator by a high-speed high-voltage amplifier to each electrode is used as a drive circuit for driving a PDP. It is not limited to
Floating the ground of the ramp waveform generation circuit using Miller integration circuits with different time constants,
It goes without saying that excellent image quality can also be realized by a method of generating and driving an initialization pulse waveform having a ramp waveform with a two-step voltage rising speed from Vst1 to Vst3 of the same voltage as Vsus by a method of adding voltages.

The falling portion of the initialization waveform is V
After the voltage is lowered to Vsus in 10 μsec or less from st2, the voltage is lowered to (V1−Vsus) with a slope of 4 V / μsec or more and 15 V / μsec or less, and then 4 V / μsec.
100-250 μs to ramp down to 0V with a slope less than
ec, and it goes without saying that excellent image quality can also be realized by a method using a drive waveform in which the setup period is set to 360 μsec or less.

[0048]

As described above, the present invention uses a pulse waveform having at least two or more slopes for the initialization pulse in the setup period, and sets the voltage independent of the drive voltage in the sustain period. It is possible to suppress the light emission due to the excessive discharge and shorten the setup period, and to set the optimum driving voltage in each period. By suppressing the discharge delay and suppressing the writing failure, it is possible to achieve high definition and very high image quality. A remarkable effect of realizing PDP is obtained.

[Brief description of the drawings]

FIG. 1 is a timing chart of a driving method of a plasma display panel according to Embodiment 1 of the present invention.

FIG. 2 is a diagram showing a time axis trace of a driving voltage waveform V and a light emission peak L during a conventional sustain period.

FIG. 3 is a characteristic diagram showing a time axis trace of a driving voltage waveform V and a light emission peak L during a sustain period according to the driving method of the plasma display panel in the first embodiment.

FIG. 4 is a timing chart of a driving method of a plasma display panel in Embodiment 2 of the present invention.

FIG. 5 is a characteristic diagram showing a time axis trace of a driving voltage waveform V and a light emission peak L during a sustain period according to the driving method of the plasma display panel in the second embodiment.

FIG. 6 is a schematic diagram showing a configuration of a conventional plasma display panel.

FIG. 7 is an electrode matrix diagram of a conventional plasma display panel.

FIG. 8 is a timing chart of a conventional plasma display panel driving method.

FIG. 9 is a schematic view of a subfield of a conventional plasma display panel driving method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Front substrate 12 Back substrate 13 Insulator layer 14 Data electrode group 15 Partition 16 Phosphor 17 Dielectric glass layer 18 Protective film 19a Electrode group 19b Electrode group

Claims (4)

[Claims] A first panel substrate and a second panel substrate are arranged in parallel with a gap therebetween, and a dielectric panel is provided on a surface of the first panel substrate facing the second panel substrate. A first electrode group including a plurality of electrode branches covered by a body layer and a second electrode group including a plurality of electrode branches disposed in a state where the electrode branches are adjacent to each other in parallel; A third electrode group including a plurality of electrode branches covered with a dielectric layer and arranged in a direction perpendicular to the first electrode group is provided on a surface of the second panel substrate facing the second electrode substrate. In a plasma display panel partitioned by partition groups and having a phosphor disposed between the partition walls, an intra-field time division gray scale having a setup period, an address period, and a discharge sustain period for each subfield. Driven by display method A method of driving a display panel, comprising: a setup unit configured to apply a pulse voltage to the first electrode group to perform a setup; and selecting a third electrode group while sequentially applying a pulse voltage to the first electrode group. A pulse voltage is applied to the selected electrode, and an address portion that accumulates wall charges at a selected portion of the dielectric layer, and a pulse voltage is applied between the first electrode group and the second electrode to maintain discharge. A discharge maintaining unit to perform;
An erasing unit that stops a discharge by applying a pulse voltage between the first electrode group and the second electrode, wherein a pulse waveform applied by the setup unit includes a first electrode group and a second electrode in the discharge maintaining unit. And a voltage Vst1 which is higher than the pulse voltage Vsus and lower than the discharge start voltage V1.
Up to 10μsec or less until 9V
/ Μsec or less, with the ramp up to the voltage Vst2 higher than the discharge starting voltage V1, and then 10μm to Vst1
and a period of 100 to 250 μsec in which the voltage is lowered in a time of not more than 10 sec and then lowered to 0 V with a slope of 9 V / μsec or less.
A method for driving a plasma display panel, wherein the driving time is set to 60 μsec or less. 2. A 100-250 .mu.sec section in which the falling portion of the pulse waveform applied in the set-up section falls from Vst2 to Vsus in a time of 10 .mu.sec or less and then falls to 0 V with a slope of 9 V / .mu.sec or less. Having a setup period of 360 μs
2. The method of driving a plasma display panel according to claim 1, wherein the value is set to be equal to or less than ec. 3. A first panel substrate and a second panel substrate are disposed parallel to each other with a gap therebetween, and a dielectric panel is provided on a surface of the first panel substrate facing the second panel substrate. A first electrode group consisting of a plurality of electrode branches and a second electrode group consisting of a plurality of electrode branches covered with a body layer are arranged in a state where the electrode branches are adjacent to each other in parallel, and the first panel is connected to the first panel. A third electrode group including a plurality of electrode branches covered with a dielectric layer and arranged in a direction orthogonal to the first electrode group is provided on a surface of the second panel substrate facing the second panel substrate. For a plasma display panel partitioned by groups and having phosphors disposed between the partition walls, an in-field time division gray scale display method having a setup period, an address period, and a discharge sustain period for each subfield. Driving plasma disc A method of driving a ray panel, comprising: a setup unit configured to apply a pulse voltage to the first electrode group to perform a setup; and sequentially applying a pulse voltage to the first electrode group, wherein An address section that applies a pulse voltage to the electrodes to accumulate wall charges at selected locations in the dielectric layer, and a discharge that applies a pulse voltage between the first electrode group and the second electrode to maintain a discharge. A maintenance unit,
An erasing unit configured to apply a pulse voltage between the first electrode group and the second electrode to stop the discharge, and a pulse waveform applied by the setup unit includes a first electrode group and a second electrode in the discharge maintaining unit. After the pulse voltage applied between V.sub.sus and V.sub.sus rises to V.sub.st1 having the same potential as V.sub.sus, 4 V / .mu.
After rising at a slope of not less than c and 15 V / μsec, a section of increasing the discharge starting voltage V1 to a voltage Vst3 with a slope of less than 4 V / μsec, and thereafter, decreasing the voltage to Vst1 to 10 μsec or less, and then 9 V / 100-250μsec to lower to 0V with a gradient of μsec or less
Wherein the setup period is set to 360 μsec or less. 4. A falling portion of a pulse waveform applied in a setup section falls from Vst2 to Vsus in a time of 10 .mu.sec or less, and then 4 V / .mu.sec or more and 15 V / in.
After the voltage is lowered to (V1−Vsus) with a gradient of less than μsec, the voltage falls to 0V with a gradient of less than 4 V / μsec, and has a section of 100 to 250 μsec, and the setup period is set to 360 μsec or less. 4. The method of driving a plasma display panel according to claim 3, wherein: