JP2000252396A - Semiconductor device and semiconductor chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate a process of inserting resin into a space between a wiring board and the surface of a semiconductor chip, etc. SOLUTION: On the surface 21 of a semiconductor chip 2, a plurality of bumps B and an airtight wall section 22 are formed. The airtight wall section 22 is formed like a wall nearly in the same height as the bumps over the entire periphery of the surface 21. When mounting the semiconductor chip 2 on a wiring board 1, the work is performed in a gas atmosphere such as a nitrogen gas atmosphere, argon gas atmosphere, etc. As a result, the airtight wall section 22 can be tightly adhered to a plate-like body 11, and a space 30 between the wiring board 1 and the semiconductor chip 2 is insulated from the outer space, being filled with inactive gas.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, a flip chip bonding structure in which the surface of a semiconductor chip is bonded to a wiring substrate and a chip in which another semiconductor chip is superposed and bonded to the surface of a semiconductor chip. The present invention relates to a semiconductor device having an on-chip structure and a semiconductor chip applied to such a semiconductor device.

[0002]

2. Description of the Related Art Conventionally, as a technique for improving the mounting density of a semiconductor chip on a printed wiring board and shortening the time required for mounting, the surface of a semiconductor chip is opposed to the surface of a printed wiring board or the like. So-called flip chip bonding (face-down bonding)
Bonding) structures are known.

In this flip chip bonding structure, a plurality of bumps are provided on the surface of a semiconductor chip, and the bumps are joined to electrodes arranged on the surface of the wiring board to thereby connect the semiconductor chip to the wiring board. Are connected so as to keep a predetermined interval, and are electrically connected to each other. And the semiconductor chip and the wiring board
Resin is sealed between the opposing surfaces and housed in a package. This shuts off the semiconductor chip from the outside air,
It is possible to prevent the performance of the semiconductor chip from deteriorating due to moisture in the outside air.

[0004]

However, if the step of encapsulating the resin between the semiconductor chip and the wiring board can be omitted, the time required for manufacturing the semiconductor device can be reduced, and the cost of the semiconductor device can be reduced. be able to. In addition to the above-described semiconductor device having the flip-chip bonding structure, deterioration of the performance of the semiconductor chip is not limited to a semiconductor device having a chip-on-chip structure in which another semiconductor chip is superimposed on and bonded to the surface of the semiconductor chip. To prevent this, a resin is usually sealed between the semiconductor chips. Therefore, if the step of encapsulating the resin between the semiconductor chips can be omitted, the time required for the manufacturing process of the semiconductor device having the chip-on-chip structure can be reduced, and the cost of the semiconductor device can be reduced.

The present invention has been made in view of the above background, and has as its object to provide a semiconductor device and a semiconductor device which can omit resin encapsulation between a solid surface such as a wiring board and another semiconductor chip. It is to provide a semiconductor chip.

[0006]

According to a first aspect of the present invention, there is provided a semiconductor device having a solid surface and a semiconductor chip formed by superimposing and bonding a semiconductor chip. Provided between the solid surface and the opposing surface of the semiconductor chip, supporting the semiconductor chip while maintaining a predetermined distance between the solid surface and the solid surface, and electrically connecting the semiconductor chip and the solid. A connecting portion, and a sealing wall portion provided between the opposed surfaces of the solid surface and the semiconductor chip so as to surround a space between the solid surface and the semiconductor chip and to seal the space; A semiconductor device characterized by the following.

[0007] The solid surface may be the surface of another semiconductor chip or the surface of a wiring board. According to the present invention, the space between the surface of the semiconductor chip and a solid surface such as another semiconductor chip or a wiring board is
Since the space is sealed by the sealing wall, there is no possibility that outside air enters into this space. Therefore, it is not necessary to enclose a resin for protecting the semiconductor chip from the outside air between the solid and the semiconductor chip, so that the time required for manufacturing the semiconductor device can be reduced, and the cost of the semiconductor device can be reduced. Can be done.

According to a second aspect of the present invention, there is provided the semiconductor device according to the first aspect, wherein a space sealed by the sealing wall portion is filled with an inert gas.
According to the present invention, since the space between the solid surface and the surface of the semiconductor chip is filled with the inert gas, the performance of the semiconductor chip does not deteriorate. According to a third aspect of the present invention, the inside of the space sealed by the sealing wall is kept substantially at a vacuum.
It is a semiconductor device of the description.

According to the present invention, since the space between the solid surface and the surface of the semiconductor chip is kept at a vacuum, the adhesion between the solid surface and the semiconductor chip can be improved, and the space within the space can be improved. It is possible to satisfactorily prevent outside air from entering the air. According to a fourth aspect of the present invention, there is provided a semiconductor chip to be bonded to a solid surface, the semiconductor chip being provided on a surface facing the solid surface, and maintaining the semiconductor chip at a predetermined distance from the solid surface. And a connection portion for electrically connecting the semiconductor chip and the solid, and provided over the entire periphery of the peripheral portion of the surface facing the solid surface, and joined to the solid surface, A semiconductor chip including a sealing wall for sealing a space between the surface of the semiconductor chip and the solid surface.

According to the present invention, the same effect as that of the first aspect can be obtained. In addition, the said sealing wall part,
It is preferably provided at the outermost periphery of the surface facing the solid surface, but it is sufficient if it is formed so as to surround all the connecting portions provided on the surface facing the solid surface.

[0011]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is an illustrative sectional view showing a schematic configuration of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a perspective view of a semiconductor chip applied to the semiconductor device. This semiconductor device is a semiconductor device having a so-called flip-chip bonding structure.
Are overlapped and joined.

The wiring board 1 has a plurality of electrodes 13 for connection to the semiconductor chip 2 and a thin film wiring (see FIG. 1) for connecting the electrodes 13 to a surface 12 of a plate 11 made of, for example, a synthetic resin. ) Is formed by pattern formation. The semiconductor chip 2 is made of, for example, a silicon chip. The semiconductor chip 2 is joined to the wiring board 1 by a so-called face-down method in which the front surface 21 faces the surface of the wiring board 1. The surface 21 of the semiconductor chip 2 is a surface on the active surface layer region side on which a functional element such as a transistor is formed on a semiconductor substrate serving as a base of the semiconductor chip 2, and the outermost surface is covered with a protective film having an insulating property. I have. On the protective film, a conductive bump B electrically connected to the internal circuit is formed so as to protrude.

On the periphery of the semiconductor chip 2, a wall-shaped sealing wall 22 having substantially the same height as the bump B is formed over the entire periphery. The sealing wall 22 is formed of the same material as the bump B, and can be formed simultaneously with the bump B in the forming process. Semiconductor chip 2
Is mounted on the wiring board 1 by, for example, positioning and bonding the plurality of bumps B and the electrodes 13 on the wiring board 1 in an inert gas atmosphere such as nitrogen gas or argon gas. And the semiconductor chip 2 is crimped. Bump B is a semiconductor chip 2
Are supported on the wiring board 1 at a predetermined interval,
The semiconductor chip 2 and the thin film wiring are electrically connected. On the other hand, the sealing wall portion 22 is in close contact with the surface 12 of the plate-like body 11 to seal the space 30 between the wiring board 1 and the semiconductor chip 2. Thereby, the space 30 between the wiring substrate 1 and the semiconductor chip 2 is isolated from the external space, and the space 30 is maintained in a state filled with the inert gas.

As described above, since the space 30 between the wiring board 1 and the semiconductor chip 2 is isolated from the outside by the sealing wall 22, there is no possibility that outside air enters the space 30. In addition, since the bonding between the wiring substrate 1 and the semiconductor chip 2 is performed in an inert gas atmosphere, and the space 30 is filled with the inert gas, the performance of the semiconductor chip 2 does not deteriorate. Therefore, in the flip chip bonding structure using the semiconductor chip of this embodiment, it is not necessary to enclose a resin between the wiring board 1 and the semiconductor chip 2, so that the time required for manufacturing the semiconductor device can be reduced. And the cost of the semiconductor device can be reduced.

Although the embodiment of the present invention has been described above, the present invention can be embodied in other forms. For example, in the above embodiment, the connection between the wiring substrate 1 and the semiconductor chip 2 is performed in an inert gas atmosphere, but may be performed in a vacuum. In this case, since the space 30 between the wiring board 1 and the semiconductor chip 2 is evacuated, the adhesion between the wiring board 1 and the semiconductor chip 2 can be improved.

In the above-described embodiment, the semiconductor chip 2 is a chip made of silicon. However, in addition to silicon, any other semiconductor compound such as a compound semiconductor (eg, a gallium arsenide semiconductor) or a germanium semiconductor may be used. A chip using a semiconductor material may be used. Further, in the above-described embodiment, the semiconductor device having the flip-chip bonding structure is taken up. However, the present invention relates to a semiconductor device having a chip-on-chip structure in which another semiconductor chip is overlapped and joined to the surface of the semiconductor chip. Also applicable to

In addition, various design changes can be made within the scope of the matters described in the claims.

[Brief description of the drawings]

FIG. 1 is an illustrative sectional view showing a schematic configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a perspective view of a semiconductor chip applied to the semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Wiring board (solid) 2 Semiconductor chip 12 Surface (solid surface) 21 Surface (surface of semiconductor chip) 22 Sealing wall 30 Space (space between solid surface and surface of semiconductor chip) B Bump

Claims (4)

[Claims] 1. A semiconductor device comprising a solid surface and a semiconductor chip superposed and joined to each other, said semiconductor device being provided between said solid surface and a surface facing said semiconductor chip, said semiconductor chip being attached to said solid surface. And a connection part for electrically connecting the semiconductor chip and the solid, and between the solid surface and the opposing surface of the semiconductor chip, the solid surface and the solid surface. A semiconductor device provided surrounding a space between the semiconductor chip and the semiconductor chip and sealing the space. 2. The semiconductor device according to claim 1, wherein a space sealed by said sealing wall is filled with an inert gas. 3. A vacuum system according to claim 1, wherein the space enclosed by said sealing wall is kept substantially in a vacuum.
13. The semiconductor device according to claim 1. 4. A semiconductor chip bonded to a solid surface, provided on a surface facing the solid surface, and supporting the semiconductor chip while maintaining a predetermined distance from the solid surface. A connection portion for electrically connecting the semiconductor chip and the solid is provided, and is provided over the entire periphery of a peripheral portion of the surface opposed to the solid surface, and is connected to the solid surface to form the semiconductor chip. A semiconductor chip, comprising: a sealing wall for sealing a space between a surface and the solid surface.