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JPS63128736A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPS63128736A
JPS63128736A JP27417386A JP27417386A JPS63128736A JP S63128736 A JPS63128736 A JP S63128736A JP 27417386 A JP27417386 A JP 27417386A JP 27417386 A JP27417386 A JP 27417386A JP S63128736 A JPS63128736 A JP S63128736A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
semiconductor
chip
substrate
bonding
loading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27417386A
Inventor
Yoshiro Nishimura
Original Assignee
Olympus Optical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—BASIC ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Abstract

PURPOSE: To dispose a plurality of semiconductor chips in three dimensions on a loading substrate and to decrease a required area per one chip so that chip board composition of high mounting density can be realized, by fixing a first semiconductor chip on a loading substrate and disposing a second semiconductor chip in three dimensions on the first semiconductor chip and connecting the respective semiconductor chips with respective conductive patterns on the loading substrate and sealing the respective semiconductor chips.
CONSTITUTION: A first semiconductor chip 2 is fixed on a loading substrate 1, which consists of ceramics and glass-epoxy resin and the like, by die bonding. Bonding pads of the chip 2 are connected with conductive patterns, which are formed on the loading substrate 1, by the use of bonding wires 3, and next a cap 4 is put and sticked on the substrate 1 so as to seal the substrate 1. Bonding pads of a second semiconductor chip 5 fixed on the cap 4 are connected with the conductive patterns on the substrate 1 by the use of bonding wires 6. Sealing resin of a polyimide group is potted to entirely seal the cap 4, which seals the first semiconductor chip 2, and the second semiconductor chip 5 mounted on the cap 4.
COPYRIGHT: (C)1988,JPO&Japio
JP27417386A 1986-11-19 1986-11-19 Semiconductor element Pending JPS63128736A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27417386A JPS63128736A (en) 1986-11-19 1986-11-19 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27417386A JPS63128736A (en) 1986-11-19 1986-11-19 Semiconductor element

Publications (1)

Publication Number Publication Date
JPS63128736A true true JPS63128736A (en) 1988-06-01

Family

ID=17538052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27417386A Pending JPS63128736A (en) 1986-11-19 1986-11-19 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS63128736A (en)

Cited By (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323060A (en) * 1993-06-02 1994-06-21 Micron Semiconductor, Inc. Multichip module having a stacked chip arrangement
US5856915A (en) * 1997-02-26 1999-01-05 Pacesetter, Inc. Vertically stacked circuit module using a platform having a slot for establishing multi-level connectivity
US6005778A (en) * 1995-06-15 1999-12-21 Honeywell Inc. Chip stacking and capacitor mounting arrangement including spacers
US6014586A (en) * 1995-11-20 2000-01-11 Pacesetter, Inc. Vertically integrated semiconductor package for an implantable medical device
USRE36613E (en) * 1993-04-06 2000-03-14 Micron Technology, Inc. Multi-chip stacked devices
US6340846B1 (en) 2000-12-06 2002-01-22 Amkor Technology, Inc. Making semiconductor packages with stacked dies and reinforced wire bonds
US6351028B1 (en) * 1999-02-08 2002-02-26 Micron Technology, Inc. Multiple die stack apparatus employing T-shaped interposer elements
US6395578B1 (en) 1999-05-20 2002-05-28 Amkor Technology, Inc. Semiconductor package and method for fabricating the same
US6437449B1 (en) 2001-04-06 2002-08-20 Amkor Technology, Inc. Making semiconductor devices having stacked dies with biased back surfaces
US6452278B1 (en) 2000-06-30 2002-09-17 Amkor Technology, Inc. Low profile package for plural semiconductor dies
US6472758B1 (en) 2000-07-20 2002-10-29 Amkor Technology, Inc. Semiconductor package including stacked semiconductor dies and bond wires
JP2002373969A (en) * 2001-06-15 2002-12-26 Oki Electric Ind Co Ltd Semiconductor device and method of manufacturing semiconductor device
US6531784B1 (en) 2000-06-02 2003-03-11 Amkor Technology, Inc. Semiconductor package with spacer strips
DE10157361A1 (en) * 2001-11-23 2003-03-13 Infineon Technologies Ag Electronic component, for memory storage, comprises large semiconductor chip and small semiconductor chip, each with contact surfaces and bond wires for contacting with substrate
US6552416B1 (en) 2000-09-08 2003-04-22 Amkor Technology, Inc. Multiple die lead frame package with enhanced die-to-die interconnect routing using internal lead trace wiring
US6555917B1 (en) 2001-10-09 2003-04-29 Amkor Technology, Inc. Semiconductor package having stacked semiconductor chips and method of making the same
US6577013B1 (en) 2000-09-05 2003-06-10 Amkor Technology, Inc. Chip size semiconductor packages with stacked dies
US6614102B1 (en) 2001-05-04 2003-09-02 Amkor Technology, Inc. Shielded semiconductor leadframe package
US6642610B2 (en) 1999-12-20 2003-11-04 Amkor Technology, Inc. Wire bonding method and semiconductor package manufactured using the same
US6707168B1 (en) 2001-05-04 2004-03-16 Amkor Technology, Inc. Shielded semiconductor package with single-sided substrate and method for making the same
US6737750B1 (en) 2001-12-07 2004-05-18 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US6798049B1 (en) 1999-08-24 2004-09-28 Amkor Technology Inc. Semiconductor package and method for fabricating the same
US6867500B2 (en) * 2002-04-08 2005-03-15 Micron Technology, Inc. Multi-chip module and methods
US6879047B1 (en) 2003-02-19 2005-04-12 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US6930378B1 (en) 2003-11-10 2005-08-16 Amkor Technology, Inc. Stacked semiconductor die assembly having at least one support
US6946323B1 (en) 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
JP2006040983A (en) * 2004-07-23 2006-02-09 Akita Denshi Systems:Kk Method of manufacturing semiconductor device
US7126218B1 (en) 2001-08-07 2006-10-24 Amkor Technology, Inc. Embedded heat spreader ball grid array
KR100639701B1 (en) 2004-11-17 2006-10-30 삼성전자주식회사 Multi chip package
US7154171B1 (en) 2002-02-22 2006-12-26 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US7211884B1 (en) 2002-01-28 2007-05-01 Pacesetter, Inc. Implantable medical device construction using a flexible substrate
JP2007227596A (en) * 2006-02-23 2007-09-06 Shinko Electric Ind Co Ltd Semiconductor module and its manufacturing method
JP2007287820A (en) * 2006-04-14 2007-11-01 Renesas Technology Corp Electronic device, and manufacturing method therefor
USRE40061E1 (en) 1993-04-06 2008-02-12 Micron Technology, Inc. Multi-chip stacked devices
US7485490B2 (en) 2001-03-09 2009-02-03 Amkor Technology, Inc. Method of forming a stacked semiconductor package
JP2010192937A (en) * 2010-06-07 2010-09-02 Oki Semiconductor Co Ltd Semiconductor device and method of manufacturing semiconductor device
US7829379B2 (en) 2007-10-17 2010-11-09 Analog Devices, Inc. Wafer level stacked die packaging
US20160379933A1 (en) * 2007-02-21 2016-12-29 Amkor Technology, Inc. Semiconductor package in package

Cited By (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE36613E (en) * 1993-04-06 2000-03-14 Micron Technology, Inc. Multi-chip stacked devices
USRE40061E1 (en) 1993-04-06 2008-02-12 Micron Technology, Inc. Multi-chip stacked devices
US5323060A (en) * 1993-06-02 1994-06-21 Micron Semiconductor, Inc. Multichip module having a stacked chip arrangement
US6005778A (en) * 1995-06-15 1999-12-21 Honeywell Inc. Chip stacking and capacitor mounting arrangement including spacers
US6014586A (en) * 1995-11-20 2000-01-11 Pacesetter, Inc. Vertically integrated semiconductor package for an implantable medical device
US5856915A (en) * 1997-02-26 1999-01-05 Pacesetter, Inc. Vertically stacked circuit module using a platform having a slot for establishing multi-level connectivity
US6730543B2 (en) 1999-02-08 2004-05-04 Micron Technology, Inc. Methods for multiple die stack apparatus employing
US6351028B1 (en) * 1999-02-08 2002-02-26 Micron Technology, Inc. Multiple die stack apparatus employing T-shaped interposer elements
US7518227B2 (en) 1999-02-08 2009-04-14 Micron Technology, Inc. Multiple die stack apparatus employing T-shaped interposer elements
US7282793B2 (en) 1999-02-08 2007-10-16 Micron Technology, Inc. Multiple die stack apparatus employing T-shaped interposer elements
US7282794B2 (en) 1999-02-08 2007-10-16 Salman Akram Multiple die stack apparatus employing t-shaped interposer elements
US7064006B2 (en) 1999-02-08 2006-06-20 Micron Technology, Inc. Multiple die stack apparatus employing T-shaped interposer elements
US6911723B2 (en) 1999-02-08 2005-06-28 Micron Technology, Inc. Multiple die stack apparatus employing T-shaped interposer elements
US6762078B2 (en) 1999-05-20 2004-07-13 Amkor Technology, Inc. Semiconductor package having semiconductor chip within central aperture of substrate
US6395578B1 (en) 1999-05-20 2002-05-28 Amkor Technology, Inc. Semiconductor package and method for fabricating the same
US6798049B1 (en) 1999-08-24 2004-09-28 Amkor Technology Inc. Semiconductor package and method for fabricating the same
US6803254B2 (en) 1999-12-20 2004-10-12 Amkor Technology, Inc. Wire bonding method for a semiconductor package
US6642610B2 (en) 1999-12-20 2003-11-04 Amkor Technology, Inc. Wire bonding method and semiconductor package manufactured using the same
US6531784B1 (en) 2000-06-02 2003-03-11 Amkor Technology, Inc. Semiconductor package with spacer strips
US6452278B1 (en) 2000-06-30 2002-09-17 Amkor Technology, Inc. Low profile package for plural semiconductor dies
US6650019B2 (en) 2000-07-20 2003-11-18 Amkor Technology, Inc. Method of making a semiconductor package including stacked semiconductor dies
US6472758B1 (en) 2000-07-20 2002-10-29 Amkor Technology, Inc. Semiconductor package including stacked semiconductor dies and bond wires
US6577013B1 (en) 2000-09-05 2003-06-10 Amkor Technology, Inc. Chip size semiconductor packages with stacked dies
US6552416B1 (en) 2000-09-08 2003-04-22 Amkor Technology, Inc. Multiple die lead frame package with enhanced die-to-die interconnect routing using internal lead trace wiring
US6340846B1 (en) 2000-12-06 2002-01-22 Amkor Technology, Inc. Making semiconductor packages with stacked dies and reinforced wire bonds
US7485490B2 (en) 2001-03-09 2009-02-03 Amkor Technology, Inc. Method of forming a stacked semiconductor package
US6437449B1 (en) 2001-04-06 2002-08-20 Amkor Technology, Inc. Making semiconductor devices having stacked dies with biased back surfaces
US6614102B1 (en) 2001-05-04 2003-09-02 Amkor Technology, Inc. Shielded semiconductor leadframe package
US6707168B1 (en) 2001-05-04 2004-03-16 Amkor Technology, Inc. Shielded semiconductor package with single-sided substrate and method for making the same
JP2002373969A (en) * 2001-06-15 2002-12-26 Oki Electric Ind Co Ltd Semiconductor device and method of manufacturing semiconductor device
US7126218B1 (en) 2001-08-07 2006-10-24 Amkor Technology, Inc. Embedded heat spreader ball grid array
US6555917B1 (en) 2001-10-09 2003-04-29 Amkor Technology, Inc. Semiconductor package having stacked semiconductor chips and method of making the same
US6946323B1 (en) 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
DE10157361A1 (en) * 2001-11-23 2003-03-13 Infineon Technologies Ag Electronic component, for memory storage, comprises large semiconductor chip and small semiconductor chip, each with contact surfaces and bond wires for contacting with substrate
US6919631B1 (en) 2001-12-07 2005-07-19 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US6737750B1 (en) 2001-12-07 2004-05-18 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US7211884B1 (en) 2002-01-28 2007-05-01 Pacesetter, Inc. Implantable medical device construction using a flexible substrate
US7154171B1 (en) 2002-02-22 2006-12-26 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US7619313B2 (en) 2002-04-08 2009-11-17 Micron Technology, Inc. Multi-chip module and methods
US8048715B2 (en) 2002-04-08 2011-11-01 Round Rock Research, Llc Multi-chip module and methods
US6867500B2 (en) * 2002-04-08 2005-03-15 Micron Technology, Inc. Multi-chip module and methods
US7084514B2 (en) 2002-04-08 2006-08-01 Micron Technology, Inc. Multi-chip module and methods
US6879047B1 (en) 2003-02-19 2005-04-12 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US6930378B1 (en) 2003-11-10 2005-08-16 Amkor Technology, Inc. Stacked semiconductor die assembly having at least one support
US7859119B1 (en) 2003-11-10 2010-12-28 Amkor Technology, Inc. Stacked flip chip die assembly
US7459776B1 (en) 2003-11-10 2008-12-02 Amkor Technology, Inc. Stacked die assembly having semiconductor die projecting beyond support
US7132753B1 (en) 2003-11-10 2006-11-07 Amkor Technology, Inc. Stacked die assembly having semiconductor die overhanging support
US7071568B1 (en) 2003-11-10 2006-07-04 Amkor Technology, Inc. Stacked-die extension support structure and method thereof
JP2006040983A (en) * 2004-07-23 2006-02-09 Akita Denshi Systems:Kk Method of manufacturing semiconductor device
KR100639701B1 (en) 2004-11-17 2006-10-30 삼성전자주식회사 Multi chip package
JP2007227596A (en) * 2006-02-23 2007-09-06 Shinko Electric Ind Co Ltd Semiconductor module and its manufacturing method
JP2007287820A (en) * 2006-04-14 2007-11-01 Renesas Technology Corp Electronic device, and manufacturing method therefor
US20160379933A1 (en) * 2007-02-21 2016-12-29 Amkor Technology, Inc. Semiconductor package in package
US9768124B2 (en) 2007-02-21 2017-09-19 Amkor Technology, Inc. Semiconductor package in package
US7829379B2 (en) 2007-10-17 2010-11-09 Analog Devices, Inc. Wafer level stacked die packaging
JP2010192937A (en) * 2010-06-07 2010-09-02 Oki Semiconductor Co Ltd Semiconductor device and method of manufacturing semiconductor device

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