JP2000252212A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remove or decrease catalyst elements in a crystalline semiconductor film containing silicon in a low-temperature process. SOLUTION: In a method for manufacture, when catalyst elements are introduced into an amorphous semiconductor film 103, or after introduction, a first heat treatment for crystallization of a part of the amorphous semiconductor film 103 is performed to obtain a semiconductor film 105. Then, by reacting with heated liquid, the catalyst elements in the semiconductor film is gettered into the liquid. Then crystallization is performed again in a second heat treatment to obtain a crystalline semiconductor film 107. This crystalline semiconductor film 107 is patterned to obtain an island-shaped semiconductor layer 108 acting as an active layer of a TFT(thin film transistor).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device using a crystalline semiconductor film formed by crystallizing an amorphous semiconductor thin film, and more particularly to a thin film transistor (TFT) and the like. The present invention relates to a method for manufacturing a semiconductor device. The semiconductor device of the present invention includes not only elements such as thin film transistors (TFTs) and MOS transistors but also electro-optical devices such as display devices and image sensors having a semiconductor circuit composed of these insulated gate transistors. In addition, the semiconductor device of the present invention includes an electronic device equipped with the display device and the electro-optical device.

[0002]

2. Description of the Related Art In recent years, a technique for forming a TFT on a glass substrate or the like to form a semiconductor circuit has been rapidly advanced. As such a semiconductor circuit, an electro-optical device such as an active matrix type liquid crystal display device is typical.

An active matrix type liquid crystal display device is a monolithic type display device in which a pixel matrix circuit and a driver circuit are provided on the same substrate. Further, development of a system-on-panel having a built-in logic circuit such as a memory circuit and a clock generation circuit is also in progress.

Since such driver circuits and logic circuits need to operate at high speed, it is not appropriate to use an amorphous silicon film (amorphous silicon film) as an active layer. Therefore, at present, TFTs using a crystalline silicon film (polysilicon film) as an active layer are becoming mainstream.

Research and development have been actively conducted on a process for forming a crystalline silicon film over a large area on a substrate having a lower heat resistance than a quartz substrate such as a glass substrate, that is, a so-called low-temperature process. Have been done.

The present inventors have disclosed a technique for obtaining a crystalline silicon film on a glass substrate in JP-A-7-130652. The technique described in the publication is to add a catalytic element that promotes crystallization to an amorphous silicon film, and then perform heat treatment to crystallize the amorphous silicon film.

With this crystallization technique, the crystallization temperature of the amorphous silicon film is reduced by 5 times as compared with the conventional crystallization technique (solid phase growth method).
The temperature can be lowered by 0 to 100 ° C., and the time required for crystallization can be reduced to 1/5 to 1/10. As a result, it has become possible to form a crystallized silicon film over a large area even on a glass substrate having low heat resistance. It has been experimentally confirmed that a crystalline silicon film obtained by such a low-temperature process has excellent crystallinity.

[0008]

In the above-mentioned crystallization technique, a metal element such as nickel, copper or cobalt is used as a catalyst element. Since such a metal element forms a deep level in the silicon film and captures carriers, when a TFT is manufactured using the obtained crystalline silicon film, TF
There is a concern that the electrical characteristics and reliability of T may be adversely affected.

Further, it has been confirmed that the catalyst element remaining in the crystalline semiconductor film segregates irregularly, and in particular, segregates at the crystal grain boundaries. The present inventors have considered that the segregated region serves as an escape path (leak path) for a weak current, and that it causes a sudden increase in off current (current when the TFT is in an off state).

Therefore, after crystallization, it is desirable to remove the catalytic element promptly or to reduce it to such an extent that it does not affect the electrical characteristics. The present inventors have disclosed in Japanese Patent Application Laid-Open No. 7-94757 a technique relating to a method for removing a catalytic element in consideration of the possibility that a catalytic element remaining inside a crystalline silicon film may adversely affect the reliability of a TFT. ing. According to the technique described in this publication, heat treatment is performed in an atmosphere containing a halogen element (typically chlorine or fluorine), and the catalytic element remaining in the crystalline silicon film by utilizing the gettering effect of the metal element by the halogen element. Is eliminated or reduced.

As a specific example, an amorphous silicon film is crystallized using nickel (Ni) as a catalyst element,
Heat treatment is performed on the crystalline silicon film obtained in an atmosphere containing chlorine (Cl) as a halogen element. Then, the nickel reacts with the chlorine to form volatile nickel chloride (NiCl ₂ ).
And is removed into the gas phase and removed or reduced from the crystalline silicon film.

[0012] However, nickel chloride is easily vaporized in a temperature range exceeding 700 ° C.
It is difficult to vaporize in a temperature range below that. for that reason,
The temperature of the heat treatment is performed at about 800 to 1000 ° C. Of course,
In this temperature range, a glass substrate with low heat resistance cannot be used, and a high heat-resistant substrate such as an expensive quartz substrate must be used. That is, it is also desired to effectively utilize the characteristics of a low-temperature process using a catalytic element. At a high temperature, there is also a problem of abnormal oxidation around NiSi ₂ .

The present invention has been made in view of the above problems, and provides a technique for removing or reducing a catalytic element from a crystalline semiconductor film containing silicon while utilizing the characteristics of a low-temperature process. As an issue.

[0014]

In order to solve the above-mentioned problems, the present invention provides: 1) a step of crystallizing an amorphous semiconductor film containing silicon using a catalytic element; A step of introducing a catalytic element for promoting crystallization of silicon into the semiconductor film and simultaneously crystallizing (semi-crystallizing) a part of the amorphous semiconductor film; 3) bringing the semiconductor film into contact with a liquid to form a semiconductor film; The main step is to reduce the catalytic element. By going through the above steps, the catalytic element in the semiconductor film can be greatly reduced finally.

A basic object of the present invention is to remove a catalytic element used for crystallization of an amorphous semiconductor film containing silicon from a crystalline semiconductor film. At the same time, a catalyst element that promotes crystallization of silicon is introduced into the amorphous semiconductor film, and at the same time, a semiconductor film in which a part of the amorphous semiconductor film is crystallized (semi-crystallized) is brought into contact.

A first structure of the present invention disclosed in this specification is a first structure for forming an amorphous semiconductor film containing silicon on a substrate.
Performing a first heat treatment for crystallizing (semi-crystallizing) a part of the amorphous semiconductor film when introducing a catalyst element for promoting crystallization of silicon into the amorphous semiconductor film. A second step, a third step of bringing the semiconductor film into contact with a liquid to reduce the catalytic element in the film, and a second heat treatment for crystallizing the semiconductor film to form a crystalline semiconductor film And a fourth step of performing the above. By going through the above steps, the catalytic element in the semiconductor film can be greatly reduced finally.

According to a second configuration of the present invention, there is provided a first step of forming an amorphous semiconductor film containing silicon on a substrate, and a catalyst element for promoting crystallization of silicon in the amorphous semiconductor film. A second step of performing a first heat treatment for crystallizing (semi-crystallizing) a part of the amorphous semiconductor film at the same time as selectively introducing
A third step of bringing the semiconductor film into contact with a liquid to reduce the catalytic element in the film and a second step of performing a second heat treatment for crystallizing the amorphous semiconductor film to form a crystalline semiconductor film. And a method of manufacturing a semiconductor device. By going through the above steps, the catalytic element in the semiconductor film can be greatly reduced finally.

In each of the above structures, as a method for introducing a catalytic element into the amorphous semiconductor film, a plasma doping method,
A vapor phase method such as an evaporation method or a sputtering method, or a method of applying a solution containing a catalyst element can be employed. In particular, it is desirable to use film formation by a sputtering method which enables mass production using a large substrate. The substrate temperature at the time of film formation by the sputtering method may be room temperature to 600 ° C. (a desirable temperature varies depending on the catalyst element, but is a temperature before the unnecessary catalyst element is agglomerated). In this case, a part of the amorphous semiconductor film can be crystallized (semi-crystallized) simultaneously with the film formation. It is to be noted that the term “film formation” here means that the film is extremely thin and a minute catalytic element substance is diffused over the entire surface of the substrate. In the third step of reducing the catalytic element in the film by bringing the semiconductor film into contact with a liquid, the catalytic element in the film is removed to remove the catalytic element.
It is desirable to set the amount to the minimum necessary for crystallization in the step. However, due to the convenience of the device, the case where the device for adding the catalyst element, the heat treatment device for crystallization, and the device for reducing the catalyst element are different is also included.

In each of the above structures, the catalyst element is N
It is characterized by being at least one element selected from i, Co, Fe, Pd, Pt, Cu, and Au.

In each of the above structures, the liquid is at least one chemical selected from oxygen-containing chemicals (sulfuric acid, nitric acid, oxalic acid, aqua regia) and oxygen-free chemicals (hydrochloric acid, hydrofluoric acid). It is characterized by being able to.

In each of the above structures, the crystalline semiconductor film formed in the fourth step is a polycrystalline semiconductor film having a crystal grain boundary.

Each of the above structures is characterized in that the crystalline semiconductor film is irradiated with a laser beam after the fourth step of forming the crystalline semiconductor film by heat treatment.

In each of the above structures, an oxide film on the surface of the crystallized semiconductor film is removed before the third step of performing the treatment for reducing the catalytic element in the film.

In each of the above structures, the third step includes:
A method for manufacturing a semiconductor device, comprising cleaning a surface of a semiconductor film in which the catalyst element is reduced after the treatment for reducing the catalyst element in the film.

In a third aspect of the present invention, there is provided a first step of forming an amorphous semiconductor film containing silicon on a substrate, and a catalyst element for promoting crystallization of silicon in the amorphous semiconductor film. And a third step of performing a first heat treatment for crystallizing (semi-crystallizing) a part of the amorphous semiconductor film, and crystallizing (semi-crystallizing) the part. Performing a fourth step of performing gettering to reduce the catalytic element in the semiconductor film subjected to the heat treatment, and performing a second heat treatment for performing treatment longer than the first heat treatment, and partially crystallizing (semi-crystallizing) A fifth step of crystallizing the formed semiconductor film to form a crystalline semiconductor film.

In the above structure, the gettering is
The method is characterized in that the catalyst element in the film is reduced by bringing a semiconductor film partially crystallized (semi-crystallized) into contact with a liquid.

In the above structure, the heating temperature of the first heat treatment and the second heat treatment is 450 to 600 ° C. Note that the heating temperature of the first heat treatment and the second heat treatment may be the same temperature or different temperatures within a temperature range of 450 to 600 ° C.

In the present specification, a liquid (hereinafter also referred to as a chemical solution) refers to a state in which a chemical is in a liquid phase.

[0029]

Embodiments of the present invention will be described with reference to FIG. First, as shown in FIG. 1A, an amorphous semiconductor film 103 containing silicon is formed over a substrate 101, and a layer 1 containing a catalytic element for promoting crystallization is formed on the amorphous semiconductor film 103.
04 is formed, and a catalytic element is introduced into the amorphous semiconductor film 103.

In the above process, the amorphous semiconductor film 103
As a method for introducing a catalytic element into the substrate, a gas phase method such as a plasma doping method, an evaporation method or a sputtering method, or a method of applying a solution containing the catalytic element can be adopted. In the method using a solution, the amount of the catalyst element introduced can be easily controlled, and a very small amount can be easily added.

As the catalyst element, metal elements such as Ni (nickel), Co (cobalt), Fe (iron), Pd (palladium), Pt (platinum), Cu (copper), and Au (gold) are typical. It is. Ge (germanium), P
Elements such as b can also be used. In our experiments, nickel has been found to be the most suitable element.

Next, as shown in FIG. 1B, a first heat treatment is performed at an appropriate heating temperature (600 ° C. or less, for a short time) to crystallize a part of the amorphous semiconductor film 103 (halfway). Crystallization)
Thus, a semiconductor film 105 is formed.
As shown in (C), the catalyst element is reduced by bringing the semiconductor film into contact with a liquid, so that the semiconductor film 10
Get 6. Here, an example in which the step of introducing the catalyst element and the first heat treatment are performed separately has been described, but the steps may be performed simultaneously to shorten the steps.

Next, a second heat treatment (450 ° C. or more, 11
00 ° C or lower, preferably 600 ° C or lower for 1 to 24 hours)
Is performed to obtain a crystalline semiconductor film 107 shown in FIG. Depending on the conditions of the second heat treatment, a completely crystallized crystalline semiconductor film 107 can be obtained. If the reduction of the catalytic element is not sufficient even after this step, it is preferable to further perform the gettering treatment with the liquid or the gettering treatment with the halogen gas to reduce the catalytic element.

Next, after the substrate is washed with pure water and dried, the film 107 is patterned to obtain an island-shaped semiconductor layer 108 of the semiconductor device shown in FIG. Note that the order of the steps may be changed to obtain the state of FIG. 1C, patterning is performed, and then crystallization is performed. In addition, in order to perform gettering by increasing the contact between the liquid and the semiconductor film, the natural oxide film is once removed by a hydrofluoric acid treatment or the like before the gettering treatment for reducing the catalytic element by the liquid, so that the semiconductor film is removed. Preferably, the surface is cleaned.

In the gettering treatment for reducing the catalytic element by the liquid, at least a part of the surface of the semiconductor film is brought into contact with a chemical maintained at a temperature equal to or lower than the boiling point of the chemical to form a catalyst in the film and the catalyst in the film. This is a process for reducing elements. Note that when the liquid is brought into contact with the surface of the semiconductor film, the temperature of the substrate is preferably set to a temperature equal to or lower than the boiling point of the chemical solution.

In the present invention, the method of contacting the surface of the semiconductor film with the liquid is not particularly limited. For example, in a treatment tank containing sulfuric acid kept at a high temperature, for example, 200 ° C. or higher,
A substrate provided with a semiconductor film containing a catalytic element is exposed for several seconds to
It may be a method of dipping for several tens of minutes, or a method of uniformly dropping sulfuric acid kept at a high temperature on a substrate provided with a crystalline semiconductor film containing a catalytic element.

The chemical used for the reduction treatment of the catalytic element with the above liquid has a boiling point of 100 ° C. or more, preferably 20 ° C.
0 ° C. or higher, for example, sulfuric acid (boiling point 317 at normal pressure)
At least one liquid or aqueous solution selected from hydrochloric acid (boiling point at normal pressure: 108.584 ° C.), phosphoric acid (boiling point at normal pressure: 213 ° C.), dilute nitric acid, oxalic acid, aqua regia, etc. Sulfuric acid was optimal.

The amount of reduction of the catalytic element such as nickel depends on the components of the liquid, the temperature, the contact time, and the like. The higher the temperature, the more the reduction, and the longer the time, the more the reduction.
In addition, if the amount of the added catalyst element is very small, the treatment can be performed in a short time.

The lower limit of the temperature of the liquid can be determined theoretically by the temperature at which the catalyst element such as nickel can diffuse, and the upper limit can be determined by the temperature at which the liquid becomes gaseous. Note that the temperature at which the liquid turns into a gas phase may be increased by setting the processing conditions to a high pressure. If the temperature at which the liquid becomes gaseous is higher than the strain point of the substrate, the upper limit is determined to be equal to or lower than the strain point of the substrate to be used. For example, a typical maximum temperature when using a glass substrate is 550 ° C. to 650 ° C. Yes, the typical upper limit temperature when using a quartz substrate is 600 ° C to 750 ° C. Therefore, the temperature of the liquid is in the range of 100C to 800C, preferably 200C to 600C. Further, when the temperature at which the liquid enters the gaseous phase is lower than the temperature at which the catalytic element can diffuse, it is preferable to diffuse the catalytic element by heating means such as furnace annealing, laser annealing, or lamp annealing.

On the other hand, the contact time is determined by factors such as the heating temperature and the area to be contacted. However, considering the throughput of the manufacturing process, it is not preferable that the treatment time is too long. Therefore, the present inventors consider the throughput, the upper limit is set to 24 hours, the heating time is 1 minute to 24 hours,
More preferably, it is 30 minutes to 3 hours.

Further, when combined with a technique for removing or reducing the catalytic element remaining in the crystalline silicon film by utilizing the gettering effect of the metallic element by the phosphorus element (JP-A-10-270363), the catalytic element can be further reduced. Can be eliminated or reduced.

Further, heat treatment is performed in an atmosphere containing a halogen element (typically chlorine or fluorine), and the catalytic element remaining in the crystalline silicon film is removed by utilizing the gettering effect of the metal element by the halogen element. The catalyst element can be further removed or reduced by combining it with the removal or reduction technique (JP-A-7-94757).

[0043]

Hereinafter, an embodiment of the present invention will be described in detail with reference to FIGS.

Embodiment 1 This embodiment will be described with reference to FIGS. In this embodiment, a crystalline silicon film (polysilicon film) crystallized by using nickel as a catalyst element is formed,
A method for gettering nickel in a crystalline silicon film by contact with a liquid will be described.

First, as shown in FIG. 1A, a base insulating film (hereinafter referred to as a base film) 102 is formed on a glass substrate 101.
Is formed. Although a glass substrate (Corning 1737; strain point 667 ° C.) was used as the substrate 101 in this embodiment, other substrates that can be used include a quartz substrate, an insulating substrate such as crystalline glass, a ceramic substrate, a stainless steel substrate, and the like. Examples thereof include metals (such as tantalum, tungsten, and molybdenum), semiconductor substrates, and plastic substrates (polyethylene phthalate substrates).

Further, as the base film 102, a silicon oxide film, a silicon nitride film, a silicon nitride oxide film (SiOxNy), a laminated film thereof, or the like can be used in a thickness range of 100 to 500 nm. As a means for forming the underlayer, heat C
A formation method such as a VD method, a plasma CVD method, an evaporation method, and a reduced pressure thermal CVD method can be used. In this embodiment, as the base film 102, a silicon oxide film is formed to a thickness of 200 nm by a plasma CVD method. Note that this underlayer is for preventing the diffusion of impurities from the substrate to improve the electrical characteristics of the TFT, and need not be particularly provided. In addition, it serves to protect the substrate from gettering processing by a liquid performed in a later step.

Next, an amorphous silicon film 103 is formed to a thickness of 10 to 70 nm, more preferably 15 to 55 nm, by a low pressure thermal CVD method, a sputtering method, or a plasma CVD method. In this embodiment, an amorphous silicon film 103 having a thickness of 55 nm is formed by a low pressure CVD method. In addition to the amorphous silicon film 103, an amorphous semiconductor film containing silicon, for example, S
i _X Ge 1 _-X (0 <X <1) can also be used.

Next, a part of the amorphous silicon film 103 is crystallized. The method of adding a catalytic element that promotes crystallization includes:
There are two methods: a sputtering method and a CVD method; and a liquid phase such as an aqueous solution. In the case of liquid phase addition, first, an ultra-thin oxide film (not shown) is formed on the surface of the amorphous silicon film 103 by irradiating UV light in an oxygen atmosphere. This oxide film has a function of improving the wettability of a solution containing nickel to be applied later.

In this embodiment, an extremely thin nickel-containing layer 104 is formed on the surface of the amorphous silicon film 103 by a sputtering method. (FIG. 1 (A)) Note that the substrate temperature is 400 ° C.
At 0 ° C., nickel easily diffuses into the amorphous silicon film 103. At this time, when the substrate temperature is set to 450 ° C. or higher, part of the amorphous silicon film 103 can be crystallized (semi-crystallized) simultaneously with the formation of the nickel-containing layer 104.

After the state shown in FIG. 1A is obtained, a first heat treatment is performed in a nitrogen atmosphere at a temperature of 450 ° C. to 550 ° C. within several hours to crystallize a part of the amorphous silicon film 103 ( (Semi-crystallization). By this crystallization step, an amorphous silicon film 105 partially crystallized (semi-crystallized) is obtained. Since this crystal growth proceeds from the surface of the amorphous silicon film 103 to which nickel is added toward the base film 102 (vertical direction), it is referred to as vertical growth in this specification (FIG. 1B).

Although a polycrystalline silicon film including grain boundaries is formed according to this crystallization step, a microcrystalline silicon film can be formed under different conditions.

Next, the obtained part is crystallized (semi-crystallized).
The catalytic element is reduced by the liquid for the amorphous silicon film 105 thus formed. In this embodiment, high-temperature sulfuric acid is used (FIG. 1).
(C)).

In order to increase the contact between the liquid and the partially crystallized (semi-crystallized) amorphous silicon film and to perform gettering, the partially crystallized (semi-crystallized) amorphous Quality silicon film 10
The oxide film (not shown) on the surface of No. 5 is once removed and brought into contact with a liquid to suck out a catalytic element (nickel in this embodiment) into the liquid. In particular, the method of contacting the partially crystallized (semi-crystallized) amorphous silicon film with sulfuric acid is not limited, but in this embodiment, after the substrate is treated with hydrofluoric acid to remove the oxide film, After immersion in (300 ° C.) for 10 minutes, the substrate was washed with pure water and dried. The temperature of sulfuric acid is 200 ° C. or higher and lower than the boiling point of sulfuric acid, preferably 300 ° C. or higher, and the contact may be performed at such a temperature for several seconds to several tens of minutes, preferably for 3 to 20 minutes. Note that heating means such as furnace annealing, laser annealing, or lamp annealing may be performed at the same time to make nickel easily move into the liquid.
The surface of the partially crystallized (semi-crystallized) amorphous silicon film is brought into contact with sulfuric acid and the partially crystallized (semi-crystallized) amorphous silicon film is simultaneously cleaned. Done,
Impurity elements other than the elements used as catalyst elements, for example,
The concentrations of Fe, Cr, Co, Cu, etc. were also reduced. Also,
After the amorphous silicon film partially crystallized (semi-crystallized) is brought into contact with sulfuric acid, a hydrofluoric acid treatment is preferably performed to remove residues.

The steps from the catalyst element addition step to the crystallization step and the catalyst element reduction step were continuously performed in the same apparatus.

Further, the semiconductor film 106 in which the catalytic element in the film is reduced by the step shown in FIG. 1C is crystallized by performing a second heat treatment at 550 ° C. to 600 ° C. in a nitrogen atmosphere. A crystalline silicon film 107 is obtained. The second here
The heat treatment is performed for a longer time than the first heat treatment to crystallize most of the amorphous silicon film.

Then, patterning is performed to obtain an island-shaped semiconductor layer 108 to be an active layer of the TFT. (Figure 1
(E) Since the island-shaped semiconductor layer 108 has a sufficiently reduced nickel concentration, a leak current can be suppressed.

After the above-described FIG. 1D, an annealing process using a laser may be performed. For example, as a pulse oscillation type laser, a short wavelength (ultraviolet region) XeCl excimer laser, a long wavelength YAG laser, or the like is used. Since the excimer laser used in this embodiment oscillates ultraviolet light, melting and solidification are repeated instantaneously in the irradiated area. Therefore, by irradiating the excimer laser beam, a kind of non-equilibrium state is formed, and nickel becomes very mobile.

After the second heat treatment for obtaining the crystalline silicon film or after the laser crystallization, gettering treatment with a liquid such as sulfuric acid or gas such as halogen to further reduce the catalytic element in the film. It is effective to perform gettering processing.

FIG. 2 shows a process of fabricating a CMOS circuit in which an N-channel TFT and a P-channel TFT are complementarily combined using the island-shaped semiconductor layer 108 obtained in the process shown in FIG. It will be described using FIG.

In FIG. 2A, 111N is a semiconductor layer of an N-channel TFT, and 111P is a semiconductor layer of a P-channel TFT. Semiconductor layers 111N, 111P
Corresponds to the island-shaped semiconductor layer 108 in FIG. A silicon oxide film 11 is formed on these semiconductor layers 111N and 111P by a plasma CVD method, a sputtering method, or a low pressure thermal CVD method.
2 is formed to a thickness of 150 nm (FIG. 2A).

Next, a metal film mainly composed of aluminum is formed, and a prototype pattern of a gate electrode (gate wiring) is formed by patterning. Next, an anodic oxidation technique described in Japanese Patent Application Laid-Open No. Hei 7-135318 by the present inventors is used. Utilizing the technology described in the publication, first, porous anodic oxide films 113 and 114 are formed on the side surfaces of the prototype pattern of the gate electrode, and then a dense anode is formed around the prototype pattern of the gate electrode. Oxide film 115, 1
16 are formed. The original pattern of the gate electrode remaining without being anodized is the gate electrodes 117 and 118.
Is defined as Although aluminum was used in this embodiment, other materials for the gate electrode include, for example, high melting point metals such as Ta (tantalum), Mo (molybdenum), Ti (titanium), W (tungsten), and chromium (Cr). A material such as silicide, which is a compound of a metal material and silicon, polysilicon having N-type or P-type conductivity, or a low-resistance metal Cu (copper) can be used.

Next, the silicon oxide film 112 is etched using the gate electrodes 117 and 118 and the porous anodic oxide films 113 and 114 as a mask, and the gate insulating films 119 and 120 are etched.
To form And then, the porous anodic oxide film 11
3, 114 are removed. Thus, the gate insulating film 119,
120 is exposed from the ends of the gate electrodes 117 and 118 (FIG. 2B).

Next, impurity ions for imparting N-type are added in two portions by using an ion plantation method or an ion doping method. In this embodiment, P ions are added by an ion doping method. First, the first impurity addition is performed at a high accelerating voltage to form an n ⁻ region.

At this time, since the acceleration voltage is high, impurity ions are added not only to the exposed active layers 111N and 111P but also to the portions below the exposed ends of the gate insulating films 119 and 120. This n ⁻ region is an LDD region (impurity concentration is 1 × 1
The dose is set so as to function as about 0 ¹⁸ to 1 × 10 ¹⁹ atoms / cm ³ ).

Further, the second impurity addition is performed at a low acceleration voltage to form an n ⁺ region. At this time, since the acceleration voltage is low, the gate insulating films 119 and 120 function as a mask. The dose is set so that the sheet resistance becomes 500Ω or less (preferably 300Ω or less) since the n ⁺ region becomes a source / drain region later.

Through the above steps, a source region 121, a drain region 122, a low-concentration impurity region 123, and a channel forming region 124 of the N-channel TFT are formed. In this state, the active layer 111P of the P-channel TFT is
Are in the same state as the active layer of the N-channel TFT (FIG. 2C).

Next, a resist mask 125 is provided so as to cover the N-channel type TFT, and an impurity imparting P-type is added by ion implantation or ion doping. In this example, B was added by an ion doping method. This step is also performed twice in the same manner as the above-described impurity adding step for imparting N-type. In this way, the source region 127 and the drain region 12 of the P-channel TFT
8, low concentration impurity region 129, channel formation region 130
Is formed (FIG. 2D).

However, in this case, the conductivity type of the impurity region needs to be inverted from N-type to P-type.
About two to three times as many impurity ions as in the channel type TFT process must be added. The n ⁺ region and n
^{In the} case where a resist mask is provided so as to cover the P-channel type TFT before the region forming step, it is not necessary to invert from N-type to P-type, so that impurity ions may be added at a normal dose.

After completion of the above doping step, activation of impurity ions and recovery from damage due to ion addition are aimed at by furnace annealing, laser annealing or lamp annealing.

Next, an interlayer insulating film 131 is formed to a thickness of 500 nm. A silicon oxide film as the interlayer insulating film 131,
Any of a silicon nitride film, a silicon oxynitride film, an organic resin film (a polyimide, a BCB film, or the like) or a stacked film thereof can be used.

Then, a contact hole is formed, and a source wiring 132 and a drain wiring 133 are formed.
The state shown in FIG. 2E is obtained. Finally, heat treatment is performed in a hydrogen atmosphere, and the whole is hydrogenated to complete a CMOS circuit.

The CMOS circuit shown in this embodiment is also called an inverter circuit and is a basic circuit constituting a semiconductor circuit. By combining such inverter circuits, a basic logic circuit such as a NAND circuit or a NOR circuit can be formed, or a more complicated logic circuit can be formed.

A semiconductor device provided with a semiconductor circuit including a semiconductor element using the above-described manufacturing process will be described with reference to FIGS.
An example of the structure will be described with reference to FIG. Note that a semiconductor device according to the present invention includes a peripheral driver circuit portion and a pixel matrix circuit portion on the same substrate. In this embodiment, for the sake of simplicity of illustration, a CMOS circuit forming part of a peripheral driving circuit portion and a pixel TFT (N-channel TFT) forming part of a pixel matrix circuit portion are shown on the same substrate. Have been.

FIGS. 3A and 3B are diagrams of FIG.
FIG. 3C is a diagram corresponding to a top view. In FIGS. 3A and 3B, a portion cut along a dotted line XX ′ corresponds to a cross-sectional structure of the pixel matrix circuit in FIG. 3C. The portion cut along the dotted line YY ′ corresponds to the cross-sectional structure of the CMOS circuit in FIG.

In FIG. 3C, each of the TFTs (thin film transistors) is a base film 3 provided on a substrate 301.
02 is formed. In the case of a P-channel TFT of a CMOS circuit, a P-type high concentration impurity region (source region or drain region) as an active layer, a channel formation region, and a low concentration impurity between the high concentration impurity region and the channel formation region. An impurity region (LDD region) is formed.
A gate wiring is formed on the channel formation region via a gate insulating film. The gate wiring is protected by a barrier type anodic oxide. A contact hole is formed in a first interlayer insulating film covering the wiring, a wiring is connected to the high-concentration impurity region, a second interlayer insulating film is further formed thereon, and a lead wiring 310 is connected to the wiring 305. Then, a third interlayer insulating film 313 is formed so as to cover it.

On the other hand, an N-channel type TFT has an N-type high concentration impurity region (source region or drain region) as an active layer, a channel formation region, and a low concentration impurity between the high concentration impurity region and the channel formation region. An impurity region is formed. Wirings 304 and 303 are connected to the high-concentration impurity region, and a lead-out wiring 309 is connected to the wiring 303. Portions other than the active layer have the same structure as the P-channel TFT.

The N-channel TFT formed in the pixel matrix circuit has the same structure as the N-channel TFT of the CMOS circuit up to the portion where the first interlayer insulating film is formed. Then, wirings 306 and 308 are connected to the n ⁺ region, on which a second interlayer insulating film and a black mask 311 are formed. Further, a third interlayer insulating film 313 is formed thereon, and a pixel electrode 312 made of a transparent conductive film such as ITO or SnO ₂ is connected. This black mask covers the pixel TFT and forms an auxiliary capacitance with the pixel electrode 312. In this embodiment, a transmissive LCD is manufactured as an example, but there is no particular limitation. For example, a metal material having reflectivity is used as a material of the pixel electrode, and the patterning of the pixel electrode is changed, or some steps are added / added.
If the deletion is performed appropriately, a reflective LCD can be manufactured.

In this embodiment, the gate wiring of the pixel TFT of the pixel matrix circuit has a double gate structure. However, a multi-gate structure such as a triple gate structure may be used in order to reduce the variation in off current. Further, a single gate structure may be used to improve the aperture ratio.

Second Embodiment In the first embodiment, the amorphous silicon film is crystallized by vertical growth. In the present embodiment, the amorphous semiconductor film is crystallized by a method different from that of the first embodiment. Here is an example. Also in this embodiment, nickel is used as the catalyst element. Hereinafter, this embodiment will be described with reference to FIG.

First, in FIG. 4A, the glass substrate 2
01, a 200 nm-thick base film 202 and a 50 nm-thickness
Is formed. Further, a mask insulating film 204 made of a silicon oxide film having a thickness of 70 nm is formed thereon, and an opening 204a for selectively adding a catalytic element (also nickel in this embodiment) is provided.

In this state, UV light is irradiated in an oxygen atmosphere to form an extremely thin oxide film (not shown) on the exposed surface of the amorphous silicon film 203 for improving the wettability. Next, a nickel acetate solution containing 10 ppm (in terms of weight) of nickel is applied by spin coating to form an amorphous silicon film 2.
03, an extremely thin nickel-containing layer 205 is formed (FIG. 4A).

When the state shown in FIG. 4A is obtained, a first heat treatment is performed to partially crystallize (semi-crystallize) the amorphous silicon film 203. Next, although not shown, gettering with the liquid described in the embodiment mode was performed to reduce the number of catalytic elements.

Next, a second heat treatment is performed at 600 ° C. for 8 hours in a nitrogen atmosphere to crystallize the amorphous silicon film 203. Crystallization of the amorphous silicon film 203 proceeds from the nickel-added region 206 in a direction (lateral direction) parallel to the film surface, as indicated by an arrow. In this specification, such crystal growth is referred to as lateral growth (FIG. 4B).

When this second heat treatment is performed, a polycrystalline silicon film (polysilicon film) formed of an aggregate of needle-like or columnar crystals is formed. The present inventors call such a crystallized region a lateral growth region.

At this time, the film after the second heat treatment is 1)
It is classified into three regions: a nickel-added region 206 (crystalline silicon film), 2) a laterally grown region 207 (crystalline silicon film), and 3) a region 208 (amorphous silicon film) that has not been subjected to lateral growth. . Since only the lateral growth region 207 is finally required, description of other regions is omitted in the following description.

Next, the silicon film after the second heat treatment is irradiated with a laser beam. Thus, the lateral growth region 207 becomes a crystalline silicon film 209 having significantly improved crystallinity.
In this embodiment, a KrF excimer laser is used. This laser irradiation step has an effect of not only improving the crystallinity but also bringing nickel into an easily getterable state (FIG. 4).
(C)).

After the irradiation of the laser beam is completed, patterning is performed to obtain an island-shaped semiconductor layer 211. (FIG. 4
(D) In this patterning step, it is preferable to perform patterning so that the island-shaped semiconductor layer 211 does not include a peripheral portion adjacent to the nickel-added region 206.

Next, gettering by contact between the liquid and the island-shaped semiconductor layer 211 is performed. The catalyst element (nickel in this embodiment) is sucked into the liquid (sulfuric acid in this embodiment) by being brought into contact with the liquid. In this embodiment, after the substrate is treated with hydrofluoric acid to remove the natural oxide film, the substrate is placed in sulfuric acid (200 ° C.) for 10 minutes.
After immersion for a minute, it was washed with pure water and dried. Note that, before the liquid gettering step, it is desirable to remove a residue (not shown) and a natural oxide film (not shown) at the time of patterning the surface of the island-shaped semiconductor layer 211. After the gettering step using a liquid, it is preferable to remove residues (not shown) during gettering by hydrofluoric acid treatment.

As described above, by performing the treatment for reducing the catalytic element by using the liquid, the island-shaped semiconductor layer 212 whose nickel concentration is sufficiently reduced is obtained. This island-shaped semiconductor layer 212 is
The TFT may be completed by a known method including a step of forming a gate insulating film using the active layer of the FT.

The lateral growth region 207 obtained after the crystallization step shown in FIG. 4B has a feature that the nickel concentration is lower than the vertically grown region (the region indicated by 105 in FIG. 1) of the first embodiment. There is. Therefore, by using the lateral growth process, it is possible to obtain the effect of increasing the process margin such as lowering the processing temperature of the gettering process and shortening the processing time.

In the following steps, according to the first embodiment, the CMOS circuit and the pixel matrix circuit shown in FIG. 3 can be formed, basic logic circuits such as a NAND circuit and a NOR circuit can be formed, and further complicated circuits can be formed. A logic circuit can be formed.

[Embodiment 3] In this embodiment, an example in which gettering with the liquid of the present invention is performed in combination with a different gettering method will be described. Also in this embodiment, nickel is used as the catalyst element. Hereinafter, this embodiment will be described with reference to FIG.

In the present embodiment, an example in which a technique for removing or reducing a catalyst element remaining in a crystalline silicon film by utilizing the gettering effect of a metal element by a phosphorus element (Japanese Patent Application Laid-Open No. 10-270363) is used. It is. In this embodiment, an example in which the phosphorus element is selectively added using a resist is described below, but the present invention is also applicable to a case where the phosphorus element is added to the entire surface.

A base film 402 made of a silicon oxide film having a thickness of 200 nm is formed on a glass substrate 401. Then, an amorphous silicon film is formed to a thickness of 55 nm. The second heat treatment for crystallizing the amorphous silicon film is performed by the vertical growth method described in the first embodiment or the horizontal growth method described in the second embodiment, and the crystallinity is further reduced by irradiating an excimer laser beam. Encourage. As described above, the crystalline silicon film 403 is formed over the base film 402 (FIG. 5A).

Next, as shown in FIG. 5B, a resist mask 404 is formed on the crystalline silicon film 403. The resist mask 404 is formed so as to cover at least a portion 406 of the semiconductor layer which is to be a channel formation region. At this time, if the end surface of the channel formation region (particularly, the surface that does not join the source / drain region) includes the interface between the region to be gettered and the phosphorus-doped region (gettering region), TF
It may not operate as T.

Next, a P doping step is performed. First,
The accelerating voltage was set to 10 keV, and the dose was set to a P concentration of 1.7.
It is set so as to be × 10 ¹⁵ atoms / cm ² and is doped with P. This doping step allows the phosphorus-doped region 40
5. A gettered area 406 is defined (FIG. 5).
(B)). At this time, the dose is set to an acceleration voltage of 10 keV so that the concentration of B becomes 2.5 × 10 ⁵ atoms / cm ^2, and if B is doped, a further gettering effect can be expected.

After the doping step is completed, the resist mask 404 is removed with a dedicated stripper. And 60
A heat treatment (first gettering) is performed at 0 ° C. for 8 hours to move nickel remaining in the gettered region 406 toward the phosphorus-doped region 405 (in the direction of the arrow). Thus, a gettered region 407 having a reduced nickel concentration is obtained (FIG. 5C).

Next, the island-shaped semiconductor layer 4 is patterned by patterning.
08 is obtained. The island-shaped semiconductor layer 408 is formed in the phosphorus-doped region 4
05 and gettering region 4 with reduced nickel concentration
07. (FIG. 5 (D))

Next, gettering (second gettering) is performed by contact between the liquid and the island-shaped semiconductor layer. The catalyst element (nickel in this embodiment) is sucked into the liquid (sulfuric acid in this embodiment) by being brought into contact with the liquid. In this embodiment, after the substrate is treated with hydrofluoric acid to remove the natural oxide film, sulfuric acid (3
(20 ° C.) for 10 minutes, then washed with pure water and dried. Before the gettering step using a liquid, it is desirable to remove a residue (not shown) and a natural oxide film (not shown) at the time of patterning the surface of the island-shaped semiconductor layer.
After the gettering step using a liquid, it is preferable to remove residues (not shown) during gettering by hydrofluoric acid treatment.

In this manner, the island-shaped semiconductor layer 411 having a sufficiently reduced nickel concentration is obtained by performing the treatment for reducing the catalytic element with the liquid. (FIG. 5E)

The island-shaped semiconductor layer 4 obtained through the above steps
For example, a TFT may be manufactured using the process described in Embodiment 1 with reference to FIG. (FIG. 5
(D)).

Further, in this embodiment, an example has been described in which gettering (second gettering) by contact between the liquid and the island-shaped semiconductor layer is performed after the patterning step. It may be performed before doping.

Since the channel forming region 410 of the island-shaped semiconductor layer 411 is substantially formed of the gettering region 407 having an intrinsic and reduced nickel concentration, a sudden change in the threshold voltage is prevented. Can be eliminated. On the other hand, even if the portion 409 serving as a source region and a drain region contains nickel or an impurity imparting conductivity,
There is no significant adverse effect on the electrical characteristics of T.

[Embodiment 4] In the embodiment described above, the case of manufacturing a top gate type TFT has been described.
In this embodiment, an example of manufacturing an inverted staggered TFT which is a typical example of a bottom gate TFT will be described. This embodiment will be described with reference to FIG.

In FIG. 6A, 601 is a glass substrate, 602 is a base film, 603 is a gate electrode made of a conductive material, 604 is a gate insulating film, 605 is an amorphous silicon film having a thickness of 55 nm, and 606 is This is a nickel-containing layer formed by the same means as in Example 1 (FIG. 6A). Note that a first heat treatment was performed in the same manner as in Example 1 to partially crystallize (semi-crystallize) the amorphous silicon film. Although not shown here, the gate electrode is protected by an anodic oxide film or a silicon nitride film. By forming a film that protects this gate electrode,
Uniform crystallinity is obtained. In this embodiment, the laminated structure of tantalum nitride and tantalum is used. However, as a material of the gate electrode, for example, Ta (tantalum), Mo (molybdenum),
Refractory metals such as i (titanium), W (tungsten), and chromium (Cr); materials such as silicide, which is a compound of these metallic materials and silicon; N-type or P-type conductive polysilicon; Metal Cu (copper) and Al (aluminum) can be used.

Next, after performing a second heat treatment at 550 ° C. for 4 hours, the crystalline silicon film 6 is irradiated with an excimer laser.
07 is formed. In this embodiment, the vertical growth method is used for the crystallization method, but the horizontal growth method shown in the second embodiment may be used (FIG. 6B).

Next, gettering by contact between the liquid and the crystalline silicon film 607 is performed. The catalyst element (nickel in this embodiment) is sucked into the liquid (sulfuric acid in this embodiment) by being brought into contact with the liquid. In this embodiment, after the substrate is treated with hydrofluoric acid to remove the natural oxide film, the substrate is placed in sulfuric acid (320 ° C.) for 10 minutes.
After immersion for a minute, it was washed with pure water and dried. Before the gettering step using a liquid, it is desirable to remove a residue (not shown) and a natural oxide film (not shown) during patterning of the surface of the crystalline silicon film. After the gettering step using a liquid, it is preferable to remove residues (not shown) during gettering by hydrofluoric acid treatment.

In this manner, the crystalline silicon film 611 with a sufficiently reduced nickel concentration is obtained by performing the treatment for reducing the catalytic element with the liquid. (FIG. 6 (C))

Next, the crystalline silicon film 611 having a reduced nickel concentration obtained by the gettering step is patterned to form a semiconductor layer 612. Then, a channel stopper (or called an etching topper) 613 formed by patterning the silicon nitride film over the semiconductor layer 612 is provided (FIG. 6D).

Using channel stopper 613 as a mask, an impurity for imparting N-type or P-type conductivity is added at a low concentration, a resist mask 610 is provided, and an impurity for imparting N-type or P-type conductivity is further provided. After adding to a high concentration,
Activation by laser or heat forms a low-concentration impurity region (LDD region) 610, a source region 614, and a drain region 615. 6E. Further, after providing an interlayer insulating film 609 made of a silicon oxide film or a flat BCB film, a source wiring 616 and a drain wiring 617 are formed. Finally, the whole is hydrogenated, and FIG. 6 (F)
Is completed. Also in this embodiment, the process order may be changed and the catalyst element may be reduced by a liquid after patterning.

Embodiment 5 In this embodiment, an example of a liquid crystal display device manufactured according to the present invention is shown in FIG. A well-known means may be used for a method of manufacturing a pixel TFT (pixel switching element) and a cell assembling step, and a detailed description thereof will be omitted.

FIG. 7 is a schematic diagram of an active matrix type liquid crystal panel of this embodiment. As shown in FIG. 7, an active matrix substrate and a counter substrate face each other, and a liquid crystal is sandwiched between these substrates. The active matrix substrate includes a pixel matrix circuit 801, a scan line driver circuit 802, and a signal line driver circuit 803 formed over a glass substrate 800.
Having.

Scanning line driving circuit 802, signal line driving circuit 8
03 is connected to the pixel matrix circuit 801 by a scanning line 830 and a signal line 840, respectively. These drive circuits 802 and 803 are mainly constituted by CMOS circuits.

A scanning line 830 is formed for each row of the pixel matrix circuit 801, and a signal line 840 is formed for each column. A pixel TFT 810 is formed near the intersection of the scanning line 830 and the signal line 840. Pixel TFT8
The ten gate electrodes are connected to the scanning lines 830, and the sources are connected to the signal lines 840. Further, a pixel electrode 860 and a storage capacitor 870 are connected to the drain.

The opposing substrate 880 is made of ITO over the entire surface of the glass substrate.
A transparent conductive film such as a film is formed. The transparent conductive film is a counter electrode to the pixel electrode 860 of the pixel matrix circuit 801, and the liquid crystal material is driven by an electric field formed between the pixel electrode and the counter electrode. If necessary, an alignment film and a color filter are formed on the counter substrate 880.

IC chips 832 and 833 are mounted on the glass substrate on the active matrix substrate side by using the surface on which the FPC 831 is mounted. These IC chips 832 and 833 are configured by forming circuits such as a video signal processing circuit, a timing pulse generating circuit, a gamma correction circuit, a memory circuit, and an arithmetic circuit on a silicon substrate.

Further, in this embodiment, a liquid crystal display device is described as an example. However, if the display device is an active matrix type display device, the present invention is applied to an EL (electroluminescence) display device and an EC (electrochromics) display device. It goes without saying that the invention can be applied.

The liquid crystal display device which can be manufactured by using the present invention is not limited to a transmission type or a reflection type. It is up to the implementer to choose either. As described above, the present invention can be applied to any active matrix type electro-optical device (semiconductor device).

In manufacturing the semiconductor device shown in this embodiment, any of the structures of Embodiments 1 to 4 may be employed, or the embodiments may be freely combined and used. .

Embodiment 6 The present invention can be applied to all conventional IC technologies. That is, the present invention can be applied to all semiconductor circuits currently on the market. For example, RISC processor, ASI integrated on one chip
It may be applied to a microprocessor such as a C processor, a signal processing circuit typified by a liquid crystal driver circuit (D / A converter, gamma correction circuit, signal division circuit, etc.) or a portable device (cellular phone, PHS, mobile phone). It may be applied to a high frequency circuit for a computer.

A semiconductor circuit such as a microprocessor is mounted on various electronic devices and functions as a central circuit. Representative electronic devices include personal computers, portable information terminal devices, and all other home appliances. Further, a computer for controlling a vehicle (an automobile, a train, or the like) is also included. The present invention is also applicable to such a semiconductor device.

In manufacturing the semiconductor device shown in this embodiment, any of the structures of Embodiments 1 to 4 may be employed, or the embodiments may be freely combined and used. .

[Embodiment 7] In this embodiment, an example in which an EL (electroluminescence) display device is manufactured by using the present invention will be described.

FIG. 8A is a top view of an EL display device using the present invention. 8A, reference numeral 4010 denotes a substrate, 4011 denotes a pixel portion, 4012 denotes a source side driver circuit,
Reference numeral 4013 denotes a gate-side drive circuit. Each drive circuit reaches an FPC 4017 via wirings 4014 to 4016 and is connected to an external device.

At this time, the cover member 600 is formed so as to surround at least the pixel portion, preferably, the driving circuit and the pixel portion.
0, sealing material (also referred to as housing material) 7000,
A sealing material (a second sealing material) 7001 is provided.

FIG. 8B shows a cross-sectional structure of the EL display device of this embodiment, in which a TFT for a driving circuit (here, an n-channel TFT) is provided on a substrate 4010 and a base film 4021.
1 illustrates a CMOS circuit combining an FT and a p-channel TFT. ) 4022 and TFT 402 for pixel portion
3 (However, in this case, the TFT controlling the current to the EL element
Is only shown. ) Is formed.

The present invention relates to a TFT 4022 for a driving circuit,
It can be used for the TFT 4023 for the pixel portion.

The TFT 402 for a driving circuit is manufactured by using the present invention.
2. When the pixel portion TFT 4023 is completed, the pixel portion TFT is formed on an interlayer insulating film (flattening film) 4026 made of a resin material.
A pixel electrode 4027 made of a transparent conductive film electrically connected to the drain of the FT 4023 is formed. As the transparent conductive film, a compound of indium oxide and tin oxide (called ITO) or a compound of indium oxide and zinc oxide can be used. After the pixel electrode 4027 is formed, an insulating film 4028 is formed, and an opening is formed over the pixel electrode 4027.

Next, an EL layer 4029 is formed. The EL layer 4029 is formed of a known EL material (a hole injection layer, a hole transport layer,
A light-emitting layer, an electron transport layer, or an electron injection layer) may be freely combined to form a stacked structure or a single-layer structure. A known technique may be used to determine the structure. Also, E
The L material includes a low molecular material and a high molecular (polymer) material. When a low molecular material is used, an evaporation method is used, but when a high molecular material is used, a spin coating method,
A simple method such as a printing method or an inkjet method can be used.

In this embodiment, an EL layer is formed by an evaporation method using a shadow mask. By forming a light-emitting layer (a red light-emitting layer, a green light-emitting layer, and a blue light-emitting layer) capable of emitting light having different wavelengths for each pixel using a shadow mask, color display becomes possible. In addition, the color conversion layer (CC
M) and a color filter are combined, and a white light-emitting layer and a color filter are combined. Either method may be used. Needless to say, a monochromatic EL display device can be used.

After forming the EL layer 4029, the cathode 4030 is formed thereon. Cathode 4030 and EL layer 4029
It is desirable to remove as much as possible moisture and oxygen existing at the interface. Therefore, the EL layer 4029 and the cathode 40 in vacuum
It is necessary to devise a method of continuously forming the film 30 or forming the EL layer 4029 in an inert atmosphere and forming the cathode 4030 without opening to the atmosphere. In this embodiment, the above-described film formation is made possible by using a multi-chamber type (cluster tool type) film formation apparatus.

In this embodiment, the cathode 4030 is
A laminated structure of a LiF (lithium fluoride) film and an Al (aluminum) film is used. Specifically, a 1-nm-thick LiF (lithium fluoride) film is formed over the EL layer 4029 by a vapor deposition method, and a 300-nm-thick aluminum film is formed thereover. Of course, a MgAg electrode which is a known cathode material may be used. The cathode 4030 is connected to the wiring 4016 in a region indicated by 4031. A wiring 4016 is a power supply line for applying a predetermined voltage to the cathode 4030, and the FPC 401 via the conductive paste material 4032.
7 is connected.

In the region indicated by 4031, the cathode 40
In order to electrically connect the wiring 30 and the wiring 3016, it is necessary to form contact holes in the interlayer insulating film 4026 and the insulating film 4028. These are at the time of etching the interlayer insulating film 4026 (at the time of forming the contact hole for the pixel electrode).
Or when the insulating film 4028 is etched (when an opening is formed before the EL layer is formed). Also, the insulating film 40
When etching 28, etching may be performed all at once up to the interlayer insulating film 4026. In this case, the interlayer insulating film 40
If the same resin material is used for the insulating film 26 and the insulating film 4028, the shape of the contact hole can be made good.

The passivation film 6003 and the filler 600 cover the surface of the EL element thus formed.
4. The cover material 6000 is formed.

Further, a sealing material is provided inside the cover material 7000 and the substrate 4010 so as to surround the EL element portion, and a sealing material (second sealing material) 7001 is formed outside the sealing material 7000.

At this time, the filler 6004 also functions as an adhesive for bonding the cover material 6000.
As the filler 6004, PVC (polyvinyl chloride), epoxy resin, silicone resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used. It is preferable to provide a desiccant inside the filler 6004 because a moisture absorbing effect can be maintained.

A spacer may be contained in the filler 6004. At this time, the spacer may be a granular substance made of BaO or the like, and the spacer itself may have hygroscopicity.

When a spacer is provided, the passivation film 6003 can reduce the spacer pressure.
Further, a resin film or the like for relaxing the spacer pressure may be provided separately from the passivation film.

As the cover material 6000, a glass plate, an aluminum plate, a stainless steel plate, FRP (Fiber)
rglass-Reinforced Plastic
s) plate, PVF (polyvinyl fluoride) film,
Mylar film, polyester film or acrylic film can be used. The filling material 600
When PVB or EVA is used as 4, it is preferable to use a sheet having a structure in which aluminum foil of several tens of μm is sandwiched between PVF films or Mylar films.

However, depending on the direction of light emission (the direction of light emission) from the EL element, the cover material 6000 needs to have a light transmitting property.

The wiring 4016 is made of a sealing material 700.
0 and through the gap between the sealing material 7001 and the substrate 4010, and is electrically connected to the FPC 4017. Although the wiring 4016 has been described here, the other wiring 401
4, 4015 are similarly electrically connected to the FPC 4017 under the sealant 7000 and the sealant 7001.

The structure of this embodiment can be implemented by freely combining with the structures of Embodiments 1 to 5.

[Embodiment 8] A CMOS circuit and a pixel portion formed by carrying out the present invention are not limited to various electro-optical devices (active matrix type liquid crystal display, active matrix type EL display, active matrix type EC).
Display). That is, the invention of the present application can be applied to all electronic devices in which these electro-optical devices are incorporated in a display unit.

Examples of such electronic devices include a video camera, a digital camera, a projector (rear or front type), a head mounted display (goggle type display), a car navigation, a car stereo,
Examples include a personal computer and a portable information terminal (a mobile computer, a mobile phone, an electronic book, or the like). Examples of these are shown in FIG. 9, FIG. 10 and FIG.

FIG. 9A shows a personal computer, which includes a main body 2001, an image input section 2002, and a display section 200.
3, including the keyboard 2004 and the like. The present invention can be applied to the image input unit 2002, the display unit 2003, and other signal control circuits.

FIG. 9B shows a video camera,
101, display unit 2102, voice input unit 2103, operation switch 2104, battery 2105, image receiving unit 2106
And so on. The present invention can be applied to the display portion 2102 and other signal control circuits.

FIG. 9C shows a mobile computer (mobile computer), which includes a main body 2201 and a camera section 2.
202, an image receiving unit 2203, operation switches 2204, a display unit 2205, and the like. The present invention can be applied to the display portion 2205 and other signal control circuits.

FIG. 9D shows a goggle type display, which includes a main body 2301, a display portion 2302, and an arm portion 2303.
And so on. The present invention can be applied to the display portion 2302 and other signal control circuits.

FIG. 9E shows a player that uses a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display section 2402, and a speaker section 240.
3, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (D
digital Versatile Disc), CD
And the like, it is possible to perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2402 and other signal control circuits.

FIG. 9F shows a digital camera, which includes a main body 2501, a display section 2502, an eyepiece section 2503, operation switches 2504, an image receiving section (not shown), and the like. The present invention can be applied to the display portion 2502 and other signal control circuits.

FIG. 10A shows a front type projector, which includes a projection device 2601, a screen 2602, and the like. The present invention can be applied to the liquid crystal display device 2808 forming a part of the projection device 2601 and other signal control circuits.

FIG. 10B shows a rear type projector, which includes a main body 2701, a projection device 2702, and a mirror 270.
3, including a screen 2704 and the like. The present invention relates to a projection device 2
The present invention can be applied to the liquid crystal display device 2808 forming a part of the signal control circuit 702 and other signal control circuits.

FIG. 10C is a diagram showing an example of the structure of the projection devices 2601 and 2702 in FIGS. 10A and 10B. Projection devices 2601, 27
02 denotes a light source optical system 2801, mirrors 2802, 280
4 to 2806, dichroic mirror 2803, prism 2807, liquid crystal display device 2808, retardation plate 280
9. The projection optical system 2810. Projection optical system 28
Reference numeral 10 denotes an optical system including a projection lens. In the present embodiment, an example of a three-plate type is shown, but there is no particular limitation, and for example, a single-plate type may be used. Further, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the optical path indicated by the arrow in FIG. Good.

FIG. 10D is a diagram showing an example of the structure of the light source optical system 2801 in FIG. 10C. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, a lens array 2813,
814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system shown in FIG. 10D is an example and is not particularly limited. For example, a practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the light source optical system.

However, in the projector shown in FIG. 10, a case in which a transmissive electro-optical device is used is shown, and examples of application to a reflective electro-optical device and an EL display device are not shown.

FIG. 11A shows a mobile phone,
01, audio output unit 2902, audio input unit 2903, display unit 2904, operation switch 2905, antenna 2906
And so on. The present invention can be applied to the audio output unit 2902, the audio input unit 2903, the display unit 2904, and other signal control circuits.

FIG. 11B shows a portable book (electronic book), which includes a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, and an antenna 3006.
And so on. The present invention can be applied to the display units 3002 and 3003 and other signal circuits.

FIG. 11C shows a display, which includes a main body 3101, a support 3102, a display portion 3103, and the like.
The present invention can be applied to the display portion 3103. The display of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for a display having a diagonal of 10 inches or more (particularly 30 inches or more).

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to electronic devices in various fields. Further, the electronic apparatus according to the present embodiment can be realized by using any combination of the embodiments 1 to 6.

[0160]

According to the present invention, the catalytic element can be efficiently removed or reduced from the crystalline semiconductor film obtained by utilizing the catalytic element that promotes crystallization. Also,
The gettering treatment of the present invention is the heat resistant temperature (strain point) of glass.
It can be performed at the following temperatures and conventional low temperature processes can be used.

Further, the crystalline semiconductor film obtained by using the present invention has extremely excellent crystallinity due to the effect of the catalytic element, and the catalytic element has been reduced to a sufficiently low concentration by the gettering treatment. Therefore, when used as an active layer of a semiconductor device, a semiconductor device having excellent electrical characteristics and high reliability can be obtained. In particular, TFT
This makes it possible to eliminate a sudden increase in the off-state current.

In the present invention, since the gettering process using a liquid is performed after the first crystallization step, the gettering process can be performed effectively in a relatively short time, and the throughput is improved.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a gettering step in Example 1, and is a cross-sectional view of a substrate.

FIG. 2 is an explanatory diagram of a manufacturing process of the TFT of Example 1.

FIG. 3 is an explanatory diagram of a top view and a cross-sectional view of the first embodiment.

FIG. 4 is an explanatory view of a gettering step of Example 2 and is a cross-sectional view of a substrate.

FIG. 5 is an explanatory diagram of a gettering step in Example 3, which is a cross-sectional view of a substrate.

FIG. 6 is an explanatory diagram of a manufacturing process of a TFT of Example 4.

FIG. 7 is a diagram showing a configuration of an active matrix substrate.

FIG. 8 is a diagram showing an EL display device.

FIG. 9 is an explanatory diagram of an electronic device.

FIG. 10 is an explanatory diagram of an electronic device.

FIG. 11 is an explanatory diagram of an electronic device.

Claims (16)

[Claims] A first step of forming an amorphous semiconductor film containing silicon on a substrate; and introducing a catalyst element for promoting crystallization of silicon into the amorphous semiconductor film. A second step of performing a first heat treatment for crystallizing a part of the crystalline semiconductor film; and a third step of bringing the partially crystallized semiconductor film into contact with a liquid to reduce the catalytic element in the film. And a fourth step of performing a second heat treatment for crystallizing the partially crystallized semiconductor film to form a crystalline semiconductor film;
A method for manufacturing a semiconductor device, comprising: A first step of forming an amorphous semiconductor film containing silicon on a substrate; and a step of selectively introducing a catalytic element for promoting crystallization of silicon into the amorphous semiconductor film. Second heat treatment for crystallizing a part of the amorphous semiconductor film
A step of contacting the semiconductor film with a liquid to reduce the catalytic element in the film, and a second heat treatment of crystallizing the semiconductor film to form a crystalline semiconductor film. And a fourth step. 3. The method according to claim 1, wherein in the second step, a catalyst element is introduced by film formation by a sputtering method, and a substrate temperature during the film formation is set to 450 to 600 ° C.
A method for manufacturing a semiconductor device, which is a step of crystallizing a part of the amorphous semiconductor film. 4. The method according to claim 1, wherein after the fourth step, as a fifth step, a heat treatment is performed in an atmosphere containing a halogen element, and further, a catalyst element in the film is removed. A method for manufacturing a semiconductor device. 5. The method according to claim 1, wherein, after the fourth step, as a fifth step, the crystalline semiconductor film is brought into contact with a liquid, and further, a catalytic element in the film is removed. A method for manufacturing a semiconductor device. 6. The method according to claim 5, wherein the liquid is sulfuric acid, nitric acid, oxalic acid, aqua regia, hydrochloric acid,
A method for manufacturing a semiconductor device, comprising at least one chemical selected from hydrofluoric acid. 7. The method according to claim 1, wherein the catalyst element is Ni, Co, Fe, Pd, Pt, Cu, A
a method for manufacturing a semiconductor device, which is at least one element selected from u. 8. The method according to claim 1, wherein the liquid is sulfuric acid, nitric acid, oxalic acid,
A method for manufacturing a semiconductor device, comprising at least one chemical selected from aqua regia, hydrochloric acid, and hydrofluoric acid. 9. The method for manufacturing a semiconductor device according to claim 1, wherein the crystalline semiconductor film formed in the fourth step is a polycrystalline semiconductor film having a crystal grain boundary. . 10. The method for manufacturing a semiconductor device according to claim 1, wherein the crystalline semiconductor film is irradiated with laser light after the fourth step. 11. The method according to claim 1, wherein in the third step, the catalyst element in the film is removed.
A method for reducing the amount required for crystallization in the step (a). 12. The method for manufacturing a semiconductor device according to claim 1, wherein an oxide film on a surface of the semiconductor film is removed before the third step. 13. The method for manufacturing a semiconductor device according to claim 1, wherein after the third step, a surface of the semiconductor film in which the catalytic element is reduced is washed. 14. A first step of forming an amorphous semiconductor film containing silicon on a substrate, a second step of introducing a catalytic element for promoting crystallization of silicon into the amorphous semiconductor film, A third step of performing a first heat treatment for crystallizing a part of the amorphous semiconductor film; and a fourth step of performing gettering for reducing the catalytic element in the partially crystallized semiconductor film. And a fifth step of performing a second heat treatment for a longer time than the first heat treatment and crystallizing the partially crystallized semiconductor film to form a crystalline semiconductor film. A method for manufacturing a semiconductor device, comprising: 15. The fabrication of a semiconductor device according to claim 14, wherein the gettering reduces the catalytic element in the film by bringing the partially crystallized semiconductor film into contact with a liquid. Method. 16. The method according to claim 14, wherein
The heating temperature of the first heat treatment and the second heat treatment is 4
A method for manufacturing a semiconductor device, which is at 50 to 600 ° C.