JP2000243765A - Mounting structure of semiconductor chip and method for mounting the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a mounting structure of a semiconductor chip, capable of readily, accurately, and rigidly face-mounting the highly integrated semiconductor chip on a mounting substrate. SOLUTION: In this mounting structure, a connection terminal 20 erected in an electrode pad 12 of a semiconductor chip 10 is mutually joined to a connection terminal 40, erected in a conductive pad 32 in a mounting substrate 30 corresponding to the terminal 20. A dummy terminal 50 is erected via an insulated layer 52, on a face 14 positioned between the electrode pads 12 of the semiconductor chip. A dummy terminal 60 is erected via an insulated layer 62, on a face 34 positioned between the conductive pads 32 of the mounting substrate. The dummy terminal 50 at a side of the semiconductor chip 10 is mutually joined to the dummy terminal 60 at a side of the mounting substrate 30 corresponding to the terminal 50. The semiconductor chip 10 is rigidly joined to the mounting substrate 30 via the dummy terminals 50, 60 and the insulated layers 52, 62.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip mounting structure in which a highly integrated semiconductor chip having a large number of electrode pads is surface-mounted on a mounting substrate, and a method for mounting the semiconductor chip.

[0002]

2. Description of the Related Art When the above-mentioned highly integrated semiconductor chip is surface-mounted on a mounting substrate, connection terminals formed of solder bumps formed on a large number of electrode pads arranged on the semiconductor chip are mounted on the corresponding mounting surface. Connection terminals consisting of solder bumps formed on a large number of conductor pads arranged on the board,
Each is connected by a flip chip bonding method. At the same time, an underfill material is filled between the semiconductor chip and the mounting substrate, and the semiconductor chip is bonded to the mounting substrate via the underfill material. Alternatively, connection terminals formed of solder bumps and the like formed on a large number of electrode pads arranged on the highly integrated semiconductor chip are formed of solder bumps and the like formed on a large number of conductor pads arranged on a corresponding mounting substrate. ACF to connection terminal
(Anisotropy Conductive Fi
lm, which is connected via an anisotropic conductive film).

[0003]

However, the method of soldering the connection terminals on the semiconductor chip side to the connection terminals on the mounting board side by the above-mentioned flip-chip bonding method requires a minimum pitch of the connection terminals arranged on the semiconductor chip side. The limit is 0.20 to 0.10 mm, and it cannot be applied to a semiconductor chip in which a large number of connection terminals are arranged at a fine pitch smaller than that. Similarly, the method of connecting the connection terminal on the semiconductor chip side to the connection terminal on the mounting board via the above-described ACF and mounting the semiconductor chip on the mounting board also requires the minimum pitch of the connection terminals arranged on the semiconductor chip side. The limit is 0.
It cannot be applied to a highly integrated semiconductor chip in which a large number of connection terminals are arranged at a fine pitch of 10 to 0.05 mm or less.

The present invention has been made in view of such a problem, and a large number of connection terminals which cannot be connected to each other via flip chip bonding or ACF cannot be connected at a fine pitch. It is an object of the present invention to provide a semiconductor chip mounting structure and a semiconductor chip mounting method that can easily and accurately surface mount semiconductor chips lined up on a mounting substrate.

[0005]

In order to achieve the above object, a first semiconductor chip mounting structure according to the present invention comprises a connecting terminal provided on an electrode pad of a semiconductor chip and a corresponding conductor on a mounting board. A connection terminal erected on the pad is joined, and is located between the dummy terminal erected on the surface located between the electrode pads of the semiconductor chip via an insulating layer and the corresponding conductor pad of the mounting board. It is characterized in that the surface is joined to a dummy terminal which is erected through an insulating layer.

In the first semiconductor chip mounting structure, the semiconductor chip can be firmly joined to the mounting board via the dummy terminals joined to each other on the semiconductor chip side and the mounting board side. Therefore, it is possible to eliminate the necessity of filling the underfill material between the semiconductor chip and the mounting board and firmly joining the semiconductor chip to the mounting board via the underfill material. At the same time, air with a low dielectric constant is interposed between the connection terminals on the semiconductor chip side and between the connection terminals on the mounting board side without the above-mentioned underfill material made of resin or the like having a high dielectric constant. It can be. Then, the parasitic capacitance between the connection terminals on the semiconductor chip side and the mounting substrate side can be greatly reduced. Then, the high-frequency characteristics of the high-frequency signal transmitted through the connection terminals on the semiconductor chip side and the mounting substrate side can be improved.

Further, the dummy terminals are provided upright on the surface located between the electrode pads of the semiconductor chip or on the surface located between the conductive pads of the mounting board via the insulating layer. Further, it is possible to prevent a noise signal from being transmitted between the internal circuit of the semiconductor chip and the wiring circuit of the mounting board via the dummy terminals joined to each other on the semiconductor chip side and the mounting board side.

A first method of mounting a semiconductor chip according to the present invention is characterized by including the following steps. a. Forming an insulating layer on the surface of the semiconductor chip on which the electrode pads are formed, except for a central portion of the upper surface of the electrode pads; b. Forming a conductive layer continuously covering an insulating layer formed on the surface of the semiconductor chip and a central portion of an upper surface of the electrode pad; c. In the conductor layer covering the insulation layer formed on the surface of the semiconductor chip, a narrow groove penetrating the conductor layer and reaching the insulation layer immediately thereunder is engraved in a series so as to surround the electrode pad, and Erecting column-shaped connection terminals made of the conductor layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the conductor layer on the surface located between the electrode pads of the semiconductor chip via the insulating layer; . d. A step of forming an insulating layer on the surface of the mounting board on which the conductive pads are formed, except for a central portion of the upper surface of the conductive pads; e. Forming an insulating layer formed on the surface of the mounting board and a conductor layer that continuously covers the center of the upper surface of the conductor pad; f. In the conductor layer covering the insulation layer formed on the surface of the mounting substrate, a narrow groove penetrating the conductor layer and reaching the insulation layer immediately thereunder is engraved in series so as to surround the conductor pad, and Erecting column-shaped connection terminals made of the conductor layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the conductor layer via the insulating layer on a surface located between the conductor pads of the mounting board; . g. A step of superposing the connection terminal and the dummy terminal erected on the semiconductor chip side on the corresponding connection terminal and the dummy terminal erected on the mounting substrate side, and mounting the semiconductor chip on the mounting substrate. h. Bonding the connection terminal and the dummy terminal erected on the semiconductor chip side to the corresponding connection terminal and the dummy terminal erected on the mounting substrate side.

In the first method for mounting a semiconductor chip, in the steps a to c, a columnar connection terminal made of a conductive layer can be provided upright at the center of the upper surface of the electrode pad of the semiconductor chip. At the same time, a columnar dummy terminal made of a conductor layer can be provided upright on the surface located between the electrode pads of the semiconductor chip via the insulating layer. Similarly, in the steps d to f, a columnar connection terminal made of a conductor layer can be erected at the center of the upper surface of the conductor pad of the mounting board. At the same time, a columnar dummy terminal made of a conductive layer can be provided upright on the surface of the mounting board located between the conductive pads via the insulating layer. Then
In the steps g to h, the connection terminal on the semiconductor chip side can be joined to the corresponding connection terminal on the mounting board, and the dummy terminal on the semiconductor chip side can be joined to the corresponding dummy terminal on the mounting board side. At the same time, the semiconductor chip can be firmly joined to the mounting board via the dummy terminal and the insulating layer. Then, the semiconductor chip can be surface-mounted on the mounting board.

A second semiconductor chip mounting structure according to the present invention is characterized in that a connection terminal made of solder formed on an electrode pad of a semiconductor chip and a connection terminal made of solder mounted on a corresponding conductor pad of a mounting board are provided. Are soldered, and dummy terminals made of solder are formed on a surface located between the electrode pads of the semiconductor chip and a surface located between the conductor pads of the mounting substrate via an insulating layer, respectively. Are filled with an underfill material, and the semiconductor chip and the mounting substrate are joined via the underfill material.

In this second semiconductor chip mounting structure, the underfill material filled between the semiconductor chip and the mounting substrate is widely wrapped around the dummy terminals formed on the semiconductor chip side and the mounting substrate side. Can be made. Then, the bonding area of the underfill material to be filled between the semiconductor chip and the mounting board can be increased by the amount of the underfill material wrapping around the dummy terminal. And
The semiconductor chip can be firmly joined to the mounting substrate via the underfill material having an enlarged joining area. Further, a dummy terminal formed on the semiconductor chip side or the mounting substrate side can be interposed between the connection terminals provided on the semiconductor chip side or the mounting substrate side. The amount of the underfill material made of resin or the like having a high dielectric constant and filled between the connection terminals on the semiconductor chip side and the mounting substrate side can be reduced by the volume of the dummy terminals. Then, the parasitic capacitance between the connection terminals on the semiconductor chip side and the mounting substrate side can be reduced. Then, the high-frequency characteristics of the high-frequency signal transmitted through the connection terminals on the semiconductor chip side and the mounting substrate side can be improved.

The dummy terminal is formed on a surface located between the electrode pads of the semiconductor chip or on a surface located between the conductor pads of the mounting board via the insulating layer. Even when the dummy terminals on the semiconductor chip side and the mounting board side are soldered to each other, through the dummy terminals soldered to each other,
It is possible to prevent a noise signal from being transmitted between the internal circuit of the semiconductor chip and the wiring circuit of the mounting board.

A second method of mounting a semiconductor chip according to the present invention includes the following steps. a. Forming an insulating layer on the surface of the semiconductor chip on which the electrode pads are formed, except for a central portion of the upper surface of the electrode pads; b. Forming an insulating layer formed on the surface of the semiconductor chip and a solder layer that continuously covers a central portion of the upper surface of the electrode pad; c. In the solder layer covering the insulating layer formed on the surface of the semiconductor chip, a narrow groove penetrating the solder layer and reaching the insulating layer immediately thereunder is engraved in a series so as to surround the electrode pad. Erecting column-shaped connection terminals made of the solder layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the solder layer on the surface located between the electrode pads of the semiconductor chip via the insulating layer; . d. A step of preheating the semiconductor chip on which the columnar connection terminals and the dummy terminals are erected to form the connection terminals and the dummy terminals made of the solder layer into a substantially hemispherical shape. e. A step of forming an insulating layer on the surface of the mounting board on which the conductive pads are formed, except for a central portion of the upper surface of the conductive pads; f. Forming a solder layer that continuously covers the insulating layer formed on the surface of the mounting board and the center of the upper surface of the conductive pad; g. On the solder layer covering the insulating layer formed on the surface of the mounting board, a narrow groove penetrating the solder layer and reaching the insulating layer immediately below the solder layer is engraved in a series so as to surround the conductive pad, and Erecting column-shaped connection terminals made of the solder layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the solder layer on the surface located between the conductor pads of the mounting board via the insulating layer; . h. A step of preheating the mounting substrate on which the columnar connection terminals and the dummy terminals are erected, and forming the connection terminals and the dummy terminals formed of the solder layer in a substantially hemispherical shape. i. Superposing the substantially hemispherical connection terminals formed on the semiconductor chip side with the corresponding substantially hemispherical connection terminals formed on the mounting substrate side, and mounting the semiconductor chip on the mounting substrate. j. Heating the mounting substrate on which the semiconductor chip is mounted,
A step of melting and soldering the connection terminals on the semiconductor chip side and the corresponding connection terminals on the mounting board side; k. Filling an underfill material between the semiconductor chip to which the corresponding connection terminals are soldered and the mounting substrate, and joining the semiconductor chip to the mounting substrate via the underfill material.

In the second semiconductor chip mounting method, in the steps a to d, a substantially hemispherical connection terminal made of solder can be formed at the center of the upper surface of the electrode pad of the semiconductor chip. In addition, a substantially hemispherical dummy terminal made of solder can be formed on the surface of the semiconductor chip located between the electrode pads via the insulating layer. Similarly, the e
In steps (h) to (h), a substantially hemispherical connection terminal made of solder can be formed at the center of the upper surface of the conductor pad of the mounting board. At the same time, a substantially hemispherical dummy terminal made of solder can be formed on the surface of the mounting board located between the conductive pads via the insulating layer. Then, in the steps i to j,
The connection terminals on the semiconductor chip can be soldered to the corresponding connection terminals on the mounting board. Thereafter, in the k-step, the underfill material filled between the semiconductor chip and the mounting substrate is widely wrapped around the peripheral surface of the dummy terminal formed on the semiconductor chip side or the mounting substrate side, and through the underfill material. Thus, the semiconductor chip can be firmly joined to the mounting substrate. Then, the semiconductor chip can be surface-mounted on the mounting board.

[0015]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a preferred embodiment of the mounting structure of the first semiconductor chip of the present invention, and FIG. 1 is an explanatory view of the structure. Hereinafter, the mounting structure of the first semiconductor chip will be described.

In the mounting structure of the first semiconductor chip shown in FIG.
The columnar connection terminals 20 erected on the electrode pads 12 of the semiconductor chip 10 are overlapped and joined to the corresponding columnar connection terminals 40 erected on the conductor pads 32 of the mounting board 30.

The above structure is almost the same as the conventional semiconductor chip mounting structure. However, in the first semiconductor chip mounting structure shown in the drawing, in addition to this, the surface located between the electrode pads 12 of the semiconductor chip 10 is additionally provided. 14, a columnar dummy terminal 50
Are erected via an insulating layer 52. Similarly, columnar dummy terminals 60 are erected on the surface 34 of the mounting board 30 located between the conductor pads 32 via an insulating layer 62.

The dummy terminals 50 on the semiconductor chip 10 side
The corresponding dummy terminal 60 on the mounting board 30 is overlapped and joined. Then, the dummy terminals 50 and 60 and the insulating layers 52 and 62 that are joined to each other are provided.
The semiconductor chip 10 is firmly joined to the mounting substrate 30 via the through hole. Then, the semiconductor chip 10 is mounted on the mounting substrate 3.
0 is surface mounted.

The mounting structure of the first semiconductor chip shown in FIG.
With the structure as described above, in the mounting structure of the first semiconductor chip, the dummy terminals 50 and 60 and the insulating layers 52 and 62 that are joined to each other on the semiconductor chip 10 side and the mounting substrate 30 side are used. Thus, the semiconductor chip 10 can be firmly joined to the mounting substrate 30. And the semiconductor chip 1
This eliminates the need to fill the space between the semiconductor chip 10 and the mounting substrate 30 with an underfill material for firmly bonding the O to the mounting substrate 30. At the same time, between the connection terminals 20 on the side of the semiconductor chip 10 and between the connection terminals 60 on the side of the mounting substrate 30, the above-mentioned underfill material made of resin or the like having a high dielectric constant is not interposed, and air having a low dielectric constant Can be interposed. Then, the parasitic capacitance between the connection terminals 20 and 40 on the semiconductor chip 10 side and the mounting substrate 30 side can be greatly reduced. Also, dummy terminal 5
0, 60 are erected on the surface 14 located between the electrode pads 12 of the semiconductor chip via the insulating layers 52, 62,
Since it is erected on the surface 34 located between the conductor pads 32 of the mounting board, the internal circuit 16 of the semiconductor chip and the wiring circuit 36 of the mounting board are connected via the dummy terminals 50 and 60 joined to each other. It is possible to prevent a noise signal from being transmitted.

Next, a preferred embodiment of the mounting method of the first semiconductor chip mounting structure according to the present invention, which is the mounting method of the first semiconductor chip mounting structure, will be described.

As shown in FIG. 2, an insulating layer 52 made of resin or the like is formed on the surface 14 of the semiconductor chip on which the electrode pads 12 are formed, except for the center of the upper surface of the electrode pads 12 of the semiconductor chip. . The insulating layer 52 is formed in a flat and substantially hemispherical shape by potting using a polyimide resin or the like on the surface 14 located between the electrode pads 12 of the semiconductor chip. Then, the step a of the mounting method of the first semiconductor chip mounting structure of the present invention is performed.

Next, as shown in FIG. 2, a conductive layer 70 is formed to continuously cover the central portion of the upper surface of the insulating layer 52 and the electrode pad 12 formed on the surface 14 of the semiconductor chip. The conductor layer 70 is formed from a metal layer such as a Ni layer, an Fe layer, or a Cu layer. In this case, the surface of the insulating layer 20 is subjected to a base treatment such as surface roughening, and the conductor layer 70 is adhered to the surface of the insulating layer 52 to be firmly joined. In addition,
The conductor layer 70 can also be formed from a conductor resin layer or the like. Then, the mounting method b step of the first semiconductor chip mounting structure of the present invention is performed.

Next, as shown in FIG. 3, the conductor layer 7 covering the insulating layer 52 formed on the surface 14 of the semiconductor chip is formed.
In FIG. 0, narrow grooves 72 penetrating the conductor layer and reaching the middle of the insulating layer 52 immediately below the conductor layer are engraved in a series of rows and columns so as to surround the electrode pad 12. The narrow groove 72 is engraved on the conductor layer 70 and the insulating layer 52 immediately below the conductor layer 70 by slicing using a slicer, or is engraved on the conductor layer 70 and the insulating layer 52 immediately below the conductor layer 70 using laser light. We have established. Then, the electrode pads 12 of the semiconductor chip
A columnar connection terminal 2 made of a conductive layer 70
0 is erected. At the same time, columnar dummy terminals 50 made of a conductor layer 70 are erected on the surface 14 located between the electrode pads 12 of the semiconductor chip via an insulating layer 52. Then, the step c of the mounting method of the first semiconductor chip mounting structure of the present invention is performed.

Similarly, as shown in FIG. 4, an insulating layer 62 made of resin or the like is provided on the surface 34 of the mounting board on which the conductive pads 32 are formed, except for the center of the upper surface of the conductive pads 32 of the mounting board. Has formed. The insulating layer 62 is formed in a flat, substantially hemispherical shape by potting using a polyimide resin or the like on the surface 34 located between the conductor pads 32 of the mounting board. Then, the step d of the mounting method of the first semiconductor chip mounting structure of the present invention is performed.

Next, as shown in FIG. 4, a conductor layer 90 is formed to continuously cover the center of the upper surface of the insulating layer 62 and the conductor pad 32 formed on the surface 34 of the mounting board. The conductor layer 90 is formed from a metal layer such as a Ni layer, an Fe layer, or a Cu layer. In this case, the surface of the insulating layer 62 is subjected to a base treatment such as surface roughening, and the conductor layer 90 is adhered to the surface of the insulating layer 62 to be firmly joined. Note that the conductor layer 90 can also be formed using a conductor resin layer. Then, the step e of the method for mounting the first semiconductor chip mounting structure of the present invention is performed.

Next, in the above-mentioned conductor layer 90 covering the insulating layer 62 formed on the surface 34 of the mounting board, a narrow groove 92 which penetrates the conductor layer and reaches an intermediate portion of the insulating layer 62 immediately below the conductor layer 90 is formed with the conductor pad 32. It is engraved in a grid in a vertical and horizontal manner so as to surround it. The narrow groove 92 is formed in the conductor layer 90 using a slicer.
Is formed on the insulating layer 62 immediately below the conductor layer 90 by slicing, or is formed on the conductor layer 90 and the insulating layer 62 immediately below the conductor layer 90 by using a laser beam. The column-shaped connection terminals 40 made of the conductor layer 90 are provided upright at the center of the upper surface of the conductor pad 32 of the mounting board. At the same time, the surface 34 located between the conductor pads 32 of the mounting board
Further, a columnar dummy terminal 60 made of the above-mentioned conductor layer 90 is provided upright via an insulating layer 62. Then, the step f of the mounting method of the first semiconductor chip mounting structure of the present invention is performed.

Next, as shown in FIG. 1, the connection terminal 20 and the dummy terminal 50 on the semiconductor chip 10 are overlapped with the corresponding connection terminal 40 and the dummy terminal 60 on the mounting board 30 respectively. Then, the semiconductor chip 10 is mounted on the mounting substrate 30. Then, the g step of the mounting method of the first semiconductor chip mounting structure of the present invention is performed.

Thereafter, as shown in FIG. 1, the connection terminals 20 and the dummy terminals 50 on the semiconductor chip 10 are joined to the corresponding connection terminals 40 and the dummy terminals 60 on the mounting substrate 30 respectively. Corresponding connection terminal 2
When the conductor layers 70 and 90 are metal layers such as a Ni layer, an Fe layer, or a Cu layer, the connection terminals 20 and 4 are connected to each other.
After the surfaces of the dummy terminals 50 and 60 are subjected to the WET corrosion treatment, the corresponding connection terminals 20 and 40 and the dummy terminals 50 and 60 are brought into pressure contact with each other and joined by a metal diffusion reaction based on a reduction treatment. ing. On the other hand,
When the conductor layers 70 and 90 are conductor resin layers or the like, the corresponding connection terminals 20 and 40 and the dummy terminals 50 and 60
These are joined to each other using a conductive adhesive. Then, the step h of the mounting method of the first semiconductor chip mounting structure of the present invention is performed. Then, the semiconductor chip 10 is surface-mounted on the mounting substrate 30.

The method of mounting the first semiconductor chip shown in FIGS. 1 to 5 comprises the above steps. In the method of mounting the first semiconductor chip, in the steps a to c, the electrodes of the semiconductor chip are formed. At the center of the upper surface of the pad 12, a columnar connection terminal 20 made of the conductor layer 70 can be erected. At the same time, the columnar dummy terminal 50 made of the conductor layer 70 can be provided upright on the surface 14 located between the electrode pads 12 of the semiconductor chip via the insulating layer 52. Similarly, in the steps d to f, a columnar connection terminal 40 made of the conductor layer 90 can be provided upright at the center of the upper surface of the conductor pad 32 of the mounting board. At the same time, the columnar dummy terminal 60 made of the conductor layer 90 is provided on the surface 34 between the conductor pads 32 of the mounting board.
Can be erected through the insulating layer 62. Then, g to h
In the process, the connection terminals 20 on the semiconductor chip 10 side are joined to the corresponding connection terminals 40 on the mounting substrate 30 side, and the dummy terminals 50 on the semiconductor chip 10 side are joined to the corresponding dummy terminals 60 on the mounting substrate 30 side. You can do it. At the same time, the semiconductor chip 10 is mounted on the mounting substrate 30 via the dummy terminals 50 and 60 and the insulating layers 52 and 62.
Can be firmly joined. Then, the semiconductor chip 10 can be surface-mounted on the mounting substrate 30.

FIG. 6 shows a preferred embodiment of the mounting structure of the second semiconductor chip of the present invention, and FIG. 6 is an explanatory view of the structure. Hereinafter, the mounting structure of the second semiconductor chip will be described.

In the mounting structure of the second semiconductor chip shown in FIG.
The connection terminals 20 made of solder formed on the electrode pads 12 of the semiconductor chip 10 are connected to the corresponding mounting substrates 30.
Are soldered in such a manner as to be superimposed on the connection terminals 40 made of solder formed on the conductor pads 32 of the first embodiment.

The above structure is the same as that of the conventional semiconductor chip mounting structure. However, the second semiconductor chip mounting structure shown in FIG.
The electrode pad 12 of the semiconductor chip is
A substantially semi-spherical dummy terminal 50 made of a solder having a length equal to or shorter than the connection terminal 20 formed on the insulating layer 52 is formed via an insulating layer 52. Similarly, a substantially hemispherical dummy terminal 60 made of solder having a length equal to or shorter than the connection terminal 40 formed on the conductor pad 32 of the mounting board is also provided on the surface 34 located between the conductor pads 32 of the mounting board.
Are formed via an insulating layer 62.

An underfill material 1 made of resin or the like is provided between the semiconductor chip 10 and the mounting substrate 30 opposed thereto.
40 are filled. The semiconductor chip 10 is firmly joined to the mounting substrate 30 via the underfill material 140. Then, the semiconductor chip 10 is surface-mounted on the mounting substrate 30.

The mounting structure of the second semiconductor chip shown in FIG. 6 is configured as described above. In the mounting structure of the second semiconductor chip, the structure between the semiconductor chip 10 and the mounting substrate 30 is provided. Filled underfill material 140
Can be spread around the peripheral surfaces of the dummy terminals 50 and 60 formed on the semiconductor chip 10 side and the mounting substrate 30 side, so that the bonding area of the underfill material 140 can be increased. And, the underfill material 1 having an increased joint area
The semiconductor chip 10 can be firmly joined to the mounting substrate 30 through the connection 40. Also, the semiconductor chip 10 side and the mounting substrate 3
Due to the dummy terminals 50 and 60 interposed between the connection terminals 20 and 40 formed on the 0 side, the amount of the underfill material 140 made of resin or the like having a high dielectric constant filled between the connection terminals 20 and 40 is reduced. Thus, the parasitic capacitance between the connection terminals 20 and 40 on the semiconductor chip 10 side and the mounting substrate 30 side can be reduced.

The dummy terminals 50 and 60 are connected to the insulating layer 5
The semiconductor chip 10 and the mounting substrate 30 are formed on the surface 14 located between the electrode pads 12 of the semiconductor chip and the surface 34 located between the conductor pads 32 of the mounting substrate via the semiconductor chips 2 and 62. Even when the corresponding dummy terminals 50 and 60 are soldered to each other, the internal circuit 16 of the semiconductor chip and the wiring circuit 36 of the mounting board are passed through the dummy terminals 50 and 60 soldered to each other. The transmission of a noise signal can be prevented.

Next, a preferred embodiment of the second semiconductor chip mounting method of the present invention, which is the second semiconductor chip mounting method, will be described.

As shown in FIG. 7, the electrode pad 1 is formed in the same manner as in the step a of the first semiconductor chip mounting method.
An insulating layer 52 made of a polyimide resin or the like is formed on the surface 14 of the semiconductor chip on which the electrodes 2 are formed, except for the center of the upper surface of the electrode pad 12 of the semiconductor chip by potting or the like. Then, the step a of the second semiconductor chip mounting method of the present invention is performed.

Next, as shown in FIG. 7, in the same manner as in the step b of the above-described first semiconductor chip mounting method,
The solder layer 7 that continuously covers the central portion of the upper surface of the insulating layer 14 and the electrode pad 12 formed on the surface 14 of the semiconductor chip.
4 are formed. The solder layer 74 is continuously formed on the upper surface of the insulating layer 52 and the center of the upper surface of the electrode pad 12 by coating or plating. Then, step b of the second semiconductor chip mounting method of the present invention is performed.

Next, as shown in FIG.
The solder layer 74 covering the insulating layer 52 formed on the surface 14 of the semiconductor chip is provided on the solder layer 74 that penetrates the solder layer and is directly under the solder layer 74 in the same manner as in the step c of the mounting structure of the semiconductor chip.
2. The narrow groove 72 reaching the middle part is engraved in a series of rows and columns so as to surround the electrode pad 12. And
At the center of the upper surface of the electrode pad 12 of the semiconductor chip, a columnar connection terminal 20 made of a solder layer 74 is provided upright. At the same time, a dummy terminal 50 made of a solder layer 74 is provided upright on the surface 14 located between the electrode pads 12 of the semiconductor chip via an insulating layer 52. Then, the step c of the second semiconductor chip mounting method of the present invention is performed.

Next, as shown in FIG. 9, the semiconductor chip 10 on which the columnar connection terminals 20 and the dummy terminals 50 are erected is preheated. Then, the connection terminals 20 and the dummy terminals 50 formed of the solder layer 74 on the semiconductor chip 10 side are formed in a substantially hemispherical shape. Then, the step d of the second semiconductor chip mounting method of the present invention is performed.

Similarly, as shown in FIG. 10, the surface 34 of the mounting board on which the conductor pads 32 are formed is
An insulating layer 62 made of a polyimide resin or the like is formed by potting or the like except for the center of the upper surface of the conductor pad 32 of the mounting board. Then, the step e of the second semiconductor chip mounting method of the present invention is performed.

Next, as shown in FIG. 10, the insulating layer 62 and the conductive pad 32 formed on the surface 34 of the mounting board are formed in the same manner as in the step e of the first semiconductor chip mounting method described above. Solder layer 9 that continuously covers the center of the upper surface
4 are formed. The solder layer 94 is continuously formed on the upper surface of the insulating layer 62 and the center of the upper surface of the conductive pad 32 by coating or plating. Then, the step f of the second semiconductor chip mounting method of the present invention is performed.

Next, as shown in FIG. 11, the solder layer 94 covering the insulating layer 62 formed on the surface 34 of the mounting board is formed in the same manner as in the step f of the first semiconductor chip mounting method described above. An insulating layer 62 penetrating the solder layer and immediately below the solder layer.
The narrow groove 92 reaching the middle part is engraved in a vertical and horizontal lattice so as to surround the conductor pad 32. Narrow groove 92
Is formed by slicing a series of slicing on the solder layer 94 and the insulating layer 62 immediately below the solder layer 94 using a slicer, or using a laser beam to form the solder layer 94 and the insulating layer 62
Or engraved in a series. Then, a columnar connection terminal 40 made of a solder layer 94 is erected at the center of the upper surface of the conductor pad 32 of the mounting board. At the same time, the solder layer 94 is provided on the surface 34 of the mounting board between the conductive pads 32.
The pillar-shaped dummy terminal 60 made of is formed upright with an insulating layer 62 interposed therebetween. Then, the g step of the second semiconductor chip mounting method of the present invention is performed.

Next, as shown in FIG. 12, the mounting substrate 30 on which the columnar connection terminals 40 and the dummy terminals 60 are erected is preheated. Then, the mounting substrate 30
The connection terminals 40 and the dummy terminals 60 made of the solder layer 94 on the side are formed substantially hemispherically. Then, step h of the second semiconductor chip mounting method of the present invention is performed.

Next, as shown in FIG. 13, the connection terminals 20 on the semiconductor chip 10 are superimposed on the corresponding connection terminals 40 on the mounting substrate 30. Then, the semiconductor chip 10 is mounted on the mounting substrate 30. Then, the i-step of the second semiconductor chip mounting method of the present invention is performed.

Next, the mounting substrate 30 on which the semiconductor chip 10 is mounted is placed in a reflow furnace or the like and heated. Then, as shown in FIG. 6, the connection terminals 20 made of solder on the side of the semiconductor chip 10 are connected to the corresponding mounting substrates 30.
The connection terminal 20 made of solder on the side
40 are melted and soldered. Then, the step j of the second semiconductor chip mounting method of the present invention is performed.

Thereafter, as shown in FIG. 6, the underfill material 140 is provided between the mounting substrate 30 and the semiconductor chip 10 to which the corresponding connection terminals 20 and 40 are soldered.
Is filled. And the underfill material 140
The semiconductor chip 10 is firmly joined to the mounting substrate 30 through the intermediary of the semiconductor chip 10. Then, the k step of the second semiconductor chip mounting method of the present invention is performed. And the semiconductor chip 1
0 is surface-mounted on the mounting board 30.

The mounting method of the second semiconductor chip shown in FIGS. 6 to 13 comprises the above steps. In the second mounting method of the semiconductor chip, the electrodes of the semiconductor chip are used in the steps a to d. In the center of the upper surface of the pad 12,
A substantially hemispherical connection terminal 20 made of solder can be formed. At the same time, on the surface 14 located between the electrode pads 12 of the semiconductor chip, a substantially hemispherical dummy terminal 50 made of solder and having a length equal to or shorter than the connection terminal 20 is insulated. It can be formed through the layer 52. Similarly, in the steps e to h, a substantially hemispherical connection terminal 40 made of solder can be formed at the center of the upper surface of the conductor pad 32 of the mounting board. At the same time, on the surface 34 located between the conductor pads 32 of the mounting board, a substantially hemispherical dummy terminal 60 made of solder and having a length equal to or shorter than the connection terminal 40 is used.
Can be formed via the insulating layer 62. Then i-j
In the process, the connection terminals 20 on the semiconductor chip 10 side can be soldered to the corresponding connection terminals 40 on the mounting substrate 30 side. After that, in the k step, the underfill material 140 filled between the semiconductor chip 10 and the mounting substrate 30 is widely wrapped around the peripheral surfaces of the dummy terminals 50 and 60 formed on the semiconductor chip 10 and the mounting substrate 30 side. ,
Through the underfill material 140, the semiconductor chip 1
0 can be firmly joined to the mounting substrate 30. Then, the semiconductor chip 10 can be surface-mounted on the mounting substrate 30.

In this second semiconductor chip mounting method, the connection terminals 20 on the semiconductor chip 10 side are connected to the mounting substrate 3
When soldering to the connection terminal 40 on the 0 side, the dummy terminal 50 made of solder formed on the semiconductor chip 10 side is used.
May be simultaneously soldered to the dummy terminal 60 made of solder formed on the mounting board 30 side near it, or may not be soldered. However, semiconductor chip 1
Dummy terminals 50 and 6 formed on the 0 side and the mounting substrate 30 side.
0 is shorter than the connection terminals 50 and 60 on the semiconductor chip 10 side and the mounting substrate 30 side, and the dummy terminals 50 and 60 are generally not soldered to each other. The reason is,
For example, the pitch of a large number of electrode pads 12 and conductor pads 32 lined up with the recent highly integrated semiconductor chip 10 and the mounting board 30 on which the chip is mounted is 250 μm, and the electrode pad 12 of the semiconductor chip and the mounting board 30 Conductor pad 3
2 has a diameter of 120 μm. Therefore, the space between the electrode pads 12 of the semiconductor chip and the space between the conductor pads 32 of the mounting board is 130
A dummy terminal 5 is formed on the surface 14 of the semiconductor chip located between the electrode pads 12 and the surface 34 of the mounting substrate located between the conductor pads 32.
The diameters of 0 and 60 are about 40 μm. On the other hand, the diameter of the connection terminals 20 and 40 formed at the center of the upper surface of the electrode pad 12 of the semiconductor chip and the center of the upper surface of the conductor pad 32 of the mounting board is about 100 μm. Therefore, in step c of the above-described second semiconductor chip mounting method,
The volume of the columnar connection terminal 20 made of the solder layer 74 erected at the center of the upper surface of the electrode pad 12 of the semiconductor chip is:
The volume is several times the volume of the columnar dummy terminal 50 made of the solder layer 74 erected on the surface 14 located between the electrode pads 12 of the semiconductor chip. Similarly, in the step g of the above-described second semiconductor chip mounting method, the volume of the columnar connection terminal 40 made of the solder layer 94 erected at the center of the upper surface of the conductive pad 32 of the mounting board is equal to the mounting board. Conductor pad 3
It is several times the volume of the columnar dummy terminal 60 made of the solder layer 94 erected on the surface 34 located between the two. As a result, in the d and h steps of the above-described second semiconductor chip mounting method, the substantially semi-spherical dummy terminals 50 formed by heating the columnar dummy terminals 50 and 60 made of the solder layers 74 and 94, This is because the length of the connection terminals 20 and 40 formed by heating the pillar-shaped connection terminals 20 and 40 made of the solder layers 74 and 94 is generally lower than the height of the connection terminals 20 and 40 that are substantially hemispherical.

In the above-described second semiconductor chip mounting structure and the above-described second semiconductor chip mounting method, the corresponding dummy terminals 50 and 60 are not disposed so as to face each other. The semiconductor chip 10
It may be formed on the side and the mounting substrate 30 side. Also in this case, it is possible to provide a mounting structure of the second semiconductor chip and a mounting method of the second semiconductor chip having the same operation and effect as described above.

[0051]

As described above, according to the first semiconductor chip mounting structure of the present invention, the semiconductor chip can be firmly joined to the mounting substrate via the dummy terminals. Then, an underfill material is filled between the semiconductor chip and the mounting substrate, so that it is not necessary to join the semiconductor chip to the mounting substrate via the underfill material. In addition, it is possible to reduce the parasitic capacitance between the connection terminals in a state where air having a low dielectric constant is interposed between the connection terminals on the semiconductor chip side and the mounting substrate side without an underfill material having a high dielectric constant. Then, the high-frequency characteristics of the high-frequency signal transmitted through the connection terminals on the semiconductor chip side and the mounting substrate side can be improved.

According to the first method for mounting a semiconductor chip of the present invention, the mounting structure of the first semiconductor chip of the present invention can be easily and accurately applied using conventional general-purpose techniques without much trouble. Can be formed.

According to the mounting structure of the second semiconductor chip of the present invention, the underfill material filled between the semiconductor chip and the mounting substrate is provided on the peripheral surface of the dummy terminal formed on the semiconductor chip side or the mounting substrate side. The underfill material can be widened to increase the bonding area of the underfill material. Then, the semiconductor chip can be firmly joined to the mounting substrate via the underfill material. Further, the dummy terminals can be buried in the underfill material filled between the connection terminals formed on the semiconductor chip side and the mounting substrate side. Then, the volume of the dummy terminal and the apparent dielectric constant of the high dielectric underfill material filled between the connection terminals on the semiconductor chip side and the mounting substrate side can be reduced. Then, the parasitic capacitance between the connection terminals on the semiconductor chip side and the mounting substrate side can be reduced. Then, the high-frequency characteristics of the high-frequency signal transmitted through the connection terminals on the semiconductor chip side and the mounting substrate side can be improved.

According to the second method of mounting a semiconductor chip of the present invention, the mounting structure of the second semiconductor chip of the present invention can be easily and accurately applied without using a great deal of trouble by using a conventional general-purpose technique. Can be formed.

[Brief description of the drawings]

FIG. 1 is a structural explanatory view of a mounting structure of a first semiconductor chip of the present invention.

FIG. 2 is a process explanatory view of the first semiconductor chip mounting method of the present invention.

FIG. 3 is a process explanatory view of the first semiconductor chip mounting method of the present invention.

FIG. 4 is a process explanatory view of the first semiconductor chip mounting method of the present invention.

FIG. 5 is a process explanatory view of the first semiconductor chip mounting method of the present invention.

FIG. 6 is a structural explanatory view of a mounting structure of a second semiconductor chip of the present invention.

FIG. 7 is a process explanatory view of the second semiconductor chip mounting method of the present invention.

FIG. 8 is a process explanatory view of the second semiconductor chip mounting method of the present invention.

FIG. 9 is a process explanatory view of the second semiconductor chip mounting method of the present invention.

FIG. 10 is a process explanatory view of the second semiconductor chip mounting method of the present invention.

FIG. 11 is a process explanatory view of the second semiconductor chip mounting method of the present invention.

FIG. 12 is a process explanatory view of the second semiconductor chip mounting method of the present invention.

FIG. 13 is a process explanatory view of the second semiconductor chip mounting method of the present invention.

[Explanation of symbols]

 Reference Signs List 10 semiconductor chip 12 electrode pad 14 surface of semiconductor chip on which electrode pad is formed 16 internal circuit of semiconductor chip 20, 40 connection terminal 30 mounting substrate 32 conductive pad 34 surface of mounting substrate on which conductive pad is formed 36 wiring of mounting substrate Circuit 50, 60 Dummy terminal 52, 62 Insulating layer 70 Conductive layer 72 Narrow groove 74 Solder layer 90 Conductive layer 92 Narrow groove 94 Solder layer

Claims (5)

[Claims] A connection terminal erected on an electrode pad of a semiconductor chip and a connection terminal erected on a corresponding conductor pad of a mounting board are joined to each other, and are connected to a surface located between the electrode pads of the semiconductor chip. A semiconductor chip mounting structure in which dummy terminals erected via an insulating layer and dummy terminals erected via an insulating layer on a surface located between the corresponding conductive pads of the mounting board corresponding to the dummy terminals are joined. 2. A method for mounting a semiconductor chip, comprising the following steps. a. Forming an insulating layer on the surface of the semiconductor chip on which the electrode pads are formed, except for a central portion of the upper surface of the electrode pads; b. Forming a conductive layer continuously covering an insulating layer formed on the surface of the semiconductor chip and a central portion of an upper surface of the electrode pad; c. In the conductor layer covering the insulation layer formed on the surface of the semiconductor chip, a narrow groove penetrating the conductor layer and reaching the insulation layer immediately thereunder is engraved in a series so as to surround the electrode pad, and Erecting column-shaped connection terminals made of the conductor layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the conductor layer on the surface located between the electrode pads of the semiconductor chip via the insulating layer; . d. A step of forming an insulating layer on the surface of the mounting board on which the conductive pads are formed, except for a central portion of the upper surface of the conductive pads; e. Forming an insulating layer formed on the surface of the mounting board and a conductor layer that continuously covers the center of the upper surface of the conductor pad; f. On the conductor layer covering the insulation layer formed on the surface of the mounting substrate, a narrow groove penetrating the conductor layer and reaching the insulation layer immediately below the conductor layer is engraved in a series so as to surround the conductor pad, and Erecting column-shaped connection terminals made of the conductor layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the conductor layer via the insulating layer on a surface located between the conductor pads of the mounting board; . g. A step of superposing the connection terminal and the dummy terminal erected on the semiconductor chip side on the corresponding connection terminal and the dummy terminal erected on the mounting substrate side, and mounting the semiconductor chip on the mounting substrate. h. Bonding the connection terminal and the dummy terminal erected on the semiconductor chip side to the corresponding connection terminal and dummy terminal erected on the mounting substrate side. 3. A metal diffusion reaction based on a reduction treatment of corresponding connection terminals and dummy terminals in a step h, wherein the conductor layer formed in the steps b and e is a metal layer such as a Ni layer, an Fe layer or a Cu layer. The method for mounting a semiconductor chip according to claim 2, wherein the bonding is performed by a bonding method. 4. A connection terminal made of a solder formed on an electrode pad of a semiconductor chip and a connection terminal made of a solder erected on a corresponding conductor pad of a mounting board are soldered to the electrode pad of the semiconductor chip. Dummy terminals made of solder are respectively formed on the surface located between and the surface located between the conductor pads of the mounting board via an insulating layer, and an underfill material is filled between the semiconductor chip and the mounting board. And a semiconductor chip mounting structure in which the semiconductor chip and the mounting substrate are joined via the underfill material. 5. A method for mounting a semiconductor chip, comprising the following steps. a. Forming an insulating layer on the surface of the semiconductor chip on which the electrode pads are formed, except for a central portion of the upper surface of the electrode pads; b. Forming an insulating layer formed on the surface of the semiconductor chip and a solder layer that continuously covers a central portion of the upper surface of the electrode pad; c. In the solder layer covering the insulating layer formed on the surface of the semiconductor chip, a narrow groove penetrating the solder layer and reaching the insulating layer immediately thereunder is engraved in a series so as to surround the electrode pad. Erecting column-shaped connection terminals made of the solder layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the solder layer on the surface located between the electrode pads of the semiconductor chip via the insulating layer; . d. A step of preheating the semiconductor chip on which the columnar connection terminals and the dummy terminals are erected to form the connection terminals and the dummy terminals made of the solder layer into a substantially hemispherical shape. e. A step of forming an insulating layer on the surface of the mounting board on which the conductive pads are formed, except for a central portion of the upper surface of the conductive pads; f. Forming a solder layer that continuously covers the insulating layer formed on the surface of the mounting board and the center of the upper surface of the conductive pad; g. On the solder layer covering the insulating layer formed on the surface of the mounting board, a narrow groove penetrating the solder layer and reaching the insulating layer immediately below the solder layer is engraved in a series so as to surround the conductive pad, and Erecting column-shaped connection terminals made of the solder layer in the center of the upper surface, and erecting column-shaped dummy terminals made of the solder layer on the surface located between the conductor pads of the mounting board via the insulating layer; . h. A step of preheating the mounting substrate on which the columnar connection terminals and the dummy terminals are erected, and forming the connection terminals and the dummy terminals formed of the solder layer in a substantially hemispherical shape. i. Superposing the substantially hemispherical connection terminals formed on the semiconductor chip side with the corresponding substantially hemispherical connection terminals formed on the mounting substrate side, and mounting the semiconductor chip on the mounting substrate. j. Heating the mounting substrate on which the semiconductor chip is mounted,
A step of melting and soldering the connection terminals on the semiconductor chip side and the corresponding connection terminals on the mounting board side; k. A step of filling an underfill material between the semiconductor chip to which the corresponding connection terminals are soldered and the mounting substrate, and joining the semiconductor chip to the mounting substrate via the underfill material.