JP2000223772A - Manufacture of optical semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a technique for depositing a semiconductor layer of high quality with excellent reproducibility on a diffraction grating part array, and enable to array a coolerless DFB semiconductor lasers which are different in oscillation wavelength and operated at a high temperature. SOLUTION: A semiconductor layer 2 is deposited on a substrate 1. A diffraction grating part of a plurality of stripes is formed in a local part of the semiconductor layer 2. A spacer layer 3 which fills the diffraction grating part and covers the layer 2 is deposited at a growth temperature of 470 deg.C, and continuously deposited at 470-630 deg.C. In the first deposition of the spacer layer 3, an MOVPE method, wherein In material is organic metal, P material is PH3 or organic P, and the carrier gas is H2, is applied and executed under the condition that the growth speed in the diffraction grating part of the semiconductor layer 2 is DRg (μm/h), the flow rate ratio of the P material to the total flow rate of the carrier gas H2 is FR(%), and a relation of log10FR>=4.4DRg-1.3 is satisfied.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distributed feedback type in which a diffraction grating is used as one of elements.
The present invention relates to a method suitable for manufacturing an optical semiconductor device such as a semiconductor laser (ed feedback (DFB)).

[0002]

2. Description of the Related Art Normally, a DFB semiconductor laser operates during operation.
Cooling is performed using a Peltier element to increase the temperature, but a coolerless DFB semiconductor laser that operates at a high temperature is expected to reduce the cost.

For this purpose, it is necessary to increase the coupling efficiency between the light and the diffraction grating to reduce the operating current.
To increase the coupling efficiency, it is basically necessary to increase the depth of the diffraction grating.

However, a diffraction grating formed on an InP substrate has a good InGaAsP on a deep diffraction grating.
It is difficult to grow crystals, and therefore, coolerless D
It is extremely difficult to realize an FB semiconductor laser.

However, according to the prior art developed by the present applicant, even if the diffraction grating is relatively deep, the InG
It has been shown that the growth of aAsP crystal is easy (refer to Japanese Patent Application No. 10-130771 if necessary).

FIG. 3 is a sectional side view (longitudinal section) of a main part showing a DFB semiconductor laser for explaining the prior art.

In the drawing, 1 is an n-InP substrate, 2 is n
-InGaAsP diffraction grating semiconductor layer, 2G is n-In
GaAsP diffraction grating (grating), 3 is n-In
The P spacer layer 4 is an n-side SCH made of InGaAsP.
(Separate definition het
5 is InGaAsPM.
QW (multiple quantum well)
s) The active layer 6 is a p-side SCH made of InGaAsP.
Layer, 7 is a p-InP cladding layer, 8 is p-InGaAs
P cap layer, 9 is a p-InP cover layer, d _g is the thickness of the semiconductor layer for diffraction grating 2, d _s is the thickness of the spacer layer 3, and the temperature described on the left side of the figure is an arrow. Is the growth temperature when the crystal in the range indicated by is grown.
Note that the n-InGaAsP diffraction grating 2G shown in the figure may be considered to form a part of one diffraction grating portion.

When forming the buried n-InGaAsP diffraction grating portion, first, in order to prevent thermal deformation of the n-InGaAsP diffraction grating 2G, the n-InGaAsP diffraction grating 2G is first coated by low-temperature InP growth at 500 ° C. or less. Thereafter, the MQW active layer 5 is grown by raising the temperature to a normal growth temperature, that is, a level of about 600 ° C.

The crystallinity of the MQW active layer 5 laminated on the buried n-InGaAsP diffraction grating part strongly depends on the growth rate during low-temperature InP growth and the partial pressure of the group V source material.

FIG. 4 shows that IP is grown by InP growth at a temperature of 470 ° C.
InGaAs is embedded under the nGaAsP diffraction grating.
FIG. 3 is a diagram showing crystallinity mapping when an sPMQW active layer is grown, and the horizontal axis indicates a low-temperature InP growth rate = DR
[Μm / h], and the vertical axis represents the flow rate ratio of PH _{3 to} the total flow rate of H _{2 as} the carrier gas, ie, PH ₃ /
H ₂ = FR [%] is taken.

In this case, the growth of the InGaAs PMQW active layer is performed by metal organic vapor deposition (metalorganic).
vapor phase epitaxy: MOVP
E) method, and the raw material is trimethylindium (T
MIn: In (CH ₃ ) ₃ ) and triethylgallium (T
EGa: Ga (C ₂ H ₅ ) ₃ ) and phosphine (PH ₃ )
And arsine (AsH ₃ ).

Numerical values shown in FIG. 4 indicate photoluminescence (PL) intensity as a voltage value, and ○ and × indicate P values.
The crystallinity of the InGaAs PMQW active layer determined from L intensity and surface morphology,
○ indicates good, and × indicates bad.

The growth rate of low-temperature InP growth on a flat substrate having a plane index of (100) is DR [μm /
h], assuming that the flow rate ratio of PH _{3 to} the total flow rate of the H ₂ carrier gas is FR [%], the following expression is satisfied: log ₁₀ FR ≧ 4.4 DR-1.3 (1) If the InGaAsP diffraction grating part is buried with InP, InGaAs grown on it
The PMQW active layer is said to be good, and good crystals are generally obtained under the conditions of low growth rate and high PH ₃ supply.

In recent years, wavelength division multiplexing (wave)
length divisionomultiplexi
(ng: WDM) As a communication light source, there is a demand for the development of an integrated growth technique for arraying semiconductor lasers having different oscillation wavelengths.

As means for realizing this, in addition to an integrated growth technique using a selective growth method, diffraction grating portions having different periods are arranged in an array on a flat substrate.
(Referred to as a diffraction grating array).

FIG. 5 and FIG. 6 are explanatory views of a principal part showing a diffraction grating array. In each of FIGS.
(B) represents a cross section taken along line XX seen in (A). Incidentally, FIG. 3 shows a vertical cross section taken along line YY shown in FIG. 5 or FIG.

The difference between the diffraction grating array shown in FIG. 5 and the diffraction grating array shown in FIG. 6 is that the diffraction grating is concave, that is, the diffraction grating semiconductor layer exists around the diffraction grating. Or the diffraction grating portion has a convex shape, that is, a configuration in which the diffraction grating semiconductor layer is removed from the periphery of the diffraction grating portion.

In the figure, 11 is an InP substrate having a plane index of (100), 12 is a semiconductor layer for InGaAsP diffraction grating, 12A ₁ , 12A ₂ , 12A ₃ , 12A ₄ are diffraction grating portions, 12B is a flat portion, W ₁ represents the diffraction grating portion in the width, W ₂ is the pitch of the diffraction grating portion, respectively. The semiconductor layer 12 for InGaAsP diffraction grating is exposed as the flat portion 12B in FIG. 5, and the InP substrate 11 is exposed as the flat portion 12B in FIG.

As an example, the width W ₁ of the diffraction grating portion is 20
[Μm], the pitch W ₂ of the diffraction grating portion is 300 [μm], the period of in the diffraction grating in the diffraction grating section 12A ₁ is P
_1, the period is the period of in the diffraction grating P _2, the diffraction grating portion 12A ₃ of in the diffraction grating in the diffraction grating section 12A ₂ is P
_3, the period of in the diffraction grating in the diffraction grating section 12A ₄ is P ₄
A In this case, the period P ₁ to period P ₄ are assumed to be different.

Here, the InGaAsP diffraction grating is made of InP.
When formed on the entire surface of the substrate 11, the formula (1)
Is applied, the InGaAsP diffraction grating is changed to In
When embedded with P, the crystallinity of the MQW active layer formed thereon becomes good, but as shown in the figure, in the case of the diffraction grating array, it is necessary to obtain a good crystal. It is necessary to find an embedding condition for the InGaAsP diffraction grating portion, and therefore, an equation different from the equation (1).

According to the experiment, the condition that a good crystal was obtained by the entire diffraction grating described with reference to FIG. 4, that is, the growth rate was 0.2 [μm / h] and the PH ₃ / H ₂ flow ratio was 2.4. [%]
Under the following conditions, the InGaAsP diffraction grating array
When buried with low temperature growth InP of [° C.], stacking faults occurred, and the MQW active layer could not be stacked well.

[0022]

SUMMARY OF THE INVENTION The present invention realizes a technique for depositing a high-quality semiconductor layer on a diffraction grating array with good reproducibility, and operates a coolerless DFB semiconductor having a different oscillation wavelength and operating at a high temperature. Make lasers arrayable.

[0023]

As described above, (1)
00) In the case of an InGaAsP diffraction grating formed on the entire surface of an InP substrate, the growth rate during low-temperature InP growth in which it is embedded is the same as the growth rate on a (100) flat substrate at all points in the substrate plane.

On the other hand, the partially formed InGa
In the case of the AsP diffraction grating portion, it is considered that the growth rate in the diffraction grating portion (see FIGS. 5 and 6) increases.

FIG. 1 is a cutaway side view of an essential part showing an optical semiconductor device at a key point in a process for explaining the principle of the present invention.

In the figure, 21 is the I of the plane index (100).
The nP substrate, 22 indicates a semiconductor layer for an InGaAsP diffraction grating having a plane index (100), 22A indicates a diffraction grating portion, and 22B indicates a flat portion.

At the time of low-temperature InP growth, the diffraction grating portion 22A formed by cutting the diffraction grating in the diffraction grating semiconductor layer 22 has a higher rate of taking in the growth raw material than the (100) flat portion 22B. It is considered that the growth rate of the diffraction grating portion 22A is increased by diffusing from the flat portion 22B to the diffraction grating portion 22A.

However, when the diffraction grating portion 22A is buried and flattened, the growth material is not diffused from the flat portion 22B, and the growth rate is reduced to the flat portion 22B and the diffraction grating portion 22A.
Will be the same.

The rate of increase in the growth rate of the diffraction grating portion 22A at the beginning of the buried growth depends on the in-plane coverage of the diffraction grating portion 22A, but is about A times or more (A = 2 to 3).

When the growth rate of the diffraction grating portion 22A at the time of low-temperature growth is higher than the critical growth speed at which the crystallinity is deteriorated, a defect occurs in the diffraction grating portion 22A, and the epitaxial growth layer grown on the diffraction grating portion 22A grows. Decreases crystallinity.

Therefore, in order to deposit a good semiconductor layer on the substrate having the InGaAsP diffraction grating array, the flow rate ratio of the P source to the total flow rate of the H ₂ carrier gas must be FR.
[%], The growth rate DR _g [μm / h] of the diffraction grating portion 22A during low-temperature InP growth (“ _g ” is gr
As a result of the experiment, it was obtained that the growth conditions should be set so as to satisfy log ₁₀ FR ≧ 4.4 DR _g −1.3 (2).

Further, regardless of the equation (2), the growth rate DR in the (100) flat portion 22B during low-temperature InP growth.
_f [μm / h] (“ _f ” stands for “flat”) is reduced to 1 / A or less of the critical growth rate DR _c defined by log ₁₀ FR ≧ 4.4 DR _c −1.3 (3) May be set.

FIG. 2 is a diagram showing crystallinity mapping for explaining the principle of the present invention.
The case where an InGaAsPMQW active layer is grown on a base in which an InGaAsP diffraction grating portion is buried by [P] InP growth is shown, and the horizontal axis represents a low temperature InP growth rate = DR [μm /
h], and the vertical axis represents the flow rate ratio of PH _{3 to} the total flow rate of H _{2 as} the carrier gas, that is, PH ₃ / H ₂ = F
R [%] is each taken. The broken line in FIG. 2 is a line corresponding to the above-described equation in the prior art, that is, log ₁₀ FR ≧ 4.4 DR _f −1.3 (1). The area on the left corresponds to the range of growth conditions where good results can be obtained by applying the prior art.

Now, the result obtained from equation (3) is applied to FIG. 2, and the condition that satisfies the following condition: log ₁₀ FR ≧ 4.4 A · DR _f −1.3 (A = 2−3) (4) And the diffraction grating array is low-temperature InP
Good results can be obtained by embedding with growth.

The value of equation (4) may slightly change depending on the growth temperature of the low-temperature InP growth and the type of the P raw material, so that the growth rate of the low-temperature InP growth is 0.1 [μm /
h].

In any case, according to the experimental results, in the range defined by the equation (4), that is, in the range given by the sand pattern in FIG. It has been confirmed that the best results can be obtained for the entire diffraction grating and any other diffraction grating.

As described above, in the method for manufacturing an optical semiconductor device according to the present invention, (1) an InP substrate having a plane index of (100) (for example, n
A step of depositing a semiconductor layer for a diffraction grating (for example, a semiconductor layer for diffraction grating 2: see FIG. 3) made of a Group III-V compound semiconductor having a different refractive index from InP on an InP substrate 1: see FIG. Then, the diffraction grating is cut locally at the semiconductor layer for diffraction grating to form a plurality of diffraction grating portions (for example, the diffraction grating portion 12).
Such as _{A 1, 12A 2, 12A 3} , 12A 4: forming a see FIG. 5 or FIG. 6), then, consists of InP covering the semiconductor layer for the diffraction grating is buried diffraction grating portion of the plurality number Article Depositing a first layer (eg, spacer layer 3 grown at a temperature of 470 ° C .; see FIG. 3), and then increasing the substrate temperature compared to when depositing the first layer. Depositing a second layer of InP (for example, a spacer layer 3 grown at a temperature of 470 ° C.-630 ° C.) on one layer, and depositing the first layer Inorganic metal vapor phase epitaxy is used in which the source material of In is organometallic, the source material of P is PH ₃ or organic P, and the carrier gas is H ₂ , and at the diffraction grating portion of the semiconductor layer for the diffraction grating. DR _g [μm / h]
The ratio of the flow rate of the P raw material to the total flow rate of gas H ₂ is FR [%].
Wherein the following conditions are satisfied: log ₁₀ FR ≧ 4.4 DR _g −1.3, or

(2) a step of depositing a semiconductor layer for a diffraction grating made of a group III-V compound semiconductor having a different refractive index from InP on an InP substrate having a plane index of (100); Forming a plurality of diffraction grating portions by cutting a diffraction grating locally in the semiconductor layer for forming, and then forming a first plurality of InPs for embedding the plurality of diffraction grating portions and covering the semiconductor layer for diffraction grating. Depositing a layer, and then depositing a second layer of InP on the first layer at a higher substrate temperature than when depositing the first layer, In the step of depositing the first layer, a metal organic vapor phase epitaxy method in which the source material of In is an organic metal, the source material of P is PH ₃ or organic P, and the carrier gas is H ₂ ,
In addition, the growth rate in a flat portion having a plane index of (100) other than the diffraction grating portion of the semiconductor layer for diffraction grating is DR _f [μm
/ H], and when the flow rate ratio of the P raw material to the total flow rate of the carrier gas H ₂ is FR [%], log ₁₀ FR ≧ 4.4 A · DR _f −1.3 (A = 2
3) is carried out under the conditions of, or

(3) In the above (2), the growth rate DR
_{f is set} to 0.1 [μm / h] or less.

By adopting the above means, regardless of the diffraction grating array or the entire diffraction grating, it is possible to satisfactorily embed even if the diffraction gratings are formed deeply in order to increase the coupling efficiency with light. Therefore, the semiconductor crystal grown thereon can be of high quality, and the coolerless D
Good results can be obtained when an FB semiconductor laser is arrayed to realize a light source for WDM.

[0041]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of an optical semiconductor device according to the present invention is similar to that of FIG.
However, since the conditions for growing the crystal are different, it is better to refer to FIG. 3 for the following description.

(1) By applying the MOVPE method, a thickness d _g = 80 is applied to the InP substrate 1 having a plane index (100).
[Nm] of InGaAsP (composition wavelength is 1.1 [μ
m]) The diffraction grating semiconductor layer 2 is formed.

(2) EB (electron bea)
m) The diffraction grating 2G is cut into the diffraction grating semiconductor layer 2 by drawing and dry etching to form a diffraction grating portion 12A ₁ ,
12A ₂ , 12A ₃ , 12A ₄ (see FIGS. 5 and 6)
To form

Diffraction grating portion 12 in diffraction grating portion array
_{A 1, 12A 2, 12A 3} , 12A 4 the width of such 20
[Μm], a flat portion 12B existing between the diffraction grating portions (FIG. 5).
And FIG. 6) have a width of 280 [μm] and a diffraction grating period of 200 [nm].

(3) The diffraction grating portion array is buried on the InP substrate 1 on which the diffraction grating portion array is formed, and
On this, various semiconductor crystal layers necessary for producing the illustrated DFB semiconductor laser are grown.

For this, the MOVPE method is applied, and TMIn, TEGa, PH ₃ and AsH ₃ are used as raw materials and H ₂ is used as a carrier gas. The total flow rate of H ₂ is 600
0 [ccm].

The thickness d _s of the InP spacer layer 3 is 1
50 [nm], and the first 50 [nm] is 470
Grown at a low temperature of [° C], and then the remaining 100 [nm] is 4
It grows during the process of raising the temperature from 70 ° C. to 630 ° C.

Incidentally, the PH ₃ flow rate was set to 144 [ccm],
That is, the PH ₃ / H ₂ flow rate ratio is set to 2.4 [%], and a good crystal is obtained in the case of a full-surface diffraction grating. , In
A diffraction grating array made of GaAsP was buried by InP growth of 470 ° C., and various semiconductor layers constituting a DFB semiconductor laser were grown thereon. As a result, good crystallinity was obtained in a flat portion. In the part, the surface is rough and M
The PL intensity of the QW active layer was also very weak.

The cross sections of the grown semiconductor layers were SEM (sc
annealing electron microscoping
y) As a result of observation, it was found that, in the diffraction grating portion, stacking faults existed from the InP spacer layer to the surface, and the thickness of the InP spacer layer was about twice the designed value.

In the formation of the InP spacer layer 3 according to the present invention, the flow rate ratio of PH ₃ / H ₂ is kept constant at 2.4%, and the growth rate of InP at 470 ° C. on the flat substrate. By setting the condition satisfying the expression (4) by setting the value to 0.1 [μm / h], the InGaAsP diffraction grating array is embedded, and various semiconductor layers constituting the DFB semiconductor laser are grown thereon. On the diffraction grating part in the diffraction grating part array, good crystallinity was obtained as well as on the flat part.

As a result of SEM observation of the cross sections of the grown semiconductor layers, no stacking fault was found on the diffraction grating portion.

As is apparent from the above description, In
It has been confirmed that when the GaAsP diffraction grating array is embedded by low-temperature InP growth, it is effective to further reduce the growth rate as compared with the case where the entire surface diffraction grating is embedded.

In the above-described embodiment, the concave type diffraction grating portion in which the InGaAsP diffraction grating layer remains in the flat portion has been described as the InGaAsP diffraction grating array, but the convex portion obtained by removing the flat portion of the InGaAsP diffraction grating layer. It is also possible to use an array of diffraction grating sections.

In the above-described embodiment, the diffraction grating portions in the array have different periods. However, the present invention is similarly applied to the case where the periods are the same. Effective.

[0055]

According to the method of manufacturing an optical semiconductor device according to the present invention, a semiconductor layer for a diffraction grating made of a group III-V compound semiconductor having a different refractive index from InP is formed on an InP substrate. A plurality of diffraction grating portions are formed by cutting a diffraction grating locally in the grating semiconductor layer, a plurality of diffraction grating portions are buried, and a first layer made of InP that covers the diffraction grating semiconductor layer is deposited. Depositing a second layer of InP at a higher substrate temperature than when depositing the first layer, and depositing the first layer comprises:
The raw material of P is PH ₃ or organic P, and the carrier gas is H ₂
And the growth rate in the diffraction grating portion is DR _g [μm / h], and the flow rate ratio of the P source to the total flow rate of the carrier gas H ₂ is FR [%]. Is satisfied, the condition of log ₁₀ FR ≧ 4.4 DR _g −1.3 is satisfied.

By adopting the above-mentioned structure, regardless of the diffraction grating array or the entire diffraction grating, it is possible to satisfactorily embed even if the diffraction gratings are formed deeply in order to increase the coupling efficiency with light. Therefore, the semiconductor crystal grown thereon can be of high quality, and the coolerless D
Good results can be obtained when an FB semiconductor laser is arrayed to realize a light source for WDM.

[Brief description of the drawings]

FIG. 1 is a cutaway side view showing a main part of an optical semiconductor device at a key point in a process for explaining the principle of the present invention.

FIG. 2 is a diagram showing crystallinity mapping for explaining the principle of the present invention.

FIG. 3 is a sectional side view (longitudinal section) of a main part showing a DFB semiconductor laser for explaining the prior art.

FIG. 4 shows InGaAs grown by InP at a temperature of 470 [° C.].
InGaAsPMQW on the substrate with P diffraction grating embedded
FIG. 3 is a diagram illustrating crystallinity mapping when an active layer is grown.

FIG. 5 is an explanatory diagram of a main part showing a diffraction grating unit array.

FIG. 6 is an explanatory diagram of a main part showing a diffraction grating unit array.

[Explanation of symbols]

Reference Signs List 1 n-InP substrate 2 semiconductor layer for n-InGaAsP diffraction grating 2G n-InGaAsP diffraction grating (grating) 3 n-InP spacer layer 4 n-side SCH layer made of InGaAsP 5 InGaAsPMQW active layer 6 p-side SCH layer made of InGaAsP 7 p-InP cladding layer 8 p-InGaAsP cap layer 9 p-InP cover layer 11 InP substrate having a plane index of (100) 12 InGaAsP diffraction grating semiconductor layer 12A ₁ , 12A ₂ , 12A ₃ , 12A ₄ diffraction grating portion 12B flat part d _g diffraction grating semiconductor layer 2 having a thickness of d _s pitch width W ₂ diffraction grating portion in the thickness W ₁ diffraction grating portion of the spacer layer 3

Claims (3)

[Claims] 1. An InP substrate having a plane index of (100) has an I
depositing a semiconductor layer for a diffraction grating made of a group III-V compound semiconductor having a different refractive index from nP; and then, forming a plurality of diffraction grating portions by cutting the diffraction grating locally in the semiconductor layer for the diffraction grating. Forming a first layer of InP that embeds the plurality of diffraction grating portions and covers the semiconductor layer for diffraction grating, and then deposits the first layer. Depositing a second layer made of InP on the first layer by raising the substrate temperature as compared with the case where ,
The raw material of P is PH ₃ or organic P, and the carrier gas is H ₂
And the growth rate of the semiconductor layer for diffraction grating in the diffraction grating portion is DR _g (μ
m / h], and when the flow rate ratio of the P raw material to the total flow rate of the carrier gas H ₂ is FR [%], log ₁₀ FR ≧ 4.
A method for manufacturing an optical semiconductor device, wherein the method is performed while satisfying a condition of 4DR _g -1.3. 2. An InP substrate having a plane index of (100)
depositing a semiconductor layer for a diffraction grating composed of a group III-V compound semiconductor having a different refractive index from nP; Forming a first layer of InP that embeds the plurality of diffraction grating portions and covers the semiconductor layer for diffraction grating, and then deposits the first layer. Depositing a second layer of InP on the first layer by raising the substrate temperature as compared to the first case. The step of depositing the first layer comprises: ,
The raw material of P is PH ₃ or organic P, and the carrier gas is H ₂
And the growth rate in a flat portion having a (100) plane index other than the diffraction grating portion of the semiconductor layer for the diffraction grating is DR _f [μm / h].・ FR is the flow rate ratio of P raw material to the total flow rate of gas H ₂
[%], Log ₁₀ FR ≧ 4.4 A · DR _f −1.3 (A = 2
3) A method for manufacturing an optical semiconductor device, wherein the method is performed while satisfying the following condition. 3. The method of manufacturing an optical semiconductor device according to claim 2, wherein the growth rate DR _{f is set} to 0.1 [μm / h] or less.