JP2000194743A - Verifying device for hierarchical layout pattern - Google Patents

Abstract

PROBLEM TO BE SOLVED: To verify the hierarchical layout pattern data with a hierarchical structure kept as it is by verifying the verifying cell data for every cell to acquire the hierarchical error data based on a verifying rule that is associated with every cell by a cell-based verifying rule reading module. SOLUTION: A cell-based verifying rule reading module 7 outputs a verifying rule 8 to every verifying object cell that is designated by verifying decision module 3 against the verifying cell data 6. The module 9 verifies the data 6 based on the rule 8 and acquires the hierarchical error data 10. A hierarchical error data processing module 11 acquires the final error data via the data 10. Thus, a hierarchical layout pattern is verified with a hierarchical structure kept as it is. Thereby the error checking time is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hierarchical layout pattern verification apparatus for verifying hierarchical layout pattern data based on design rules and displaying error information.

[0002]

2. Description of the Related Art Hitherto, verification of hierarchical layout pattern data has been performed by verifying layout pattern data obtained by developing a hierarchical structure based on a verification rule. On the other hand, Japanese Patent Application Laid-Open No. Hei 5-47926 discloses a method of expanding a cell area of hierarchical layout pattern data and performing verification using a plurality of verification rules. In Japanese Patent Application Laid-Open No. 4-313163,
A method is shown in which each cell of the hierarchical layout pattern data is verified with a plurality of verification rules while maintaining a hierarchical structure.

[0003]

The above prior art has the following problems. That is, the technique disclosed in Japanese Patent Application Laid-Open No. 5-47926 has a drawback that, since the layout pattern data is expanded, error data corresponding to cells in each layer cannot be obtained. Further, when a plurality of cells of the same type are placed on the hierarchical layout pattern, it is necessary to check the error data output for all the cells, and there is a disadvantage that it takes time to check. Further, Japanese Unexamined Patent Application Publication No.
The technique disclosed in Japanese Patent Application Laid-Open Publication No. 2003-157686 has a disadvantage that adjacent data between cells in different layers or cells in the same layer is not checked, and an error is missed.

[0004] The present invention has been made in view of the above-mentioned problems, and has the following objects. (1) Verify the hierarchical layout pattern data while maintaining the hierarchical structure. (2) Verify the boundaries between cells in different layers. (3) Verify the boundary between adjacent cells in the same hierarchy.

[0005]

In order to achieve the above object, according to the present invention, a hierarchical layout pattern detecting method for detecting a layout pattern error by verifying hierarchical layout pattern data composed of a plurality of hierarchical cells based on design rules. In the layout pattern verification device, a verification determination module that associates a design rule with each cell of the hierarchical layout pattern data, a verification data capture module that generates a verification cell data by designating a verification target area across cells of different hierarchies A cell-by-cell verification rule reading module that associates a verification rule with each cell in the cell data for verification based on the design rule that is associated by the verification judgment module, and a cell that is associated by the cell-specific verification rule reading module Cell data for verification based on each verification rule Adopting means comprising a verification module that acquires hierarchical error data to verify each le.
In the above means, a means may be adopted in which the verification data acquisition module is configured so as to specify an area between adjacent cells in the same hierarchy.

[0006]

According to the present invention, verification cell data generated by designating an area over cells of different hierarchies is verified based on verification rules corresponding to the design rules of each cell, so that the hierarchical structure is maintained. The hierarchical layout pattern can be verified as it is. In addition, by specifying the area between adjacent cells in the same layer, it is possible to verify errors not only between cells in different layers but also between adjacent cells in the same layer.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a hierarchical layout pattern verification device according to the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic diagram showing a functional configuration of the present embodiment. As shown in this figure, the present hierarchical layout pattern verification apparatus includes hierarchical layout pattern data 1, control data 2, verification determination module 3, verification data capture module 4, area designation data 5, cell data for verification 6, It comprises a verification rule reading module 7, a verification rule 8, a verification module 9, a hierarchical error data 10, a hierarchical error data processing module 11, and a display module 12.

As shown in FIG. 2, for example, the hierarchical layout pattern data 1 is composed of cells A to C. The top cell is a cell A, a cell B is arranged below the cell A, and A cell C is arranged in the lower layer. As shown in FIG. 3, the cells A to C in each of these layers are designed based on the corresponding design rules A to C. The control data 2 indicates the correspondence between the cells A to C and the design rules A to C.

[0010] The verification judging module 3 generates hierarchical layout pattern data 1 based on the control data 2.
Design rules A to C corresponding to the respective cells A to C are designated. The verification data capture module 4 captures layout pattern data of a cell to be verified and a part of cells in different layers adjacent to the cell to be verified, based on the area designation data 5 indicating the area to be verified.

FIG. 4 shows the verification data acquisition module 4
FIG. 3 is a schematic diagram of a layout pattern for explaining the function of FIG. In this figure, cells B of different hierarchies are placed in cell A, data A indicates pattern data in cell A, and data B indicates pattern data of cell B.

The area designation data 5 designates a cell B which is a cell to be verified and a part of a cell A adjacent to the cell B in a different hierarchy as a region to be inspected. That is, the designated area 2
Reference numeral 3 denotes a region obtained by adding a fixed width to the left and right and up and down of the region of the cell B to be verified.

When the designated area 23 is designated by the designated area data 5, the verification data acquisition module 4 performs pattern data in the designated area 23, ie, the pattern data B of the cell B and the adjacent cells A surrounding the cell B. Is extracted as the verification cell data 6.

For such verification cell data 6,
The cell-specific verification rule reading module 7 outputs the verification rule 8 to the verification module 9 for each verification target cell specified by the verification determination module 3. The verification module 9 verifies the verification cell data 6 (pattern data B and pattern data A ′) based on the verification rule 8 for each verification target cell, and obtains hierarchical error data 10.

The hierarchical error data processing module 11
The final error data is obtained by applying the hierarchical error data 10 obtained in this manner.
FIG. 5 is a schematic diagram for explaining processing in the hierarchical error data processing module 11. In this figure,
Reference numeral 25 denotes the area of the cell B, and 26 denotes the pattern data B.
, Error data at the interval between the pattern data A ′ and the pattern data B is shown at 28.

The hierarchical error data processing module 11
The error data 26 is deleted by subtracting the error data in the cell and adding the error data to the immediately higher hierarchy error data, and the error data 28 is added as the error data 30 to the error data 31 of the cell A in the upper hierarchy. Then, the display module 12 displays the error data finally obtained as described above.

[0017]

As described above, the hierarchical layout pattern verification device according to the present invention has the following effects. (1) Verification cell data generated by designating an area between cells having different hierarchies is verified based on a verification rule corresponding to a design rule of each cell, so that a hierarchical layout pattern is verified while maintaining a hierarchical structure. can do. Therefore, the time for error checking can be reduced. (2) Since error verification can be performed on the boundary between cells having different levels, the verification accuracy is improved. (3) By specifying the area between adjacent cells in the same layer, it is also possible to check the boundaries between cells in the same layer, so that the verification accuracy can be further improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a functional configuration of an embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating an example of hierarchical layout pattern data according to an embodiment of the present invention.

FIG. 3 is an explanatory diagram showing contents of control data according to an embodiment of the present invention.

FIG. 4 is a schematic diagram for explaining a function of a verification cell data acquisition unit according to the embodiment of the present invention.

FIG. 5 is a schematic diagram for explaining processing of a hierarchical error data processing module according to an embodiment of the present invention.

[Explanation of symbols]

 1 ... Layer layout pattern data 2 ... Control data 3 ... Verification judgment module 4 ... Verification data import module 5 ... Area designation data 6 ... Verification cell data 7 ... Cell-specific verification rule reading module 8 ... Verification rule 9... Verification module 10... Hierarchical error data 11... Hierarchical error data processing module 12... Display module

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[Procedure amendment]

[Submission date] November 8, 1999 (1999.11.
8)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claim 1

[Correction method] Change

[Correction contents]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0005

[Correction method] Change

[Correction contents]

[0005]

In order to achieve the above object, according to the present invention, a hierarchical layout pattern detecting method for detecting a layout pattern error by verifying hierarchical layout pattern data composed of a plurality of hierarchical cells based on design rules. In the layout pattern verification device, a verification judgment module for associating a design rule with each cell of the hierarchical layout pattern data, and a verification target cell across cells of different hierarchies.
Area within a certain distance from the cell to be verified and the cell to be verified.
A verification data acquisition module that generates verification cell data by designating the inspection target area, and a cell that associates a verification rule with each cell in the verification cell data based on a design rule associated with the verification judgment module. A verification rule reading module, and a verification module that obtains hierarchical error data by verifying the verification cell data for each cell based on the verification rule for each cell associated by the cell-specific verification rule reading module. The means to do is adopted. In the above means, a means may be adopted in which the verification data acquisition module is configured so as to specify an area between adjacent cells in the same hierarchy.

Claims (2)

[Claims] 1. A hierarchical layout pattern verification apparatus for detecting an error in a layout pattern by verifying hierarchical layout pattern data composed of cells of a plurality of hierarchies based on design rules. A verification determination module for associating design rules, a verification data acquisition module for specifying a verification target area across cells of different hierarchies to generate verification cell data, and a design rule associated with the verification determination module. A verification rule reading module for each cell that associates a verification rule with each cell in the cell data for verification, and the verification based on the verification rule for each cell associated with the verification rule reading module for each cell. Verify cell data for each cell Hierarchical characterized by comprising a verification module that acquires a layout pattern verification apparatus. 2. The hierarchical layout pattern verification apparatus according to claim 1, wherein the verification data acquisition module is configured to specify an area between adjacent cells in the same hierarchy.