JP2000183081A - Semiconductor manufacturing device and method therefor - Google Patents

Semiconductor manufacturing device and method therefor

Info

Publication number
JP2000183081A
JP2000183081A JP10357154A JP35715498A JP2000183081A JP 2000183081 A JP2000183081 A JP 2000183081A JP 10357154 A JP10357154 A JP 10357154A JP 35715498 A JP35715498 A JP 35715498A JP 2000183081 A JP2000183081 A JP 2000183081A
Authority
JP
Japan
Prior art keywords
resin
interposer substrate
sealing
heating stage
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10357154A
Other languages
Japanese (ja)
Inventor
Yasushi Takemura
康司 竹村
Yasuyuki Sakashita
靖之 阪下
Tetsuhiro Yamamoto
哲浩 山本
Takashi Yui
油井  隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP10357154A priority Critical patent/JP2000183081A/en
Publication of JP2000183081A publication Critical patent/JP2000183081A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Abstract

PROBLEM TO BE SOLVED: To improve the reliability of a semiconductor device by preventing it from being air caught up in due to variations in resin injection rate and by increasing the resin injection rate, in an underfill process of a chip-size package having a structure in which a semiconductor device is mounted in a facedown condition. SOLUTION: A protruded metal electrode 8 formed on an electrode 7 of a semiconductor 6 and an electrode 10 of an interposer substrate 5 are connected by a conductive connecting materials 9. In this case, the interposer substrate 5 mounted on the semiconductor 6 is supported on a heating stage 11 for sealing the resin, and a resin 12 is injected between the interposer substrate 5 and the semiconductor device 6. In injecting the resin, the heating stage 11 for sealing the resin is constituted, so that the central part of the interposer substrate 5 is set at a higher temperature that those of both sides of the interposer substrate 5. As a result, resin adhesion degree is lowered in the central part of the interposer substrate 5 due to high temperature, and the resin injection rate becomes high. Therefore, homogeneous resin injection can be ensured. After the resin injection, heating and hardening of the resin are conducted in an oven.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体の集積回路
部を保護し、かつ外部装置と半導体素子の電気的な接続
を安定に確保し、さらに一層高密度な実装を可能とした
チップサイズパッケージ[Chip Size Package] (以下
「CSP」という)と呼ばれる半導体装置の製造方法お
よび製造装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip size package which protects an integrated circuit portion of a semiconductor, stably secures an electrical connection between an external device and a semiconductor element, and enables further high-density mounting. The present invention relates to a method and an apparatus for manufacturing a semiconductor device called [Chip Size Package] (hereinafter referred to as “CSP”).

【0002】[0002]

【従来の技術】以下、従来のCSPと呼ばれる半導体装
置の製造方法について図面を参照しながら説明する。
2. Description of the Related Art A conventional method of manufacturing a semiconductor device called a CSP will be described below with reference to the drawings.

【0003】図5は、従来の半導体装置の製造装置に用
いる樹脂封止用加熱ステージの構造を示したものであ
る。図5(a)は樹脂封止用加熱ステージ上面の平面
図、図5(b)は樹脂封止用加熱ステージの断面図であ
る。図5において、101は金属からなる基材、102
は吸着穴、103は発熱体、111は樹脂封止用加熱ス
テージである。
FIG. 5 shows the structure of a resin-sealing heating stage used in a conventional semiconductor device manufacturing apparatus. 5A is a plan view of the upper surface of the heating stage for resin sealing, and FIG. 5B is a cross-sectional view of the heating stage for resin sealing. In FIG. 5, reference numeral 101 denotes a substrate made of a metal;
Is a suction hole, 103 is a heating element, and 111 is a heating stage for resin sealing.

【0004】この樹脂封止用加熱ステージ111は、金
属を基材101としてステージ全面を等温に加熱できる
ように発熱体103を埋め込んである。
The heating stage 111 for resin encapsulation has a heating element 103 embedded therein so that the entire surface of the stage can be heated at a constant temperature using a metal as the base material 101.

【0005】図6は、従来のCSPの製造方法を示す工
程断面図および一部平面図である。半導体素子106の
電極107上に金属突起電極108を形成し(図6
(a)、(b))、この金属突起電極108とインター
ポーザ基板104の電極110との位置合わせを行った
後に導電性接続材料109により金属突起電極108と
インターポーザ基板104の電極110とを接続する
(図6(c))。
FIG. 6 is a process sectional view and a partial plan view showing a conventional CSP manufacturing method. A metal bump electrode 108 is formed on the electrode 107 of the semiconductor element 106.
(A), (b)), after the metal bump electrode 108 and the electrode 110 of the interposer substrate 104 are aligned, the metal bump electrode 108 and the electrode 110 of the interposer substrate 104 are connected by the conductive connecting material 109. (FIG. 6 (c)).

【0006】次に、適温に保持した樹脂封止用加熱ステ
ージ111上に、半導体素子106を搭載したインター
ポーザ基板104を載せて吸着穴102(図5参照)に
より保持し、インターポーザ基板104上の半導体素子
106の四角形の1辺側に樹脂112を一定量塗布する
(図6(d))。この際、樹脂封止用加熱ステージ11
1は水平にしておいても、また樹脂112が半導体素子
106とインターポーザ基板104間に浸入しやすい方
向に傾斜させてもよい。
Next, the interposer substrate 104 on which the semiconductor element 106 is mounted is placed on the resin-sealing heating stage 111 maintained at an appropriate temperature, and is held by the suction holes 102 (see FIG. 5). A fixed amount of resin 112 is applied to one side of the square of the element 106 (FIG. 6D). At this time, the heating stage 11 for resin sealing is used.
1 may be horizontal or may be inclined in a direction in which the resin 112 easily enters between the semiconductor element 106 and the interposer substrate 104.

【0007】塗布した樹脂112が半導体素子106と
インターポーザ基板104間に注入されたことを確認し
た後、半導体素子106の1回目の樹脂の塗布と同じ四
角形の1辺側に2回目の樹脂の塗布を行う。この動作を
繰り返し、所定量を塗布した後、樹脂封止用加熱ステー
ジ111上で半導体素子106の周辺部に樹脂フィレッ
ト113(樹脂112が半導体素子106の周辺部には
み出した部分のこと)が形成されるまで放置する(図6
(e)、(f))。この際、樹脂フィレット113が形
成されやすいように、また形成スピードを上昇させるた
めに樹脂封止用加熱ステージ111を傾斜させてもよ
い。なお、図6(f)では樹脂封止用加熱ステージ11
1を図示していない。
After confirming that the applied resin 112 has been injected between the semiconductor element 106 and the interposer substrate 104, a second resin application is performed on one side of the same square as the first resin application of the semiconductor element 106. I do. This operation is repeated, and after applying a predetermined amount, a resin fillet 113 (a portion where the resin 112 protrudes into the peripheral portion of the semiconductor element 106) is formed on the peripheral portion of the semiconductor element 106 on the heating stage 111 for resin sealing. Until it is done (Fig. 6
(E), (f)). At this time, the resin-sealing heating stage 111 may be inclined so that the resin fillet 113 is easily formed and to increase the forming speed. In FIG. 6F, the heating stage 11 for resin sealing is used.
1 is not shown.

【0008】その後、オーブン中で樹脂の加熱硬化を行
う。以上により、半導体装置を製造していた。
Thereafter, the resin is cured by heating in an oven. Thus, the semiconductor device was manufactured.

【0009】[0009]

【発明が解決しようとする課題】しかしながら上記従来
の半導体装置の製造方法では、樹脂封止工程において、
半導体素子106の周辺部に金属突起電極108が並ん
でいるため、この部分を先行して封止樹脂が伝わり、半
導体素子106とインターポーザ基板104間で半導体
素子106の中央部分(言い換えるとインターポーザ基
板104の中央部分)に注入される封止樹脂の浸入が遅
れ、空気を巻き込みボイドが発生するという課題があっ
た。また、半導体装置が小型になるほど半導体素子10
6とインターポーザ基板104との間隔が狭くなり、中
央部分への封止樹脂の浸入が遅れやすくなり、空気を巻
き込みボイドが発生しやすくなった。このボイドは信頼
性上大きな問題であり、CSP2次実装段階でポップコ
ーン現象を誘発する危険性があるという欠点を有してい
た。
However, in the above-described conventional method for manufacturing a semiconductor device, in the resin sealing step,
Since the metal projecting electrodes 108 are arranged in the periphery of the semiconductor element 106, the sealing resin is transmitted before this part, and the central part of the semiconductor element 106 between the semiconductor element 106 and the interposer substrate 104 (in other words, the interposer substrate 104). (A central portion of the sealing resin) is delayed, and there is a problem that air is trapped and voids are generated. Further, as the semiconductor device becomes smaller, the semiconductor element 10 becomes smaller.
6 and the interposer substrate 104 became narrower, the penetration of the sealing resin into the central portion was easily delayed, and air was entrapped and voids were easily generated. These voids are a serious problem in terms of reliability, and have a drawback that there is a risk of inducing a popcorn phenomenon in the CSP secondary mounting stage.

【0010】本発明は上記従来の課題を解決するもの
で、半導体素子をフェイスダウン状態で実装する構造の
CSPのアンダーフィル工程において、樹脂注入速度の
バラツキによる空気の巻き込みを防ぐとともに注入速度
を上昇させ、半導体装置の信頼性を向上することのでき
る半導体装置の製造方法および製造装置を提供すること
を目的とする。
The present invention solves the above-mentioned conventional problems. In an underfill process of a CSP having a structure in which a semiconductor element is mounted in a face-down state, air entrapment due to variation in resin injection speed is prevented and the injection speed is increased. It is an object of the present invention to provide a method and an apparatus for manufacturing a semiconductor device, which can improve the reliability of the semiconductor device.

【0011】[0011]

【課題を解決するための手段】請求項1記載の半導体装
置の製造方法は、半導体素子の電極上に金属突起電極を
形成する工程と、半導体素子上の金属突起電極とインタ
ーポーザ基板の電極とを導電性接着材料により電気的に
接続する工程と、インターポーザ基板を加熱しながら封
止樹脂を半導体素子とインターポーザ基板との間に注入
する封止樹脂注入工程と、注入した封止樹脂を硬化させ
る工程とを含む半導体装置の製造方法であって、封止樹
脂注入工程におけるインターポーザ基板の加熱を、イン
ターポーザ基板のセンター部がセンター部の両側のサイ
ド部よりも高温となるように行うことを特徴とする。
According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a metal projection electrode on an electrode of a semiconductor element; and forming a metal projection electrode on the semiconductor element and an electrode of an interposer substrate. A step of electrically connecting with a conductive adhesive material, a step of injecting a sealing resin between the semiconductor element and the interposer substrate while heating the interposer substrate, and a step of curing the injected sealing resin Wherein the heating of the interposer substrate in the sealing resin injecting step is performed such that the center of the interposer substrate is higher in temperature than the side portions on both sides of the center portion. .

【0012】請求項2記載の半導体装置の製造装置は、
半導体素子を搭載したインターポーザ基板と半導体素子
との間に封止樹脂を注入する際に、インターポーザ基板
を保持して加熱する樹脂封止用加熱ステージを備えた半
導体装置の製造装置であって、樹脂封止用加熱ステージ
は、インターポーザ基板のセンター部がセンター部の両
側のサイド部よりも高温となるように加熱を行う構造と
したことを特徴とする。
According to a second aspect of the present invention, there is provided an apparatus for manufacturing a semiconductor device.
When injecting a sealing resin between an interposer substrate on which a semiconductor element is mounted and a semiconductor element, a semiconductor device manufacturing apparatus provided with a resin sealing heating stage for holding and heating the interposer substrate, The heating stage for sealing is characterized in that the heating is performed so that the center of the interposer substrate is higher in temperature than the side portions on both sides of the center.

【0013】請求項3記載の半導体装置の製造装置は、
請求項2記載の半導体装置の製造装置において、樹脂封
止用加熱ステージとインターポーザ基板との接触部分の
分布がインターポーザ基板のセンター部がサイド部より
も密となるように、樹脂封止用加熱ステージ表面に凹凸
を設けたことを特徴とする。
According to a third aspect of the present invention, there is provided an apparatus for manufacturing a semiconductor device.
3. The apparatus for manufacturing a semiconductor device according to claim 2, wherein a distribution of a contact portion between the heating stage for resin sealing and the interposer substrate is such that a center portion of the interposer substrate is denser than a side portion. The surface is provided with irregularities.

【0014】請求項4記載の半導体装置の製造装置は、
請求項2記載の半導体装置の製造装置において、樹脂封
止用加熱ステージは、インターポーザ基板のセンター部
と接触する領域のみ加熱領域としたことを特徴とする。
According to a fourth aspect of the present invention, there is provided a semiconductor device manufacturing apparatus, comprising:
According to a second aspect of the present invention, in the semiconductor device manufacturing apparatus, the heating stage for resin sealing is a heating region only in a region in contact with a center portion of the interposer substrate.

【0015】請求項5記載の半導体装置の製造装置は、
請求項4記載の半導体装置の製造装置において、インタ
ーポーザ基板のサイド部と接触する樹脂封止用加熱ステ
ージの領域を冷却領域としたことを特徴とする。
According to a fifth aspect of the present invention, there is provided a semiconductor device manufacturing apparatus, comprising:
According to a fourth aspect of the present invention, in the semiconductor device manufacturing apparatus, a region of the resin-sealing heating stage that is in contact with a side portion of the interposer substrate is a cooling region.

【0016】請求項6記載の半導体装置の製造装置は、
請求項2記載の半導体装置の製造装置において、樹脂封
止用加熱ステージは、インターポーザ基板のセンター部
のみを保持して加熱することを特徴とする。
According to a sixth aspect of the present invention, there is provided a semiconductor device manufacturing apparatus, comprising:
According to a second aspect of the present invention, in the semiconductor device manufacturing apparatus, the resin-sealing heating stage holds and heats only the center portion of the interposer substrate.

【0017】本発明の半導体装置の製造方法および製造
装置によれば、インターポーザ基板のセンター部がその
両側のサイド部よりも高温となるようにして封止樹脂の
注入を行うため、インターポーザ基板のセンター部で樹
脂粘度が低下し、従来封止樹脂の浸入が遅れやすかった
インターポーザ基板のセンター部で従来より注入速度が
上昇して均一な樹脂注入形態が可能となり、樹脂注入速
度のバラツキによる空気の巻き込みを防ぎ、信頼性を向
上することができる。さらに、樹脂注入速度の上昇によ
り、量産における生産タクトの向上を実現できる。
According to the method and apparatus for manufacturing a semiconductor device of the present invention, the sealing resin is injected such that the center of the interposer substrate is higher in temperature than the side portions on both sides thereof. At the center of the interposer substrate, where the injection of the sealing resin was apt to be delayed, the injection speed was higher than before, and a uniform resin injection form became possible, and air entrapment due to variations in the resin injection speed Can be prevented, and the reliability can be improved. Further, an increase in the resin injection speed can improve the production tact in mass production.

【0018】[0018]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照しながら説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0019】図1は、本発明の実施の形態における半導
体装置の製造装置に用いる樹脂封止用加熱ステージの構
造を示したものである。図1(a)は樹脂封止用加熱ス
テージ上面の平面図、図1(b)は樹脂封止用加熱ステ
ージの断面図である。図1において、1は金属からなる
基材、2(2a,2b,2c)は基材1表面に設けられ
た金属からなる凸部、3は発熱体、4は吸着穴、11は
樹脂封止用加熱ステージである。この図1では、基材1
に凸部2を接着しているが、基材1および凸部2を一体
的に形成してもよい。
FIG. 1 shows a structure of a resin-sealing heating stage used in an apparatus for manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 1A is a plan view of the upper surface of the heating stage for resin sealing, and FIG. 1B is a cross-sectional view of the heating stage for resin sealing. In FIG. 1, 1 is a metal substrate, 2 (2a, 2b, 2c) are metal projections provided on the surface of the substrate 1, 3 is a heating element, 4 is a suction hole, and 11 is resin sealing. Heating stage. In FIG. 1, the substrate 1
Although the convex portion 2 is bonded to the substrate 1, the base material 1 and the convex portion 2 may be integrally formed.

【0020】この実施の形態における樹脂封止用加熱ス
テージ11は、図4(d)に示されるようにインターポ
ーザ基板5と半導体素子6との間に封止樹脂12を注入
する際に、インターポーザ基板5を保持して加熱するも
のであり、インターポーザ基板5のセンター部がその両
側のサイド部よりも高温となるように加熱を行える構造
としたものである。そのため、樹脂封止用加熱ステージ
11とインターポーザ基板5との接触部分の分布がイン
ターポーザ基板5のセンター部が密で、サイド部が疎と
なるように、樹脂封止用加熱ステージ11の表面に凹凸
を設けたことを特徴とする。樹脂封止用加熱ステージ1
1の表面の凸部2がインターポーザ基板5との接触部分
となり、凸部2aがインターポーザ基板5のセンター部
と接触し、インターポーザ基板5のセンター部から遠ざ
かるほど接触面積が小さくなるように凸部2b,2cを
設けている。これにより、インターポーザ基板5のセン
ター部が高温で、サイド部が低温となるような温度勾配
を形成できる。
The heating stage 11 for encapsulating resin in this embodiment, when the encapsulating resin 12 is injected between the interposer substrate 5 and the semiconductor element 6 as shown in FIG. The interposer substrate 5 is heated while holding it, so that the center of the interposer substrate 5 is heated higher than the side portions on both sides thereof. Therefore, the surface of the resin-sealing heating stage 11 has irregularities such that the distribution of the contact portion between the resin-sealing heating stage 11 and the interposer substrate 5 is dense at the center portion of the interposer substrate 5 and sparse at the side portions. Is provided. Heating stage for resin sealing 1
The convex portion 2b on the surface of the interposer substrate 5 is in contact with the interposer substrate 5, the convex portion 2a is in contact with the center portion of the interposer substrate 5, and the contact area becomes smaller as the distance from the center portion of the interposer substrate 5 decreases. , 2c. This makes it possible to form a temperature gradient such that the center of the interposer substrate 5 has a high temperature and the side portions have a low temperature.

【0021】図4は、図1の樹脂封止用加熱ステージ1
1を用いて行う本実施の形態における半導体装置(CS
P)の製造方法を示す工程断面図(図4(a)〜(d)
と(f)),一部透視平面図(図4(e))および一部
平面図(図4(g))である。
FIG. 4 shows the heating stage 1 for resin sealing shown in FIG.
Semiconductor device (CS
4 (a) to 4 (d) are cross-sectional views showing the steps of a method for manufacturing P).
(F)), a partially transparent plan view (FIG. 4 (e)) and a partial plan view (FIG. 4 (g)).

【0022】半導体素子6の電極7上に金属突起電極8
を形成し(図4(a)、(b))、この金属突起電極8
とインターポーザ基板5の電極10との位置合わせを行
った後に導電性接続材料9により金属突起電極8とイン
ターポーザ基板5の電極10とを接続する(図4
(c))。
A metal bump electrode 8 is provided on the electrode 7 of the semiconductor element 6.
Is formed (FIGS. 4A and 4B), and the metal bump electrode 8 is formed.
After the positioning of the metal bump electrode 8 and the electrode 10 of the interposer substrate 5 with the conductive connecting material 9 after the alignment of the electrode 10 with the electrode 10 of the interposer substrate 5 (FIG.
(C)).

【0023】次に、樹脂封止用加熱ステージ11上に、
半導体素子6を搭載したインターポーザ基板5を載せて
吸着穴4(図1参照)により保持し、インターポーザ基
板5上の半導体素子6の四角形の1辺側に樹脂12を一
定量塗布する(図4(d))。この際、使用する封止樹
脂は、温度上昇に伴い粘度が低下し、注入スピードが向
上する一般的な液状樹脂を用いればよい。樹脂封止用加
熱ステージ11によりインターポーザ基板5のセンター
部では高温となり樹脂粘度が低下し、注入速度が上昇す
るため、均一な樹脂注入形態(図4(e))となる。こ
の1回目の樹脂注入は、樹脂封止用加熱ステージ11に
対しては、図1(a)の矢印Aに示される方向から注入
されるものとする。また、樹脂注入の際、樹脂封止用加
熱ステージ11は水平にしておいても、また樹脂が浸入
しやすい方向に傾斜させてもよい。なお、図4(e)で
は樹脂封止用加熱ステージ11を図示していない。
Next, on the heating stage 11 for resin sealing,
The interposer substrate 5 on which the semiconductor element 6 is mounted is placed and held by the suction holes 4 (see FIG. 1), and a predetermined amount of the resin 12 is applied to one side of the square of the semiconductor element 6 on the interposer substrate 5 (FIG. d)). At this time, as a sealing resin to be used, a general liquid resin whose viscosity decreases with an increase in temperature and whose injection speed is improved may be used. Due to the high temperature at the center of the interposer substrate 5 due to the resin sealing heating stage 11, the resin viscosity decreases and the injection speed increases, so that a uniform resin injection mode (FIG. 4E) is obtained. This first resin injection is to be injected into the resin sealing heating stage 11 in the direction indicated by the arrow A in FIG. When injecting the resin, the resin-sealing heating stage 11 may be kept horizontal or may be inclined in a direction in which the resin easily enters. FIG. 4E does not show the heating stage 11 for resin sealing.

【0024】塗布した樹脂12が半導体素子6とインタ
ーポーザ基板5間に注入されたことを確認した後、半導
体素子6の1回目の樹脂の塗布と同じ四角形の1辺側に
2回目の樹脂の塗布を行う。この動作を繰り返し、所定
量を塗布した後、樹脂封止用加熱ステージ11上で半導
体素子6の周辺部に樹脂フィレット13が形成されるま
で放置する(図4(f)、(g))。この際、樹脂フィ
レット13が形成されやすいように、また形成スピード
を上昇させるために樹脂封止用加熱ステージ11を傾斜
させてもよい。なお、図4(g)では樹脂封止用加熱ス
テージ11を図示していない。また、1回目および2回
目以降の全ての樹脂注入は、樹脂封止用加熱ステージ1
1に対しては、図1(a)の矢印Aに示される方向から
注入される。
After confirming that the applied resin 12 has been injected between the semiconductor element 6 and the interposer substrate 5, a second resin application is performed on one side of the same square as the first resin application of the semiconductor element 6. I do. This operation is repeated, and after applying a predetermined amount, the resin is left on the heating stage for resin sealing 11 until the resin fillet 13 is formed around the semiconductor element 6 (FIGS. 4F and 4G). At this time, the resin-sealing heating stage 11 may be inclined so that the resin fillet 13 is easily formed and to increase the forming speed. Note that FIG. 4G does not show the heating stage 11 for resin sealing. In addition, all the first and second injections of the resin are performed by heating stage 1 for resin sealing.
1 is injected from the direction indicated by the arrow A in FIG.

【0025】その後、オーブン中で樹脂の加熱硬化を行
う。以上により、半導体装置を製造できる。
After that, the resin is cured by heating in an oven. Thus, a semiconductor device can be manufactured.

【0026】以上のように本実施の形態によれば、樹脂
封止用加熱ステージ11を用いることにより、インター
ポーザ基板5のセンター部がその両側のサイド部よりも
高温となるようにして封止樹脂の注入を行え、インター
ポーザ基板5のセンター部で樹脂粘度が低下し、従来封
止樹脂の浸入が遅れやすかったインターポーザ基板5の
センター部で従来より注入速度が上昇して均一な樹脂注
入形態が可能となり、樹脂注入速度のバラツキによる空
気の巻き込みを防ぎ、信頼性を向上することができる。
さらに、樹脂注入速度の上昇により、量産における生産
タクトの向上を実現できる。また、半導体装置が小型化
して半導体素子6とインターポーザ基板5との間隔が狭
くなっても、インターポーザ基板5のセンター部へ封止
樹脂が浸入しやすくなるため、空気の巻き込みを防ぎ、
信頼性を向上することができる。このように、製品の品
質および生産タクトを向上することができ、より低コス
トで高性能な小型の半導体装置を容易に実現できる。
As described above, according to the present embodiment, the use of the resin-sealing heating stage 11 allows the center portion of the interposer substrate 5 to be higher in temperature than the side portions on both sides thereof. Can be injected, the resin viscosity decreases at the center of the interposer substrate 5, and the injection speed rises at the center of the interposer substrate 5 where the penetration of the sealing resin was apt to be delayed. Thus, entrainment of air due to variation in resin injection speed can be prevented, and reliability can be improved.
Further, an increase in the resin injection speed can improve the production tact in mass production. Further, even when the semiconductor device is downsized and the distance between the semiconductor element 6 and the interposer substrate 5 is reduced, the sealing resin easily enters the center portion of the interposer substrate 5, so that the entrapment of air is prevented.
Reliability can be improved. As described above, the quality of the product and the production tact time can be improved, and a small-sized semiconductor device with lower cost and higher performance can be easily realized.

【0027】次に、図1の樹脂封止用加熱ステージ11
を用いた場合と同様の効果が得られる他の樹脂封止用加
熱ステージの構造について説明する。
Next, the resin-sealing heating stage 11 shown in FIG.
A description will be given of the structure of another heating stage for resin encapsulation that can obtain the same effect as the case of using the resin sealing.

【0028】図2(a)は本発明の他の実施の形態にお
ける半導体装置の製造装置に用いる樹脂封止用加熱ステ
ージ上面の平面図、図2(b)は同樹脂封止用加熱ステ
ージの断面図である。図2において、3は発熱体、4は
吸着穴、21は銅などの熱伝導度の高い金属からなる加
熱ステージセンター部、22は熱伝導度の低い金属から
なる基材であり、加熱ステージセンター部21の両側の
基材22の領域を加熱ステージサイド部という。23は
冷却管である。
FIG. 2A is a plan view of an upper surface of a resin-sealing heating stage used in a semiconductor device manufacturing apparatus according to another embodiment of the present invention, and FIG. It is sectional drawing. In FIG. 2, reference numeral 3 denotes a heating element, 4 denotes a suction hole, 21 denotes a heating stage center portion made of a metal having a high thermal conductivity such as copper, and 22 denotes a base made of a metal having a low thermal conductivity. The regions of the base material 22 on both sides of the portion 21 are called heating stage side portions. 23 is a cooling pipe.

【0029】この樹脂封止用加熱ステージは、加熱ステ
ージセンター部21を銅などの熱伝導度の高い金属を用
いて作製し、加熱ステージセンター部21のみに発熱体
3を埋め込んでいる。そして加熱ステージサイド部には
冷却管23を設け、冷却水を流通させる。このようにし
て加熱ステージセンター部21が高温に、その両側の加
熱ステージサイド部が低温となる温度勾配を形成するこ
とができる。この樹脂封止用加熱ステージに、半導体素
子6を搭載したインターポーザ基板5を保持することに
より、インターポーザ基板5のセンター部が高温で、サ
イド部が低温となるような温度勾配を形成できる。
In the heating stage for resin sealing, the heating stage center portion 21 is made of a metal having high thermal conductivity such as copper, and the heating element 3 is embedded only in the heating stage center portion 21. A cooling pipe 23 is provided on the side of the heating stage to allow cooling water to flow. In this way, it is possible to form a temperature gradient in which the heating stage center portion 21 has a high temperature and the heating stage side portions on both sides thereof have a low temperature. By holding the interposer substrate 5 on which the semiconductor element 6 is mounted on the resin-sealing heating stage, it is possible to form a temperature gradient such that the center portion of the interposer substrate 5 has a high temperature and the side portions have a low temperature.

【0030】なお、図2の樹脂封止用加熱ステージで
は、加熱ステージサイド部に冷却管23を設けている
が、必ず冷却管23を設ける必要はなく、冷却管23を
設けない場合でも、加熱ステージセンター部21が高温
に、その両側の加熱ステージサイド部が低温となるある
程度の温度勾配は形成できる。なお、加熱ステージサイ
ド部の基材としてプラスティック等の熱伝導度の非常に
低いものを用いることにより、前記温度勾配は容易に実
現できる。
In the heating stage for sealing resin shown in FIG. 2, the cooling pipe 23 is provided on the side of the heating stage. However, the cooling pipe 23 is not necessarily provided. A certain temperature gradient can be formed in which the stage center portion 21 has a high temperature and the heating stage side portions on both sides thereof have a low temperature. The temperature gradient can be easily realized by using a very low thermal conductivity material such as plastic as a base material of the heating stage side portion.

【0031】図3(a)は本発明のさらに他の実施の形
態における半導体装置の製造装置に用いる樹脂封止用加
熱ステージ上面の平面図、図3(b)は同樹脂封止用加
熱ステージの断面図である。図3において、3は発熱
体、4は吸着穴、31はインターポーザ基板5(図4)
を保持・加熱する加熱ステージ本体、32は加熱ステー
ジ本体31を固定する本体支持部である。なお、図3で
は、加熱ステージ本体31の両側に本体支持部32を接
着しているが、加熱ステージ本体31と本体支持部32
とを一体的に形成してもよい。
FIG. 3A is a plan view of an upper surface of a heating stage for resin sealing used in a semiconductor device manufacturing apparatus according to still another embodiment of the present invention, and FIG. 3B is a heating stage for the same resin sealing. FIG. 3, reference numeral 3 denotes a heating element, 4 denotes a suction hole, and 31 denotes an interposer substrate 5 (FIG. 4).
A heating stage main body 32 for holding and heating the heating stage main body 32 is a main body support for fixing the heating stage main body 31. In FIG. 3, the main body supporting portions 32 are adhered to both sides of the heating stage main body 31, but the heating stage main body 31 and the main body supporting portions 32 are bonded.
May be integrally formed.

【0032】この樹脂封止用加熱ステージは、加熱ステ
ージ本体31がインターポーザ基板5よりも小さく、加
熱ステージ本体31に設けられた吸着穴4および発熱体
3により、インターポーザ基板5のセンター部のみを支
持および加熱するようになっている。これにより、イン
ターポーザ基板5のセンター部が高温で、サイド部が低
温となるような温度勾配を形成できる。
In the heating stage for resin sealing, the heating stage main body 31 is smaller than the interposer substrate 5, and only the center portion of the interposer substrate 5 is supported by the suction holes 4 and the heating elements 3 provided in the heating stage main body 31. And heating. This makes it possible to form a temperature gradient such that the center of the interposer substrate 5 has a high temperature and the side portions have a low temperature.

【0033】[0033]

【発明の効果】以上のように本発明によれば、インター
ポーザ基板のセンター部がその両側のサイド部よりも高
温となるようにして封止樹脂の注入を行うため、インタ
ーポーザ基板のセンター部で樹脂粘度が低下し、従来封
止樹脂の浸入が遅れやすかったインターポーザ基板のセ
ンター部で従来より注入速度が上昇して均一な樹脂注入
形態が可能となり、樹脂注入速度のバラツキによる空気
の巻き込みを防ぎ、信頼性を向上することができる。さ
らに、樹脂注入速度の上昇により、量産における生産タ
クトの向上を実現できる。このように、製品の品質およ
び生産タクトを向上することができ、より低コストで高
性能な小型の半導体装置を容易に実現し、情報通信機
器、事務用電子機器等に用いられる半導体装置の小型化
も容易にするものである。
As described above, according to the present invention, the sealing resin is injected so that the center of the interposer substrate is higher in temperature than the side portions on both sides of the interposer substrate. The viscosity has decreased, and the injection speed has increased at the center of the interposer substrate, where the infiltration of the sealing resin was easy to delay, so that a uniform resin injection form became possible, preventing the entrapment of air due to variations in the resin injection speed, Reliability can be improved. Further, an increase in the resin injection speed can improve the production tact in mass production. As described above, it is possible to improve product quality and production tact, easily realize a low-cost, high-performance, small-sized semiconductor device, and reduce the size of a semiconductor device used for information communication equipment, office electronic equipment, and the like. It also facilitates the conversion.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)は本発明の実施の形態における半導体装
置の製造装置を構成する樹脂封止用加熱ステージ上面の
平面図、(b)は同樹脂封止用加熱ステージの断面図で
ある。
FIG. 1A is a plan view of an upper surface of a resin-sealing heating stage included in a semiconductor device manufacturing apparatus according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view of the resin-sealing heating stage. .

【図2】(a)は本発明の他の実施の形態における半導
体装置の製造装置を構成する樹脂封止用加熱ステージ上
面の平面図、(b)は同樹脂封止用加熱ステージの断面
図である。
FIG. 2A is a plan view of an upper surface of a resin-sealing heating stage included in a semiconductor device manufacturing apparatus according to another embodiment of the present invention, and FIG. 2B is a cross-sectional view of the resin-sealing heating stage. It is.

【図3】(a)は本発明のさらに他の実施の形態におけ
る半導体装置の製造装置を構成する樹脂封止用加熱ステ
ージ上面の平面図、(b)は同樹脂封止用加熱ステージ
の断面図である。
FIG. 3A is a plan view of an upper surface of a heating stage for resin sealing constituting a semiconductor device manufacturing apparatus according to still another embodiment of the present invention, and FIG. 3B is a cross section of the heating stage for resin sealing. FIG.

【図4】(a)〜(d),(f)は本発明の実施の形態
における半導体装置の製造方法を示す断面図、(e)同
半導体装置の製造方法を示す透視平面図、(g)は同半
導体装置の製造方法を示す平面図である。
FIGS. 4A to 4D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 4E is a perspective plan view illustrating the method for manufacturing the semiconductor device, and FIG. () Is a plan view showing the method for manufacturing the semiconductor device.

【図5】(a)は従来の半導体装置の製造装置を構成す
る樹脂封止用加熱ステージ上面の平面図、(b)は同樹
脂封止用加熱ステージの断面図である。
FIG. 5A is a plan view of an upper surface of a resin-sealing heating stage included in a conventional semiconductor device manufacturing apparatus, and FIG. 5B is a cross-sectional view of the resin-sealing heating stage.

【図6】(a)〜(e)は従来の半導体装置の製造方法
を示す断面図、(f)は同製造方法を示す平面図であ
る。
6A to 6E are cross-sectional views illustrating a conventional method for manufacturing a semiconductor device, and FIG. 6F is a plan view illustrating the same manufacturing method.

【符号の説明】[Explanation of symbols]

1 基材 2a,2b,2c 凸部 3 発熱体 4 吸着穴 5 インターポーザ基板 6 半導体素子 7 半導体素子の電極 8 金属突起電極 9 導電性接続材料 10 インターポーザ基板の電極 11 樹脂封止用加熱ステージ 12 封止樹脂 13 樹脂フィレット 21 加熱ステージセンター部 22 基材 23 冷却管 DESCRIPTION OF SYMBOLS 1 Base material 2a, 2b, 2c Convex part 3 Heating element 4 Suction hole 5 Interposer board 6 Semiconductor element 7 Electrode of semiconductor element 8 Metal projection electrode 9 Conductive connection material 10 Electrode of interposer board 11 Heating stage for resin sealing 12 Sealing Stop resin 13 Resin fillet 21 Center of heating stage 22 Base material 23 Cooling tube

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山本 哲浩 大阪府高槻市幸町1番1号 松下電子工業 株式会社内 (72)発明者 油井 隆 大阪府高槻市幸町1番1号 松下電子工業 株式会社内 Fターム(参考) 5F044 KK02 LL07 QQ01 RR19 5F061 AA01 BA03 CA04 CB13  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tetsuhiro Yamamoto 1-1, Sachimachi, Takatsuki-shi, Osaka Prefecture Matsushita Electronics Co., Ltd. (72) Inventor Takashi Yui 1-1-1, Sachimachi, Takatsuki-shi, Osaka Matsushita Electronics F term in the company (reference) 5F044 KK02 LL07 QQ01 RR19 5F061 AA01 BA03 CA04 CB13

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子の電極上に金属突起電極を形
成する工程と、前記半導体素子上の金属突起電極とイン
ターポーザ基板の電極とを導電性接着材料により電気的
に接続する工程と、前記インターポーザ基板を加熱しな
がら封止樹脂を前記半導体素子と前記インターポーザ基
板との間に注入する封止樹脂注入工程と、注入した前記
封止樹脂を硬化させる工程とを含む半導体装置の製造方
法であって、 前記封止樹脂注入工程における前記インターポーザ基板
の加熱を、前記インターポーザ基板のセンター部が前記
センター部の両側のサイド部よりも高温となるように行
うことを特徴とする半導体装置の製造方法。
A step of forming a metal bump electrode on an electrode of a semiconductor element; a step of electrically connecting the metal bump electrode on the semiconductor element to an electrode of an interposer substrate with a conductive adhesive material; A method of manufacturing a semiconductor device, comprising: a sealing resin injecting step of injecting a sealing resin between the semiconductor element and the interposer substrate while heating a substrate; and a step of curing the injected sealing resin. A method of manufacturing the semiconductor device, wherein the heating of the interposer substrate in the sealing resin injecting step is performed such that the temperature of the center of the interposer substrate is higher than that of the side portions on both sides of the center.
【請求項2】 半導体素子を搭載したインターポーザ基
板と前記半導体素子との間に封止樹脂を注入する際に、
前記インターポーザ基板を保持して加熱する樹脂封止用
加熱ステージを備えた半導体装置の製造装置であって、 前記樹脂封止用加熱ステージは、前記インターポーザ基
板のセンター部が前記センター部の両側のサイド部より
も高温となるように加熱を行う構造としたことを特徴と
する半導体装置の製造装置。
2. Injecting a sealing resin between an interposer substrate on which a semiconductor element is mounted and the semiconductor element,
A semiconductor device manufacturing apparatus provided with a resin-sealing heating stage for holding and heating the interposer substrate, wherein the resin-sealing heating stage has a center portion of the interposer substrate on both sides of the center portion. An apparatus for manufacturing a semiconductor device, wherein heating is performed so that the temperature is higher than that of a part.
【請求項3】 樹脂封止用加熱ステージとインターポー
ザ基板との接触部分の分布が前記インターポーザ基板の
センター部がサイド部よりも密となるように、前記樹脂
封止用加熱ステージ表面に凹凸を設けたことを特徴とす
る請求項2記載の半導体装置の製造装置。
3. The surface of the resin-sealing heating stage is provided with irregularities such that the distribution of contact portions between the resin-sealing heating stage and the interposer substrate is closer to the center of the interposer substrate than to the side portions. 3. The apparatus for manufacturing a semiconductor device according to claim 2, wherein:
【請求項4】 樹脂封止用加熱ステージは、インターポ
ーザ基板のセンター部と接触する領域のみ加熱領域とし
たことを特徴とする請求項2記載の半導体装置の製造装
置。
4. The apparatus for manufacturing a semiconductor device according to claim 2, wherein the heating stage for resin sealing is a heating region only in a region in contact with a center portion of the interposer substrate.
【請求項5】 インターポーザ基板のサイド部と接触す
る樹脂封止用加熱ステージの領域を冷却領域としたこと
を特徴とする請求項4記載の半導体装置の製造装置。
5. The semiconductor device manufacturing apparatus according to claim 4, wherein a region of the resin-sealing heating stage that is in contact with the side portion of the interposer substrate is a cooling region.
【請求項6】 樹脂封止用加熱ステージは、インターポ
ーザ基板のセンター部のみを保持して加熱することを特
徴とする請求項2記載の半導体装置の製造装置。
6. The semiconductor device manufacturing apparatus according to claim 2, wherein the resin sealing heating stage holds and heats only the center portion of the interposer substrate.
JP10357154A 1998-12-16 1998-12-16 Semiconductor manufacturing device and method therefor Pending JP2000183081A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10357154A JP2000183081A (en) 1998-12-16 1998-12-16 Semiconductor manufacturing device and method therefor

Publications (1)

Publication Number Publication Date
JP2000183081A true JP2000183081A (en) 2000-06-30

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Family Applications (1)

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Country Link
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002359258A (en) * 2001-03-26 2002-12-13 Denso Corp Method for mounting electronic component
US6614106B2 (en) * 2000-09-27 2003-09-02 Kabushiki Kaisha Toshiba Stacked circuit device and method for evaluating an integrated circuit substrate using the stacked circuit device
JP2007005676A (en) * 2005-06-27 2007-01-11 Athlete Fa Kk Electronic component jointing equipment
JP2009206179A (en) * 2008-02-26 2009-09-10 Nec Electronics Corp Device and method for manufacturing semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6614106B2 (en) * 2000-09-27 2003-09-02 Kabushiki Kaisha Toshiba Stacked circuit device and method for evaluating an integrated circuit substrate using the stacked circuit device
JP2002359258A (en) * 2001-03-26 2002-12-13 Denso Corp Method for mounting electronic component
JP2007005676A (en) * 2005-06-27 2007-01-11 Athlete Fa Kk Electronic component jointing equipment
JP4733441B2 (en) * 2005-06-27 2011-07-27 アスリートFa株式会社 Electronic component joining equipment
JP2009206179A (en) * 2008-02-26 2009-09-10 Nec Electronics Corp Device and method for manufacturing semiconductor device

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