JP2000151398A - Charge pump - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a constant-current type charge pump which has small current consumption and a small dead zone. SOLUTION: This charge pump is reduced in current consumption, by setting the current values of constant current sources 10 and 11 below a specific value, when neither a rise indication signal nor fall indication signal is outputted and small currents are supplied to the constant current sources in advance to accumulates electric charges in the gate source capacitor between input-side transistors 8 and 9 of a current mirror circuit, thereby decreasing the delay time at the rise of output.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention mainly relates to a wireless communication device such as a cordless remote controller, a pager, and a portable telephone.
The present invention relates to a charge pump used in an LL frequency synthesizer.

[0002]

2. Description of the Related Art FIG. 6 is a circuit diagram showing a configuration of a conventional charge pump.

In FIG. 6, 1 is a phase comparator, 2 is a rising instruction signal input terminal, 3 is a falling instruction signal input terminal, 4 is a transistor for flowing current, 5 is a transistor for flowing current,
6 is a first switching transistor, 7 is a second switching transistor, 8 is an input transistor of a first current mirror circuit, 9 is an input transistor of a second current mirror circuit, and 10 is a first constant transistor. Current source, 1
1 is a second constant current source, 12 is an output terminal, 13 is an inverter, 14 is a main counter signal input terminal, 15 is a reference counter signal input terminal, and 16 is a power supply terminal.

The operation of the conventional charge pump will be described with reference to FIG. A VCO (Voltage Controlled Oscilla) is connected to the main counter signal input terminal 14 of the phase comparator 1.
A signal obtained by frequency-dividing the signal of (tor) by a predetermined frequency division number is input. The reference counter signal input terminal 15 receives a signal obtained by dividing a reference signal from a crystal oscillator or the like by a predetermined dividing number. The phase comparator 1 outputs a rising instruction signal or a falling instruction signal according to the relative phase difference between the two signals. When the rising instruction signal is output, the charge pump causes the current to flow out and charges the capacitor connected in parallel to the frequency control terminal of the VCO connected to the output terminal, thereby increasing the oscillation frequency of the VCO and instructing the falling. When a signal is output, the charge pump causes a current to flow and discharges the capacitor, thereby lowering the oscillation frequency of the VCO. The VCO frequency can be converged to a target frequency by continuously performing the above operation by forming a feedback loop. Such a feedback loop is called a PLL (Phase Locked Loop).

In FIG. 6, an input transistor 8 of a first current mirror circuit is connected to a first constant current source 10, and a current value is supplied to a current outflow transistor 4 serving as an output transistor of the current mirror circuit. Mirrored. Here, the operating current of the current outflow transistor 4 is a value determined by the current value of the first constant current source 10 and the ratio of the element size of the input side transistor 8 and the current outflow transistor 4 of the first current mirror circuit. . For example, if the current value of the first constant current source 10 is 100 μA and the element size ratio is 1:10, the operating current of the current outflow transistor 4 is 1.0 mA.

A first switching transistor 6 is connected between the source of the current flowing transistor 4 and the power supply terminal 16.
Is inserted, and the rising instruction signal input terminal 2 and the gate of the first switching transistor 6 are connected through the inverter 13.

[0007] The drain of the current flowing transistor 4 is connected to the output terminal 12. Similarly, the second constant current source 1
1 is connected to the input side transistor 9 of the second current mirror circuit, and the current value is mirrored to the current inflow transistor 5 serving as the output side transistor of the current mirror circuit. The second switching transistor 7 is inserted between the source of the current inflow transistor 5 and the ground, and the falling instruction signal input terminal 3 and the gate of the second switching transistor 7 are connected.

The drain of the current inflow transistor 5 is connected to the output terminal 12. It is assumed that the conventional charge pump shown here operates at Active High, and performs current outflow or inflow when the output of the phase comparator is at High level. When there is no output from the phase comparator 1, the first and second switching transistors 6, 7 are off, so that there is no current outflow or inflow from the output terminal 12. When there is an input from the phase comparator 1 to the rising instruction signal input terminal 2, the first switching transistor 6 is turned on via the inverter 13, and the output terminal 12 outputs a specified current value (1.0 mA in the above example). Current is drained. Further, when there is an input from the phase comparator 1 to the falling instruction signal input terminal 3, the second switching transistor 7 is turned on, and a current flows from the output terminal 12 with a specified current value.

[0009]

However, the conventional charge pump shown in the above-mentioned conventional example has a problem that the current consumption when there is no output from the phase comparator 1 is large. That is, there is a problem that the current is consumed even when the current does not flow out and in from the charge pump because the current always flows through the first and second constant current sources 10 and 11. In the above example, the outflow side and the inflow side are 100
μA is required, and a total of 200 μA is a reactive current. For this reason, it has been an obstacle to adopting the present invention to a device that requires low current consumption due to battery driving or the like.

Another method is to turn off the currents of the first and second constant current sources 10 and 11 when no current flows or flows in from the charge pump. In this case, for example, a switch for turning on and off the first and second constant current sources 10 and 11 of the conventional example shown in FIG. 6 is added. In this case, the current consumption can be reduced, but there is a problem in the output rising characteristics. In other words, the input-side transistor 8 of the first current mirror circuit when the first constant current source 10 is turned on due to the gate-source capacitance Cgs of the input-side transistor 8 of the first current mirror circuit shown in FIG. Is delayed at the rise of. That is, charging of the gate-source capacitance Cgs is performed by the first constant current source. Since the delay time is several nsec to several tens nsec, no current flows out of the output terminal 12 to the rising instruction signal having a small pulse width, so that no response occurs. The same applies to a descending instruction signal. That is, there is a problem that a dead zone occurs in the charge pump.

The present invention solves the above-mentioned problems, and
It is an object of the present invention to provide a charge pump that suppresses current consumption when there is no output from a phase comparator and has a small dead zone.

[0012]

According to the present invention, current consumption is suppressed by setting the current value of a constant current source to a value smaller than a predetermined value when a rising instruction signal and a falling instruction signal are not output. By supplying a small current to the constant current source to charge the gate-source capacitance of the input-side transistor of the current mirror circuit, the delay time at the time of rising of the output can be reduced.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A constant current type charge pump which performs current outflow and current inflow from an output terminal in response to a rising instruction signal and a falling instruction signal output from a phase comparator, comprising: a first constant current source; A first current mirror circuit, an operating current is set through the first current mirror circuit, and an output is connected to the output terminal; and a first transistor is inserted between the current flowing transistor and a power supply and is turned on in response to the rising instruction signal. A switching transistor, a current inflow transistor whose operating current is set from a second constant current source through a second current mirror circuit and whose output is connected to the output terminal, and a transistor inserted between the current inflow transistor and ground. A second switching transistor that is turned on in response to the falling instruction signal, and the rising instruction signal is not being output. First current setting means for making the current value of the first constant current source smaller than a predetermined value, and setting the current value of the second constant current source to a predetermined value when the descending instruction signal is not output. It has a second current setting means for making it smaller. In addition, current consumption when the ascending instruction signal and the descending instruction signal are not output can be suppressed, and the delay time when the ascending instruction signal and the descending instruction signal are output can be significantly reduced.

As a current setting means, a first switch and a first resistor are inserted in parallel between the source of the output-side transistor of the first current mirror circuit and the power supply or the ground, and the second current mirror circuit is connected to the first switch. A second switch and a second resistor are inserted in parallel between the source of the output-side transistor and the power supply or the ground,
The second switch is turned on in response to a rising instruction signal, and the second switch is turned on in response to a falling instruction signal, thereby reducing the operating current of the current mirror circuit when the rising signal or the falling signal is not output. Is what you do. And it can be constituted by a simple circuit using a small number of elements.

A first auxiliary transistor having a smaller element size than the output transistor of the first current mirror circuit is provided in parallel with the output transistor of the first current mirror circuit as current setting means. A second auxiliary transistor having a smaller element size than the output transistor of the second current mirror circuit is provided in parallel with the output transistor of the mirror circuit, and when the rising instruction signal is not output, the first current mirror circuit is provided. Of the second current mirror circuit is turned off when the descending instruction signal is not output, and the current mirror is turned off when the rising signal or the descending signal is not output. This is to reduce the operating current of the circuit. Then, the current accuracy when the current of the current mirror circuit is reduced can be improved.

A constant current type charge pump which performs current outflow and current inflow from an output terminal in response to a rising instruction signal and a falling instruction signal output from a phase comparator, wherein A current flowing transistor whose operating current is set through the current mirror circuit and whose output is connected to an output terminal; a first switching transistor inserted between the current flowing transistor and a power supply; a second constant current; An operating current set from a source through a second current mirror circuit, and an output connected to the output terminal; a second switching transistor inserted between the current flowing transistor and ground; A control circuit, wherein the control circuit controls the rising timing of a rising instruction signal output from a phase comparator. No. 1 constant current source is turned on, the first switching transistor is turned on at a timing when a first delay time has elapsed from the rising timing of the rising instruction signal, and the first delay time is calculated from the falling timing of the rising instruction signal. The first constant current source and the first switching transistor are turned off at a lapsed timing, and the control circuit further controls the second constant current source at a rising timing of a falling instruction signal output from the phase comparator. Is turned on and the second switching transistor is turned on at a timing when a second delay time has elapsed from the rising timing of the falling instruction signal, and at the timing when the second delay time has elapsed from the falling timing of the falling instruction signal. Turning off a second constant current source and the second switching transistor A. In addition, the dead zone can be eliminated even if the current source for driving the current outflow and current inflow transistors is turned off when the rise and fall instruction signals are not output in order to suppress the current consumption.

A constant current type charge pump which performs current outflow and current inflow from an output terminal in response to an ascending instruction signal and a descending instruction signal output from a phase comparator. A current flowing transistor whose operating current is set through the current mirror circuit and whose output is connected to an output terminal; a first switching transistor inserted between the current flowing transistor and a power supply; a second constant current; An operating current set from a source through a second current mirror circuit, and an output connected to the output terminal; a second switching transistor inserted between the current flowing transistor and ground; A control circuit, wherein the control circuit controls the rising timing of a rising instruction signal output from a phase comparator. The first constant current source from the rise timing of the first of said up indication signal set to a predetermined current first
The first switching transistor is turned on at the timing when the delay time has elapsed, and the first switching transistor is turned off at the timing when the first delay time has elapsed from the falling timing of the rising instruction signal, and the first switching transistor is turned off. Is set to a first small current that is smaller than the first predetermined current, and the control circuit further sets the second constant current at the rising timing of a falling instruction signal output from the phase comparator. The current source is set to a second predetermined current, the second switching transistor is turned on at a timing when a second delay time has elapsed from the rising timing of the falling instruction signal, and the second switching transistor is turned on at the falling timing of the falling instruction signal. The second switching transistor is turned off at the timing when the delay time of The second constant current source is for setting the second small-current is a small current than the second predetermined current. Since the delay time can be reduced, required delay element variation and temperature characteristics can be reduced.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 FIG. 1 is a circuit diagram showing a configuration of a charge pump according to Embodiment 1 of the present invention. In FIG. 1, 1 is a phase comparator, 2 is a rising instruction signal input terminal,
Reference numeral 3 denotes a falling instruction signal input terminal, 4 denotes a current outflow transistor, 5 denotes a current inflow transistor, 6 denotes a first switching transistor, 7 denotes a second switching transistor, and 8 denotes an input of a first current mirror circuit. A side transistor, 9 is an input transistor of the second current mirror circuit, 10 is a first constant current source, 11 is a second constant current source, 12 is an output terminal, 13 is an inverter, and 14 is a main counter signal input terminal. , 15 are a reference counter signal input terminal, 16 is a power supply terminal, 17 is first current setting means, and 18 is second current setting means.

The operation of the receiver according to this embodiment will be described with reference to FIG. A frequency-divided signal of the VCO signal is input to the main counter signal input terminal 14 of the phase comparator 1. The reference counter signal input terminal 15 receives a signal obtained by dividing a reference signal such as a crystal oscillator.
The phase comparator 1 outputs a rising instruction signal or a falling instruction signal according to a relative phase difference between the two signals.

The first constant current source 10 is connected to the input transistor 8 of the first current mirror circuit, and the current value is mirrored to the current outflow transistor 4 serving as the output transistor of the current mirror circuit. here,
The operating current of the current flowing transistor 4 is a value determined by the current value of the first constant current source 10 and the ratio of the element size of the input transistor 8 to the current flowing transistor 4 of the first current mirror circuit. As an example, the current value of the first constant current source 10 is 100 μA, and the element size ratio is 1: 1.
In the case of 0, the operating current of the current outflow transistor 4 is about 1.0 mA. Further, the input signal of the rising instruction signal input terminal 2 is input to the first current setting means 17. The first current setting means 17 sets the operating current of the first constant current source 10 small when the input signal is low. For example, 20μ
Set to A. When the input signal is high, the operating current of the first constant current source 10 is set to a specified value. For example, 100
Set to μA.

A first switching transistor 6 is connected between the source of the current flowing transistor 4 and the power supply terminal 16.
Is inserted, and the rising instruction signal input terminal 2 and the gate of the first switching transistor 6 are connected through the inverter 13.

The drain of the current flowing transistor 4 is connected to the output terminal 12. Similarly, the second constant current source 1
1 is connected to the input side transistor 9 of the second current mirror circuit, and the current value is mirrored to the current inflow transistor 5 serving as the output side transistor of the current mirror circuit. Further, the input signal of the descending instruction signal input terminal 3 is input to the second current setting means 18. The second current setting means includes a second constant current source 1 when the input signal is low.
The operating current of No. 1 is set small. For example, set to 20 μA. When the input signal is high, the first constant current source 11
Set the operating current at the specified value. For example, it is set to 100 μA.

A second switching transistor 7 is inserted between the source of the current inflow transistor 5 and the ground, and the falling instruction signal input terminal 3 and the gate of the second switching transistor 7 are connected.

The drain of the current flowing transistor 4 is connected to the output terminal. The charge pump of this embodiment is
It operates at Active High, and the output of phase comparator 1 is Hig
Current shall flow out or flow in at the time of the h level.
When there is no output from the phase comparator 1, the first and second switching transistors 6, 7 are off, so that there is no outflow or inflow of current from the output terminal 12. However, as described above, the first and second constant current sources 10, 1
1 has a current (20 μA) smaller than the specified current (100 μA).
A) is flowing. At this time, since the same small current flows through the input side transistors 8 and 9 of the first and second current mirror circuits, they are not turned off. Therefore, the gate-source voltages of the input-side transistors 8 and 9 of the first and second current mirror circuits are close to the threshold voltage VT. That is, the charge corresponding to a voltage close to VT has already been charged in the gate-source capacitance Cgs of the input-side transistor 8 of the first current mirror circuit. Next, when there is an input from the phase comparator 1 to the rising instruction signal input terminal 2, the first switching transistor 6 is turned on via the inverter 13, and the first constant current is set by the first current setting means 17. Current source 10
Is set to the specified value (100 μA), a specified current value (1.0 mA) flows out of the output terminal 12.
At this time, since the gate-source capacitance Cgs has been charged in advance, the change in the gate potential of the input-side transistor 8 of the first current mirror circuit is small. Therefore, the time required to reach the specified current value (1.0 mA), that is, the delay time is reduced. The same can be considered when there is an input from the phase comparator 1 to the descending instruction signal input terminal 3, and the delay time is similarly reduced.

As described above, according to the present embodiment, the current consumption when the rising instruction signal and the falling instruction signal are not output can be reduced to several tenths to several tenths.
In addition, the rise time of the output current when the rise and fall instruction signals are output can be shortened.

(Embodiment 2) FIG. 2 is a circuit diagram showing a configuration of a charge pump according to Embodiment 2 of the present invention. In FIG. 2, 19 is an output transistor of the first current mirror circuit, 20 is an output transistor of the second current mirror circuit, 21 is the first resistor, 22 is the second resistor,
3 is a first switch, and 24 is a second switch. The same components as those in FIG. 1 are denoted by the same reference numerals. The operation of the present embodiment is basically the same as the operation of the first embodiment, but the current setting means is configured using first and second resistors and first and second switches. It is characteristic.

The first constant current source 10 is mirrored via the input side transistor 8 and the output side transistor 19 of the first current mirror circuit, and drives the current outflow transistor 4. Here, a first resistor and a first switch are inserted in parallel between the source of the output transistor 19 of the first current mirror circuit and the ground. Further, the second constant current source 11 is mirrored via the input side transistor 9 and the output side transistor 20 of the second current mirror circuit, and the current inflow transistor 5
Drive. Here, a second resistor and a second switch are inserted in parallel between the source of the output-side transistor 20 of the second current mirror circuit and the ground.

When there is no output from the phase comparator 1, the first
And the second switching transistors 6 and 7 are off. Also, the first and second switches 23,
24 is off. At this time, current flows through the first and second resistors 21 and 22, and a voltage drop occurs. Then, compared to when the first and second switches are on, the first
And the gate-source voltage of the output transistors 19 and 20 of the second current mirror circuit is reduced.
The current flowing through the output transistors 19 and 20 of the first and second current mirror circuits decreases. Here, by appropriately selecting the values of the first and second resistors 21 and 22, the current when the first and second switches 23 and 24 are off can be set to a desired value. For example, first and second
It is possible to select the resistance value so that the switches 23 and 24 are 100 μA when turned on and 20 μA when turned off.

As described above, according to the present embodiment, the current setting means can be realized by a simple circuit such as a resistor and a switch, and the same effects as described in the first embodiment can be obtained.

(Embodiment 3) FIG. 3 is a circuit diagram showing a configuration of a charge pump according to Embodiment 3 of the present invention. In FIG. 3, 25 is a first auxiliary transistor, and 26 is a second auxiliary output side transistor. The same components as those in FIG. 2 are denoted by the same reference numerals. The operation of the present embodiment is basically the same as the operation of the first embodiment, but the current setting means is changed to the first and second auxiliary transistors 25,
It is characterized in that it is configured by using H.26.

The first constant current source 10 is mirrored via the input side transistor 8 and the output side transistor 19 of the first current mirror circuit, and drives the current outflow transistor 4. Here, the first auxiliary transistor 2 is connected in parallel with the output transistor 19 of the first current mirror circuit.
5 are configured. And the first auxiliary transistor 2
The drain of the transistor 5 is connected to the drain of the output transistor 19 of the first current mirror circuit, and the source of the first auxiliary transistor 25 is connected to the ground. The output transistor 1 of the first current mirror circuit
The first switch 23 is inserted between the source 9 and the ground.

The second constant current source 11 is mirrored via the input transistor 9 and the output transistor 20 of the second current mirror circuit, and drives the current inflow transistor 5. Here, the second auxiliary transistor 2
6 is connected to the drain of the output transistor 20 of the second current mirror circuit, and the source of the second auxiliary transistor 26 is connected to the power supply terminal 16.
In addition, a second switch 24 is inserted between the source of the output transistor 20 of the second current mirror circuit and the ground.

When there is no output from the phase comparator 1, the first
And the second switches 23 and 24 are off,
Therefore, no current flows through the output transistors 19 and 20 of the first and second current mirror circuits, and current flows only through the first and second auxiliary transistors 25 and 26. Since the current values of the first and second auxiliary transistors 25 and 26 are determined by the ratio of the element sizes of the first and second input-side transistors 8 and 9, the current values of the first and second auxiliary transistors 25 and 26 are different. The current value can be set small by reducing the size.

As described above, according to this embodiment, since the auxiliary transistor is formed of the same type of transistor as the other transistors forming the current mirror circuit, the accuracy of the current value when the current value is reduced is improved. be able to. It is also advantageous for temperature characteristics and element variations. The same effect as described in the first embodiment can be obtained.

(Embodiment 4) FIG. 4 is a circuit diagram showing a configuration of a charge pump according to Embodiment 4 of the present invention. In FIG. 4, reference numeral 27 denotes a control circuit. The same components as those in FIG. 2 are denoted by the same reference numerals. The difference between this embodiment and the second embodiment is that a control circuit 27 is used.

An ascending instruction signal and a descending instruction signal are input from the phase comparator 1 to the control circuit 27 via an ascending instruction signal input terminal 2 and a descending instruction signal input terminal 3, respectively. The control circuit 27 is inserted between the source and the ground or between the source and the power supply terminal 16 of the first and second switching transistors 6 and 7 and the output transistors 19 and 20 of the first and second current mirror circuits. The operation timing of the first and second switches 23 and 24 is controlled.

The operation timing of the control circuit 27 will be specifically described with reference to FIG.

FIG. 5 shows the operation when the ascending instruction signal is output. However, the case where the descending instruction signal is output can be similarly considered.

In FIG. 5, a signal (2) a first switching transistor control signal, which is delayed by a first delay time with respect to the “(1) rising instruction signal” input to the control circuit 27, is output. The first switching transistor 6 is generated and output to the inverter 13 to drive the first switching transistor 6.

Further, the signal is set at the rising edge of "(1) rising instruction signal" and is reset at the falling edge of "(2) the control signal for the first switching transistor". A control signal of the constant current source is generated. This “(3) control signal of first current mirror circuit” drives first switch 23,
The current of the output transistor 20 of the first current mirror circuit is set to a specified value.

Here, the first delay time is set to be longer than the current rise time of the output side transistor 20 of the first current mirror circuit. That is, in the current rising characteristic shown in "(4) Current value of first current mirror circuit" in FIG. 5, the first delay time is given only for the time required for the current to sufficiently rise. Since the first switching transistor 6 is turned on by "(2) control signal for the first switching transistor" after sufficiently rising, "(5) current outflow value of output terminal"
As shown in the figure, the output pulse width from the output terminal 12 is "
(1) The pulse width is the same as the pulse width of the rising instruction signal ". This can prevent the dead zone of the charge pump from being generated.

As described above, according to this embodiment, since the current outflow and inflow transistors and their driving circuits are completely turned on, the first and second switching transistors are turned on and off, so that the dead zone of the charge pump is generated. Can be prevented. As in the other embodiments, it is possible to suppress the current consumption when the rise and fall instruction signals are not output.

The signal delay operation can be realized by cascade connection of inverter circuits. In FIG. 5, "(3)
The control signal "for the first current mirror circuit" can be easily generated by a logic circuit in which flip-flops and the like are combined.

In this embodiment, the operation of suppressing the current when the rise and fall instruction signals are not output is performed by controlling the current mirror circuit. However, the operation may be performed by directly controlling the constant current source. it can.

Although two constant current sources are used, a configuration may be employed in which one constant current source is branched by a current mirror circuit.

Further, in the present embodiment, the current of the current mirror circuit is set to be small when the rise and fall instruction signals are not output, but the current may be turned off.

In FIG. 1, the source of the current flowing transistor 4 and the source of the current flowing transistor 5 may be connected.

In this embodiment, the transistor is F
Although the case where the ET is used has been described, a configuration using a bipolar transistor or the like is also possible.

[0050]

As apparent from the above description, the charge pump of the present invention has the following effects.

When the rising instruction signal and the falling instruction signal are not output, the current of the constant current source is set small, so that the current consumption can be reduced to several tenths to several tenths. In addition, the rise time of the output current when the falling instruction signal is output can be shortened.

Since the current setting means is composed of a resistor and a switch, the current setting means can be constituted by a simple circuit.

Further, since the current setting means is formed by using the auxiliary transistor, the accuracy of the current value when the current value is reduced can be improved, which is advantageous for temperature characteristics and element variations.

Further, since the first and second switching transistors are turned on and off after the current outflow and inflow transistors and their driving circuits have completely started up, the dead zone of the charge pump can be prevented more reliably. .

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a charge pump according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a charge pump according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a charge pump according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a charge pump according to a fourth embodiment of the present invention.

FIG. 5 is a timing chart showing control signals of a control circuit in the pump.

FIG. 6 is a circuit diagram of a conventional charge pump.

[Explanation of symbols]

 2 rising instruction signal input terminal 3 falling instruction signal input terminal 4 current outflow transistor 5 current inflow transistor 6 first switching transistor 7 second switching transistor 8 input transistor of first current mirror circuit 9 second Input transistor of current mirror circuit 10 First constant current source 11 Second constant current source 12 Output terminal 17 First current setting means 18 Second current setting means 19 Output transistor of first current mirror circuit Reference Signs List 20 output transistor of second current mirror circuit 21 first resistor 22 second resistor 23 first switch 24 second switch 25 first auxiliary transistor 26 second auxiliary transistor 27 control circuit

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hideo Taniuchi 1-1, Komachi, Takatsuki-shi, Osaka Matsushita Electronics Co., Ltd. F-term (reference) 5J106 AA04 BB01 BB10 CC24 EE03 EE19 GG15 GG17 HH03 JJ08 KK02 KK05 KK13 KK39 KK40 LL00

Claims (5)

[Claims] 1. A constant current type charge pump which performs current outflow and current inflow from an output terminal in response to a rising instruction signal and a falling instruction signal output from a phase comparator, respectively. A current flowing transistor whose operating current is set through one current mirror circuit and whose output is connected to an output terminal; and a first switching transistor inserted between the current flowing transistor and a power supply and turned on in response to the rising instruction signal. A transistor, a current inflow transistor whose operating current is set from a second constant current source through a second current mirror circuit and whose output is connected to the output terminal; A second switching transistor that is turned on in response to an instruction signal, and when the rising instruction signal is not output, A first current setting means for reducing a current value of the first constant current source to be smaller than a predetermined value; and a current value of the second constant current source being smaller than a predetermined value when the descending instruction signal is not output. A charge pump provided with a second current setting means. 2. A first switch and a first resistor are inserted in parallel between a source of an output transistor of a first current mirror circuit and a power supply or a ground as current setting means. A second switch and a second resistor are inserted in parallel between the source of the output-side transistor and the power supply or the ground, the first switch is turned on in response to the rising instruction signal, and the second switch is turned down in response to the rising instruction signal. 2. The charge pump according to claim 1, wherein the operation current of the current mirror circuit is reduced when the rise signal or the fall signal is not output by turning on in response to the signal. 3. A first auxiliary transistor having a smaller element size than an output transistor of the first current mirror circuit is provided in parallel with an output transistor of the first current mirror circuit as current setting means. A second auxiliary transistor having a smaller element size than the output transistor of the second current mirror circuit is provided in parallel with the output transistor of the mirror circuit, and when the rising instruction signal is not output, the first current mirror circuit is provided. Of the second current mirror circuit is turned off when the descending instruction signal is not output, and the current mirror is turned off when the rising signal or the descending signal is not output. 2. The charge pump according to claim 1, wherein the operation current of the circuit is reduced. 4. A constant current type charge pump which performs current outflow and current inflow from an output terminal in response to a rising instruction signal and a falling instruction signal output from a phase comparator, respectively. A current flowing transistor whose operating current is set through the current mirror circuit and whose output is connected to an output terminal; a first switching transistor inserted between the current flowing transistor and a power supply; a second constant current; An operating current set from a source through a second current mirror circuit, and an output connected to the output terminal; a second switching transistor inserted between the current flowing transistor and ground; And the control circuit is configured to control the first control signal at a rising timing of a rising instruction signal output from a phase comparator. A timing in which the current source is turned on and the first switching transistor is turned on at a timing when a first delay time has elapsed from the rising timing of the rising instruction signal, and the first delay time has elapsed from the falling timing of the rising instruction signal. Turns off the first constant current source and the first switching transistor, and further, the control circuit turns on the second constant current source at a rising timing of a falling instruction signal output from the phase comparator. The second switching transistor is turned on at a timing when a second delay time has elapsed from the rising timing of the falling instruction signal, and the second switching transistor is turned on at a timing when the second delay time has elapsed from the falling timing of the falling instruction signal. A charge port for turning off the constant current source and the second switching transistor. Flop. 5. A constant current type charge pump for performing current outflow and current inflow from an output terminal in response to a rising instruction signal and a falling instruction signal output from a phase comparator, respectively. A current flowing transistor whose operating current is set through the current mirror circuit and whose output is connected to an output terminal; a first switching transistor inserted between the current flowing transistor and a power supply; a second constant current; An operating current set from a source through a second current mirror circuit, and an output connected to the output terminal; a second switching transistor inserted between the current flowing transistor and ground; And the control circuit is configured to control the first control signal at a rising timing of a rising instruction signal output from a phase comparator. The current source is set to a first predetermined current, the first switching transistor is turned on at a timing when a first delay time has elapsed from the rising timing of the rising instruction signal, and the first switching transistor is turned on at the falling timing of the rising instruction signal. The first switching transistor is turned off at the timing when the delay time has elapsed, and the first constant current source is set to a first small current that is a current smaller than the first predetermined current. Sets the second constant current source to a second predetermined current at the rising timing of the falling instruction signal output from the phase comparator, and sets the second constant current source to the second timing from the rising timing of the falling instruction signal.
The second switching transistor is turned on at the timing when the delay time has elapsed, and the second switching transistor is turned off at the timing when the second delay time has elapsed from the falling timing of the falling instruction signal, and the second switching transistor is turned off. A constant current source set to a second small current that is smaller than the second predetermined current.