JP2000138347A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, where a high breakdown voltage polysilicon capacitor can be enhanced in breakdown voltage, without varying a low breakdown voltage transistor in electrical properties. SOLUTION: A semiconductor device mounted with both a high breakdown voltage device and a low breakdown voltage device is manufactured in a manner in which a polysilicon film 3 which serves as the lower electrode of a high breakdown voltage polysilicon capacitor is formed on the entire surface, arsenic ions that have larger mass than that of phosphorus ions are implanted in the polysilicon film 3 to turn it electrically conductive, then the polysilicon film 3 is selectively removed to serve as the lower electrode 5, and the surface of the lower electrode 5 is oxidized to form both a capacitor insulating film 6 and a gate oxide film 7 of a low breakdown voltage transistor at the same time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a high withstand voltage polysilicon capacitor and a low withstand voltage transistor are formed on the same semiconductor substrate.

[0002]

2. Description of the Related Art Among general semiconductor integrated circuits, in a device such as a liquid crystal driver, a high withstand voltage element driven by an applied voltage of several tens to several hundreds of volts on the same semiconductor substrate, for example, a high withstand voltage polysilicon capacitor And a high-voltage MOS transistor, and a low-voltage element (MOS transistor) driven at a low voltage such as a normal 5 V or 3.3 V in many cases.

The following method is known as a method for manufacturing a semiconductor device having a high-breakdown-voltage polysilicon capacitor and a high-breakdown-voltage and low-voltage driving transistor (hereinafter referred to as a low-breakdown-voltage transistor) mounted on the same semiconductor substrate. The conventional manufacturing method will be described below with reference to the drawings.

FIG. 2 is an explanatory view of a manufacturing process in a conventional method of manufacturing a semiconductor device. Each manufacturing method of a semiconductor device in which a high breakdown voltage and a low breakdown voltage N-channel MOS transistor and a high breakdown voltage polysilicon capacitor are formed on the same substrate. 4 shows a cross-sectional structure in a process.

First, as shown in FIG. 2A, an element such as a transistor is formed on a p-type semiconductor substrate 10 by LOCOS.
A thick field oxide film 11 which is electrically separated by a method or the like is formed. Next, the gate oxide film 12 of the high voltage MOS transistor was formed by thermal oxidation, and the first polysilicon film 13 for forming the gate electrode of the high voltage MOS transistor and the lower electrode of the high voltage polysilicon capacitor was formed. Thereafter, phosphorus doping is performed to reduce the electrical resistance of the polysilicon film. Next, as shown in FIG. 2B, the deposited first polysilicon film 13 is etched to form a gate electrode 14 'and a lower electrode 14 of a polysilicon capacitance portion. 12 is removed to expose the surface of the semiconductor substrate 10.

Next, as shown in FIG. 2C, a gate oxide film 16 of the low breakdown voltage transistor is formed. At this time, a capacitance insulation film 15 having a high breakdown voltage polysilicon capacitance is formed simultaneously by thermal oxidation. . In this step, the oxide film on the polysilicon surface is grown to a thickness two to three times as large as the gate oxide film 16, and a second polysilicon film 17 is deposited on the insulating films 15 and 16. Further, as shown in FIG. 2D, an upper electrode 18 of a high-breakdown-voltage polysilicon capacitor and a gate electrode 18 'of a low-breakdown-voltage transistor are formed, and the gate electrodes 14' and 18 'are used as masks in the semiconductor substrate 10. Then, an N-type source / drain diffusion layer 19 is formed. Subsequent steps are completed by forming a high-voltage polysilicon capacitor, a low-voltage transistor, and an interlayer insulating film on the high-voltage transistor and a wiring layer via the high-voltage transistor, though not shown, by a general CMOS process.

[0007]

However, in such a conventional method of manufacturing a semiconductor device, in order to further improve the breakdown voltage of the high-breakdown-voltage polysilicon capacitor, the film of the capacitor insulating film 15 having the high-breakdown-voltage polysilicon capacitor is formed. When the thickness is increased, the thickness of the gate oxide film 16 of the low-breakdown-voltage transistor also increases, and the electrical characteristics of the low-breakdown-voltage transistor may not be as designed.

The present invention solves the above-mentioned conventional problems, and provides a method of manufacturing a semiconductor device capable of improving the breakdown voltage of a high breakdown voltage polysilicon capacitor without changing the electrical characteristics of a low breakdown voltage transistor section. The purpose is to provide.

[0009]

According to a method of manufacturing a semiconductor device of the present invention, an insulating film is formed in a predetermined region on one main surface of a semiconductor substrate, and an insulating film is formed on the entire surface of the semiconductor substrate including on the insulating film. A step of forming a semiconductor film, and a step of implanting ions of an element having a larger mass than phosphorus into the semiconductor film,
Selectively removing the semiconductor film to form a first electrode on the insulating film; oxidizing at least the first electrode surface and the semiconductor substrate surface to form an oxide film; A step of forming a second electrode on the oxide film in the first electrode region; and a step of forming a third electrode on the oxide film in the semiconductor substrate region.

According to the present invention, it is possible to selectively increase the oxidation rate of the insulating film of the high-breakdown-voltage polysilicon capacitor portion without changing the electrical characteristics of the low-breakdown-voltage transistor portion, thereby improving the breakdown voltage of the polysilicon capacitor. it can.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is an explanatory view of a manufacturing process in an embodiment of a method of manufacturing a semiconductor device according to the present invention. As in the above-mentioned conventional example, a high-voltage polysilicon capacitor, a high-voltage MOS transistor and a low-voltage MOS transistor are simultaneously used. 2 shows a cross-sectional structure in each manufacturing process of a mounted semiconductor device.

First, as shown in FIG. 1A, a field oxide film 2 for element isolation is formed on a p-type semiconductor substrate 1, and a high breakdown voltage N channel M is formed on another portion of the semiconductor substrate 1.
The gate oxide film 4 of the OS transistor is grown. Further, after forming a first polysilicon film 3 on the entire surface including the field oxide film 2, arsenic ion implantation is performed to reduce the electrical resistance of the polysilicon. The injection condition at this time is 40 ke
V 5 × 10 ¹⁵ cm ² .

Next, as shown in FIG. 1B, the first polysilicon film 3 is etched, a lower electrode 5 having a high withstand voltage polysilicon capacitance is formed on the field oxide film, and a gate oxide film 4 is formed on the field oxide film. Then, a gate electrode 5 'of a high voltage MOS transistor is formed, and the gate oxide film 4 is removed using the gate electrode 5' as a mask to expose the surface of the semiconductor substrate 1.

Then, as shown in FIG. 1C, the gate oxide film 7 of the low breakdown voltage transistor and the capacitance insulation film 6 of the high breakdown voltage polysilicon capacitor are simultaneously formed by thermal oxidation. At this time, the insulating film of the polysilicon capacitor can be grown to about four times the thickness of the gate oxide film 7 by implanting arsenic ions into the polysilicon. Thereafter, a second polysilicon film 8 is formed on the entire surface.

Next, as shown in FIG. 1D, the second polysilicon film 8 is etched to form an upper electrode 8 'having a high withstand voltage polysilicon capacitance, and at the same time, a gate electrode 8 "of a low withstand voltage MOS transistor. To form By using these as masks, extra portions of the capacitor insulating film 6 and the gate oxide film 7 are etched to complete the polysilicon capacitor structure and the gate structure. Although the thickness of the capacitor insulating film 6 and the thickness of the gate oxide film 7 are different, when these oxide films are etched, the semiconductor substrate 1 usually has a sufficient etching selectivity with the underlying semiconductor substrate 1, so that the semiconductor substrate 1 is significantly etched. There is no.

Thereafter, an interlayer insulating film and a wiring layer are formed on a high-breakdown-voltage polysilicon capacitor and a high-breakdown-voltage and low-breakdown-voltage MOS transistor by a general CMOS process to complete the process.

This embodiment is characterized in that arsenic ions having a larger mass than the conventional phosphorus ions are implanted into the surface of the first polysilicon film 3. When the ions having the larger mass are implanted, More defects are generated in the surface layer of the first polysilicon film 3, and the first polysilicon film 3 is almost in an amorphous state with the above-described implantation amount. Also, due to the large mass, the implantation depth becomes extremely shallow, and a state with a higher impurity concentration in the thin surface layer can be created. These two factors cause accelerated thermal oxidation, so that a thicker oxide film can be formed even under the same thermal oxidation conditions as before. At this time, needless to say, the thickness of the gate oxide film 7 does not change.

As described above, according to this embodiment, when forming the insulating film of the high-breakdown-voltage polysilicon capacitor simultaneously with the gate oxide film of the low-breakdown-voltage transistor, the electric resistance of the first polysilicon film is reduced. Larger process than phosphorus,
For example, by performing arsenic ion implantation, it is possible to increase the thickness of the oxide film grown on the polysilicon film without affecting the others, as compared with the case where the arsenic ion implantation is performed. The breakdown voltage can be improved without changing the electrical characteristics of the low breakdown voltage transistor.

In the above embodiment, arsenic ions are used as implanted ions. However, antimony is effective as N-type, and gallium ions are effective if P-type is used. In addition to the impurity ions, silicon gas, inert gas ions such as xenon and krypton ions, which are larger in mass than phosphorus, can also be used. However, when these ions are used, it is necessary to concurrently use impurity implantation for determining the conductivity type in order to reduce the electric resistance of the polysilicon film.

[0021]

As described above, according to the present invention, the step of reducing the electric resistance of the first polysilicon film when forming the insulating film of the high withstand voltage polysilicon capacitor portion simultaneously with the gate oxide film of the low withstand voltage transistor. Is performed by ion implantation of an element having a larger mass than phosphorus, the thickness of the oxide film grown on the polysilicon film can be made larger than that of the conventional method by phosphorus doping. The advantageous effect that the withstand voltage of the capacitor can be improved without changing the electrical characteristics of the low withstand voltage transistor is obtained.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a manufacturing process in a semiconductor device manufacturing method according to an embodiment of the present invention;

FIG. 2 is an explanatory view of a manufacturing process in a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 p-type semiconductor substrate 2 field oxide film 3 first polysilicon film 4 gate oxide film 5 lower electrode of polysilicon capacitance 5 ′ gate electrode 6 capacitance oxide film 7 gate oxide film 8 second polysilicon film 8 ′ polysilicon Top electrode of capacitance 8 '' Gate electrode 9 Source / drain

Claims (1)

[Claims] A step of forming an insulating film in a predetermined region on one main surface of the semiconductor substrate; a step of forming a semiconductor film on the entire surface of the semiconductor substrate including on the insulating film; Implanting elemental ions having a larger mass than the above, selectively removing the semiconductor film to form a first electrode on the insulating film, at least the first electrode surface and the semiconductor substrate surface Forming an oxide film, forming a second electrode on the oxide film on the first electrode region, and forming a third electrode on the oxide film in the semiconductor substrate region. A method for manufacturing a semiconductor device, comprising a step of forming.