JP2000112435A - Driving method for display device, display device and electronic instrument - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make a display have interest and creativity while keeping a low power consumption property by changing at least one of the position, the area or the display content of a partial area to be a display state at certain time intervals. SOLUTION: In the whole screen enclosed with a full line, the inner side D of a broken line indicates a display state and the outer side of the line indicates a non-display state. Then, a display is successively changed over from (a) to (b), (b) to (c), (c) to (d), (d) to (e) of the figure at certain time intervals. These changeover time intervals may be constant or may be changed properly. In this case, a display content (pattern) is changed over so that a fish is successively moved from the left side of a screen to the right side of the screen. Moreover, it may be performed to change over only the number of display rows or the display content by fixing the row of the end part of the area of the partial display area D at a prescribed row. That is, it is also acceptable to successively change the row of the row end of the lower side (the lowermost scanning line of D) while making the row end of the upper side of the area D (the uppermost scanning line of D) always a fixed row.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a dot matrix type display device in which only a partial area of a screen is displayed and other areas are not displayed, a display apparatus and an electronic device using the same. Equipment related.

[0002]

2. Description of the Related Art The number of display dots of a display device used in a portable electronic device such as a cellular phone has been increasing year by year so that more information can be displayed, and accordingly, the power consumption of the display device is also increasing. It is increasing. Since the power supply of the portable electronic device is a battery, it is strongly required that the power consumption be low so that the battery life can be extended.

For this reason, in a display device having a large number of display dots, the entire screen is set to the display state when necessary, but in a normal state, only a part of the display panel is set to the display state so that the necessary minimum display can be performed. A method of reducing power consumption by setting other regions in a non-display state has begun to be studied.

[0004] A few to several tens of marks called icons are arranged outside the display section composed of a dot matrix, and only the icon portion is displayed in a normal state, and the dot matrix portion is set to a non-display state. Display devices that have been reduced are already on the market. However, since the contents that can be partially displayed are already fixed at the stage of the display panel, the display device has poor versatility and lacks interest.

Many conventional dot matrix display devices have a function of controlling display / non-display of the entire screen. However, only a part of the area within the dot matrix screen is displayed, and the other parts are displayed. The one having the function of hiding the display has not been put to practical use yet. Japanese Patent Laid-Open Publication No. Hei 6 (1994) -171605 discloses a method for realizing a function of setting a partial area of a liquid crystal display panel to a display state and a non-display state to another area.
-95621 Example 1 and JP-A-7-28163
No. 2 has been proposed. These two conventional examples both describe a case where the liquid crystal display panel is of a simple matrix type.

The embodiment of Japanese Patent Application Laid-Open No. 6-95621 will be described below with reference to FIG. FIG. 8 is a block diagram of the liquid crystal display device of this embodiment. A block 31 is a liquid crystal display panel (LCD panel), in which a substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed are opposed to each other at an interval of several μm, and liquid crystal is sealed in the gap. Have been. A block 34 is a Y driver that outputs a selection voltage or a non-selection voltage to drive the scan electrodes, and a block 35 is an X driver that outputs a signal voltage based on the display data Dn to drive the signal electrodes. A plurality of voltage levels required for driving the liquid crystal are formed by a drive voltage forming circuit of a block 33 and applied to the liquid crystal display panel 31 via an X driver 35 and a Y driver 34. Block 37 is a scanning control circuit for controlling the number of scanning electrodes to be scanned. Block 3
Reference numeral 2 denotes an LCD controller that generates signals necessary for those circuits. Block 36 is the power supply for the above circuits and generates voltages of + 5V and -24V. A selection voltage is sequentially applied to the scanning electrodes one row at a time, and a non-selection voltage is applied to the other rows. A signal voltage according to ON / OFF of each pixel of the selected row is sequentially applied to the signal electrode.

Here, FRM is a screen scanning start signal, CL
Y is a scanning signal transfer clock for shifting the FRM every clock, CLX is a display data Dn transfer clock,
LP is a clock for latching the transferred display data to the X driver for each row, and PD is a control signal for partial display.

In this embodiment, the partial display area has a left half screen (D
1, D2) and the upper half (D1) thereof. First, the case where the partial display area is the left half screen will be described. 640 pixels per row
And Before shifting to the partial display state of the left half screen, data in which all pixels for one row are off is written to the X driver. After that, the LCD controller doubles the cycle of the display data transfer clock CLX to halve the number of clocks in one selection period, and adjusts the number of clocks to 32
Only display data for 0 pixels is transferred. Since the X driver has a built-in circuit for storing one line of display data, even if there is no data transfer for 320 pixels on the right half screen, X driver
The right half of the driver continues to store the previously transferred OFF data, and the output of the right half of the X driver continues to output a signal voltage for turning off the display. Thus, the right half screen can be turned off. Since the frequency of CLX is halved and half of the screen is turned off, the power consumption of the display device is slightly reduced as compared with the case of the full screen display state. In this case, the right half screen is more appropriately referred to as the off display state than the non-display state.

Next, a case where the partial display area is only the upper half (D1) of the left half screen will be described. The number of scanning electrodes is 400. First, only the left half screen is displayed by the method described above. Subsequently, the LCD controller 32 sets the partial display control signal PD to the “H” level to set the lower half in a non-display state. When the PD is at the "L" level, the entire screen is displayed by scanning all the scanning electrodes at 1/400 duty. When the PD is at the "H" level, only the upper half of the scanning electrodes are set to 1 By scanning at a duty of / 200, a partial display state is achieved in which the upper half screen (D1) is displayed and the remaining lower half screen (D2) is not displayed.

The switching to the 1/200 duty is performed by changing the cycle of the scanning signal transfer clock CLY to twice, and
This is performed by halving the number of clocks in the frame period. Although the details of the method of stopping scanning of the scanning electrodes in the lower half screen in the partial display state are not described, judging from the internal circuit diagram of the scanning control circuit block 37, when PD is set to “H” level, the shift register in the Y driver is shifted. The data to be transferred from the 200th stage to the 201st stage is fixed at the “L” level.
The 400th output keeps the non-select voltage level.

The on / off state of a pixel is determined by the effective value of the voltage applied to the liquid crystal. The effective voltage applied to the liquid crystal in the lower half screen is 右上 of the upper right because no selection voltage is applied to the scanning electrodes.
The voltage is considerably smaller than the effective voltage applied to the liquid crystal in the off display state of the screen, and as a result, the lower half screen is completely hidden.

In a simple matrix type liquid crystal display panel, it is necessary to change the setting of the drive voltage and the bias ratio (drive voltage division ratio) so that the contrast of the display area does not deteriorate when the display duty is switched.
When the duty is 1 / N, the preferable bias ratio is 1
/ (1 + ΔN) is disclosed in Japanese Patent Publication No. 57-57718. Further, when N >> 1, it is necessary to adjust the drive voltage substantially in proportion to ΔN. For example, if the optimum drive voltage in the case of 1/400 duty is 28 V and the optimum bias ratio is 1/21, then 1
In the case of / 200 duty, the driving voltage is 28 V / √2
It is necessary to adjust the bias ratio to about {fraction (20)} V and about 1/15. Such adjustment of the voltage and the voltage division ratio is performed by hardware circuit means. Since the half screen is in the non-display state and the driving voltage is reduced, the power consumption of the display device is considerably reduced as compared with the case of the full screen display state.

When the number of partial display rows is quite small, about tens of rows to about 20 rows, if the duty is changed accordingly, the preferable bias ratio becomes 1/3 or 1/4. Japanese Patent Application Laid-Open No. 7-281632 describes a bias ratio and drive voltage switching means in such a case in an embodiment, but the description thereof is omitted here.

[0014]

According to the above-mentioned method, a function of setting only a partial area of a display panel formed of a dot matrix to a display state and setting other areas to a non-display state is provided. It is possible. However,
The necessity of switching the clock cycle, the bias ratio, and the drive voltage in accordance with the partial display area is because the area that can be partially displayed is limited only to the setting prepared by the hardware circuit. In addition, the versatility is extremely poor, and at the same time, there is a disadvantage that the display cannot be made interesting by changing the position and area of the partial display area at certain time intervals.

Therefore, the present invention uses a highly versatile display device in which a partial display area can be set in a software manner, while maintaining low power consumption by partial display and giving the display an interestingness and originality. It is an object of the present invention to provide a display device driving method, a display device, and an electronic device that can be performed.

[0016]

In order to solve the above-mentioned problems, a display device and a driving method of the present invention have a function of setting a partial area in a screen to a display state and setting another area to a non-display state. In a matrix type display device, at least one of the position, the area, or the display content of the partial region to be displayed is changed at a certain time interval. By doing so, it is possible to keep the display interesting and original while maintaining the low power consumption by the partial display.

Further, in the display device and the method of driving the same according to the present invention, the partial area is an area corresponding to a part of all the scanning lines. By making the area corresponding to the scanning line a partial display, the power consumption is significantly reduced as compared with the full screen display, and the interestingness and originality at the time of the partial display can be provided to a considerable extent.

Further, according to the present invention, there is provided a storage circuit in which data indicating a position of the partial area in a screen is set, and a pulse generator for defining a timing for changing data stored in the storage circuit. It is characterized by. The data of the storage circuit (data of the display position, area, etc.) is changed at the timing specified by the pulse generator, and the display device can be driven based on this. Therefore, the display position and area can be freely changed according to the data of the storage circuit. You can change to a series.

Further, the pulse generator comprises a timer having a programmable timing interval, and data stored in the storage circuit is changed according to a pulse from the timer. The time interval at which the partial display is switched can be set freely according to the data set in the timer. Further, the invention is characterized in that the X driver of the display device has a built-in circuit for storing display data for one screen or more. By incorporating a display data storage circuit for one screen or more in the X driver,
In the case of a still image display, the number of times display data is transferred from the system to the display device can be significantly reduced, so that a display device with a partial display function with lower power consumption can be realized.

Further, the present invention is characterized in that the display device is a reflective or transflective liquid crystal display device. A liquid crystal display device that does not use a backlight has the lowest power consumption among display devices, and can be further reduced in power consumption by having a partial display function. Therefore, it is possible to provide the display with interestingness and originality while having the lowest power consumption.

According to the present invention, there is provided an electronic apparatus including any one of the above display devices. By doing so, it is possible to provide an electronic device that has an interesting and original display while maintaining low power consumption.

[0022]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a diagram showing an example of a partial display state in a display device of the present invention. Of the entire screen surrounded by the solid line, the inside D of the broken line is in the display state, and the outside of the broken line is in the non-display state, and the display is performed at certain time intervals from a to b, b to c, c to d, The switching is sequentially performed from d to e. The switching time interval may be constant or may be changed appropriately. In this embodiment, only the position is switched without changing the number of rows (the number of scanning lines) of the partial display area D. However, the number of display rows (the number of scanning lines) of the display area D and the number of the same in accordance with the switching of the display position. Display contents (display data contents supplied to the signal lines) may be simultaneously switched. In the embodiment, the display content (pattern) is switched so that the fish sequentially moves from the left side of the screen to the right side. Alternatively, the line at the end of the partial display region D may be fixed to a predetermined line, and the number of display lines or the display content may be simply changed. That is, the upper row end (the uppermost scanning line of D) of the broken line D may always be a fixed row, and the row of the lower row end (the lowermost scanning line of D) may be sequentially changed. For example, the partial display state as shown in FIGS. 2A, 2B, and 2C may be interrupted and displayed during the switching of the display. Of course, the lower line end is fixed,
The upper row end may be changed sequentially.

In the display panel of this embodiment, the entire screen is displayed when it is necessary. However, when the display panel is in a standby state, it is displayed in only a partial area of the display panel as shown in FIGS. Switch the position, number of lines, or display contents.

(Explanation of Circuit Configuration) Next, the configuration of a display device capable of performing partial display shown in the first embodiment and an example of circuit means will be described. FIG. 3 is a diagram showing a configuration example of the display device of the present invention.

Block 1 is a liquid crystal display panel (LCD panel) in which a substrate on which a plurality of scanning electrodes (scanning lines) are formed and a substrate on which a plurality of signal electrodes (signal lines) are formed are several μm.
The liquid crystal is sealed in the gap to form a display screen. A hatched portion D in the liquid crystal display panel 1 is a region where partial display is performed, and other regions are in a non-display state.

Here, the substrate is selected from members such as glass or plastic light-transmitting members and semiconductor substrates. The liquid crystal is selected from various liquid crystals such as a twisted nematic type, a super twisted nematic type, a memory type such as a ferroelectric type and a bistable nematic type, a polymer dispersed type, a homeotropically aligned and a homogeneously aligned type. As a structure of the liquid crystal display panel, in addition to the simple matrix type of the above structure, an active matrix type in which a two-terminal switching element and a pixel electrode connected thereto are formed on a substrate side on which a signal line is formed, or one of the substrates Alternatively, an active matrix type liquid crystal display panel may be used in which scanning lines and signal lines are formed in a matrix, and each pixel is formed with a transistor switched by the scanning line and a pixel electrode connected to the transistor.

In order to make use of the low power consumption in the partial display state, the display mode is a reflection type which does not require a light source for illumination such as a backlight, or can be displayed with the light source turned off under normal light. It is preferable to use a transflective type in which a light source is turned on and display is performed only when the image is dark or limited. In addition, outside the pair of substrates of the liquid crystal display panel,
A polarizing plate is arranged on the front side in the case of the reflection type, and on the front side and the back side in the case of the transmission type, as necessary according to the type of liquid crystal.

A block 4 is a Y driver for driving a plurality of scanning electrodes by applying a selection voltage or a non-selection voltage, and a block 5 is driven by applying a signal voltage corresponding to display contents (display data) to signal electrodes. X driver. The drive voltage forming circuit of the block 3 receives a supply of a power supply voltage from a power supply 6 described later to form a plurality of voltage levels necessary for driving the liquid crystal, and supplies the plurality of voltage levels to the X driver 5 and the Y driver 4. . Each driver selects a predetermined voltage level from the supplied voltage levels according to a timing signal and display data, and applies the selected voltage level to signal electrodes and scanning electrodes of the liquid crystal display panel 1. A block 2 is an LCD controller for forming timing signals CLY, FRM, CLX, LP, display data Dn, and a control signal PDY required for these circuits, and is connected to a system bus 11 of an electronic device including the present liquid crystal display device. Have been. A block 6 is a power supply which is provided outside the liquid crystal display device and supplies power to each circuit of the present liquid crystal display device. In this embodiment, the power supply voltage is 3 V. Fig. 4
5 and FIG.

Here, the controller 2 and the drive voltage forming circuit 3 are shown as independent circuit blocks. However, they may be incorporated in any one of the four or five driver IC chips. May be configured together with one driver into one chip. If the liquid crystal display panel 1 is an active matrix type liquid crystal display panel in which one substrate is a semiconductor substrate and the opposing substrate is a transparent substrate, the controller 2 and the drive voltage forming circuit 3 in addition to the X driver 5 and the Y driver 4 are also used. One chip can be formed on a semiconductor substrate.

FIG. 4 is a block diagram showing an example of a part of the controller 2 of FIG. The applicant of the present application has previously proposed a display device in which the partial display area D can be set in a software manner by setting the position and area of the partial display area in a register in the controller 2 (Japanese Patent Application No. 9-351024, and the like). 1
0-27665). Therefore, the proposed method employs the duty, drive voltage, bias ratio, X driver 5 and Y driver 4
Without changing the periods of the shift clocks CLX and CLY for the non-display area, unnecessary operations of not only the drivers 4 and 5 and the controller 2 but also the drive voltage forming circuit 3 are completely stopped during the non-display area access period. . In this case, the drive voltage forming circuit 3 is driven even if the operation is stopped for only about one frame period as in a charge pump circuit (a circuit that switches the series / parallel connection of a plurality of capacitors to boost the voltage level). It is necessary that the level can be maintained to some extent (voltage supply can be maintained by a capacitor). FIG. 4 shows a method in which a timer function is added based on the method proposed there, so that the contents of the register for setting the position of the partial display area D can be updated at certain time intervals.

Each block shown in FIG. 4 will be described. Reference numeral 7 denotes a circuit block of a pulse generator having a timer function, and specifically, a timer for counting a predetermined time and outputting a pulse to the register 8. For example, the screen scanning start signal FRM is counted for each frame period, and a signal of one pulse is output to the register 8, for example, about every two seconds. Since the timer comprises a presettable counter in which the time interval for counting can be arbitrarily set, the time interval for pulse output is preset by the counter in accordance with the data input through the bus 11. Note that the timer 7 does not periodically output a pulse signal, but gradually shortens or lengthens the cycle, or randomly changes the preset data of the presettable counter in a short period of time. The interval can be set freely.

Reference numeral 8 denotes a register as a storage circuit of about 8 bits having an addition function.
The information corresponding to the position and width of is initialized through the bus 11. For example, in the first to fifth bits, information corresponding to the display start row (uppermost scanning line number) of the partial display area D;
Information corresponding to the width of the partial display area D in the column direction is stored in the eighth bit. A total of 5 bits from the 1st to the 5th bit can set 32 partial display start row positions in the column direction,
According to the bit value, 32 scanning lines in the screen can be selectively assigned as a partial display start line. In addition, the width of the partial display in the column direction can be set to eight in a total of 3 bits of 6th to 8th bits, and the number of scanning lines to be set as the partial display area D is set according to the bit value from the eight types of scanning lines. it can. Here, the set value of the register 8 is not a value of the scanning line number or the number itself, but a value in units of several to several tens.

The set values of the 1st to 5th bits are updated by adding a predetermined value each time the above-mentioned pulse signal is sent from the timer 7, and the partial display area D is partially displayed with time as shown in FIG. The scanning line of the display start row in the area D is designated to be switched, and is sequentially shifted downward (in the column direction). Each time the above-mentioned pulse signal is sent from the timer 7, 6 to 8
If the set value of the bit is updated by adding a predetermined value, the display width (the number of display scanning lines) of the partial display area D in the column direction can be changed at the time interval of the pulse signal. It is possible. Alternatively, a display method may be used in which the bit data of the display start row is fixed without being updated, and only the bit data of the display width is added with a predetermined value according to the arrival of the pulse signal.

Also, unlike the method described above, the register 8
The first bit group (1st to 4th bits) indicating the scan line of the display start row of the partial display area D and the second bit group (5th to 8th bits) of the display end row (bottom scan line number) Is established,
The information of the starting row of the partial display and its display width is initially set to each bit via the bus 11, and the first bit group and / or the bit width corresponding to the time interval of the pulse signal input from the timer 7 are set.
Alternatively, a predetermined value corresponding to each of the second bit groups may be added and set, and the state of the partial display may be sequentially changed at the time intervals. As described above, only one of the first and second bit groups may be set to add a predetermined value according to the arrival of the pulse signal.

Further, in the above case, the addition is described in accordance with the pulse signal from the timer 7, but an operation other than the addition (subtraction, multiplication, division) may be performed. Further, information on whether or not to perform partial display may be set in a part of the register 8, and valid / invalid of the partial display function may be switched based on the setting. In addition, two or more registers may be provided in advance so that values corresponding to the start side row and the end side row of the partial display unit can be set in each of the registers. In addition, a plurality of registers are provided in advance, and different partial display areas D
Is set, the partial display area D can be set at a plurality of places in the display panel.

As described above, the register 8 and the timer 7 are controlled via the bus 11 by switching the setting contents of the register 8 and the output time interval of the pulse signal of the timer 7 by software on the system side of the electronic equipment. Accordingly, it is possible to cope with various partial display variations.

Reference numeral 9 denotes a circuit block for controlling the partial display, which is mainly constituted by a counter. The timing signal such as the screen scanning start signal FRM and the scanning signal transfer clock CLY for each one frame period sent from the system side and for each one scanning line selection period, and the position and width of the partial display area D set in the register 8 The timing signals CNT and PDY for controlling the partial display are formed based on the corresponding information values. CNT and PDY are constantly at the H level in full screen display, but are in the H level during the partial display row selection period and at the L level during the non-display row selection period in the partial display state. .

10 is a signal Dn, CL to the X driver 5
This is an AND circuit block for controlling X and LP. Dn is display data, CLX is a display data transfer clock, L
P is a clock for latching the transferred display data to the X driver for each row. DnI, CLXI, L
PI is a signal on which these signals are based. In the case of full-screen display, since CNT is constantly at the H level, the AND circuit is opened and sent out to the X driver as Dn, CLX, LP as they are. In the partial display state, CNT is at the H level during the data transfer of the row to be partially displayed, but is at the L level during the other periods, and Dn, CLX, LP
Is fixed to L level to stop unnecessary data transfer. The partial display function itself is possible without pausing the data transfer as described later, but the relatively high-speed operation of the data transfer consumes a relatively large amount of power. It is preferable in terms of power reduction. In the figure, for simplicity, Dn is connected to only one line, that is, 1 line.
Although shown as bit serial transfer, display data may be transferred in common with the bus 11, for example, in 8-bit parallel.

FIG. 5 is an example of a timing chart showing the operation of the circuit block of FIG. The display panel is based on a simple matrix system of line-sequential driving in which scanning electrodes (scanning lines) are sequentially selected line by line.
As a line. This is an example of a case where the entire screen is displayed before time t1, and a partial display state in which the first to 40th lines are displayed in one frame period after t1.

In the partial display state, PDY is at the H level during the period T in which the row to be partially displayed is selected, and the scanning electrodes are sequentially and individually selected or simultaneously selected in units of plural lines. (The selection voltage is applied during the selection period). On the other hand, PDY is at the L level during a period corresponding to the selection period of the non-display row (the scanning electrode in the non-display area). When PDY goes to L level, all the outputs of the Y driver 4 are at the non-selection voltage level. As a result, the selection voltage is not applied to the scan electrodes in the non-display row during one frame period. Is hidden. In this way, the partial display function itself becomes possible only by stopping the application of the selection voltage to the non-display rows, and the power consumption is considerably reduced. However, it is preferable to stop the operation of the drive voltage forming circuit 3 while PDY is at the L level from the viewpoint of power consumption reduction.

In the case of a dot matrix type display panel (including a passive matrix and an active matrix), X
The driver 5 transfers the display data of the next selected row to the storage circuit (SRAM or shift register) of the X driver while outputting the drive voltage corresponding to the display of the selected row. There is a need to do. Therefore CNT
Is a signal that precedes PDY by one horizontal scanning period. In the case of FIG. 5, while the PDY is at the L level, the X driver 5 holds the display data of the 40th row in the storage circuit of the X driver and continuously outputs the drive voltage of the 40th row. However, no display is made during this period because no selection voltage is applied to the scanning electrodes.

When the display panel is of the active matrix type, each pixel keeps holding the voltage applied during the previous selection period by the capacitance during the non-selection period. For this reason, when the display position or the display area (display width) of the partial display area D is switched in the partial display state from the full screen display state to the partial display state, only the first one frame period is not displayed. The selection voltage is also applied to the scanning lines of
It is necessary to write an off-voltage to a pixel via a signal line. Therefore, FIGS. 4 and 5 require some modifications. For example, in FIG. 5, 1 arriving immediately after t1
During the frame period, PDY is at the H level for one frame period, the scanning line in the non-display region is also selected, and the off-voltage is written from the X driver to the pixels in the non-display region. During the selection period of the level and non-display area, PDY is at the L level.

The above is the description of the circuit example for realizing the partial display function. Since the cycle of the scanning signal transfer clock CLY is not changed even in the partial display state, the time for applying the selection voltage to each scanning line in the display area is the same as in the full screen display. Therefore, there is no need to change the bias ratio or the selection voltage. It is preferable that the CLY be stopped where possible, but it is not necessary to stop the CLY because the CLY can be partially displayed without stopping and has little effect on power consumption.

In the above-mentioned example, the description has been made as to the simple matrix system of line-sequential driving in which the scanning electrodes are sequentially selected line by line. However, a driving system (multi-line) in which a plurality of lines are simultaneously selected and a plurality of lines are sequentially selected. The present invention is also applicable to the case of a driving method called addressing or the like).

In the case of a relatively small liquid crystal display device having 100 or less display rows, the X driver 5 used therein is one.
Display data storage circuit for the screen (hereinafter referred to as display data RAM
In many cases). Also in the case of the present invention, it is preferable to incorporate a display data RAM for one screen or more in the X driver 5 from the viewpoint of power consumption reduction. This is because when the screen is in a still image state, it is possible to continue displaying even if the main part of the system bus or the controller is stopped. The display device generally rewrites or refreshes the screen at a frame frequency of about 60 Hz. For example, when the display pattern of the partial display is switched every two seconds as shown in FIG. 1, if the X driver 5 has a built-in display data RAM, the display data is transferred to the display data RAM of the X driver 5. The operation is
While only the first frame of about 120 frames (corresponding to 2 seconds) that repeats the same screen display needs to be performed,
If the X driver does not include the display data RAM, the same display data transfer operation needs to be repeated in all frames. Since the display data transfer frequency is as high as about several MHz, the halt of the display data transfer operation is very effective in reducing power consumption.

In particular, if the X driver 5 incorporates a display data RAM and the controller 2 incorporates an oscillating circuit serving as a time standard, the display from the system side to the display device is made only for the first one frame period when shifting to the partial display state. By simply transferring the data, the display as shown in FIG. 1 can be continued without receiving any supply of display data or clock signal from the system. For example, the number of displayable lines (effective display scanning lines) of the display panel of FIG. 1 is set to 200, the number of display lines (the number of scanning lines) in the partial display state is set to 40, and the first one frame period when the display panel is shifted to the partial display state is illustrated. If the patterns 1a to 1e are written in the display data RAM in the X driver 5, the first 2 seconds after the transition to the partial display state are performed as shown in FIG.
Only the 0th line is displayed, and for the next 2 seconds, 41 lines are displayed as shown in FIG.
By displaying only the 80th line, the display as shown in FIG. 1 can be continued on the display device side alone. Since the number of times display data is transferred from the system to the display device can be significantly reduced, a display device with a partial display function with lower power consumption can be realized. If the display data RAM for two screens is built in the X driver 5, more complicated partial display can be performed.

In the present invention described above, the liquid crystal display device
A reflective or transflective liquid crystal display device is preferable. In a liquid crystal display device that does not use a light source for illumination of a display panel such as a backlight, a liquid crystal drive electrode formed on the inner surface of the substrate of the liquid crystal panel is a reflective electrode, or a reflective plate is disposed on the back side of the substrate of the liquid crystal panel. With this configuration, a reflection type liquid crystal display device can be obtained. This is the lowest power consumption among the display devices, and it is possible to further reduce the power consumption by providing such a display device with a partial display function. In addition, a light source for illumination, such as a backlight, is arranged on the back side of the liquid crystal display panel. When the light source is used, it is displayed as a transmissive liquid crystal display panel, and when the light source is not used, it functions as a reflective liquid crystal display device. The device (a semi-transmissive film or a reflective polarizer that transmits one linearly polarized light and reflects the other linearly polarized light toward the light source) between the light source and the liquid crystal display panel may be used. By providing such a display device with a partial display function, power consumption can be further reduced.

Therefore, it is possible to provide the display with an interestingness and originality in addition to the lowest power consumption.

The display panel is not limited to a liquid crystal device as described above, but may be a dot matrix type display panel such as a plasma display, a field emission device, an electroluminescent (EL) device, a light emitting diode, and the like. For example, the present invention can be applied.

(Embodiment 2) FIG. 6 is a view showing the appearance of an electronic apparatus according to the present invention. A portable information device that uses a battery as a power source. Reference numeral 21 denotes a dot matrix type display panel, which is in a full screen display state as shown in the figure when necessary, but is in a partial display state in which the display position moves at a certain time interval as shown in FIG.

FIG. 7 is an example of a partial circuit block diagram of an electronic apparatus according to the present invention. 22 is a μ for controlling the entire electronic device.
A PU (microprocessor unit), 23 is a memory for storing various programs, information, display data, and the like, 24 is a display device, and 25 is a quartz oscillator serving as a time standard source. Reference numerals 22 to 24 are connected via the system bus 11 and are powered by 26 batteries.

Here, by using the display device of the above-described embodiment as the display device 24, it is possible to reduce the power consumption during standby of the entire electronic device and to make the partial display screen interesting and original. Can be. Note that the display device of the electronic device uses a battery as a power supply, so that a reflective display device,
Alternatively, a transflective display device that has a backlight illumination light source of a display device but transmits light when not using the light source and transmits light when the light source is used to reduce the power consumption. This is preferable because the battery life can be extended. Furthermore, in the electronic device of the present invention, when the device is not operated and in a standby state after a certain period of time has elapsed, the display device is in a partial display state, and the display device is driven by the driver or controller shown in FIG. Since the power consumption is suppressed, the battery life can be further extended.

[0054]

According to the present invention, by changing the position and area of the partial display area or the display content at certain time intervals, the screen in the partial display state can be rendered interesting and original while maintaining low power consumption. Can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram showing a partial display state in a display device of the present invention.

FIG. 2 is a diagram showing another partial display state in the display device of the present invention.

FIG. 3 is a diagram illustrating a configuration example of a display device of the present invention.

FIG. 4 is a partial block diagram of a controller in FIG. 3;

FIG. 5 is a timing chart showing the operation of the circuit block of FIG. 4;

FIG. 6 is a diagram illustrating an appearance of an electronic device of the invention.

FIG. 7 is a partial circuit block diagram of the electronic apparatus of the present invention.

FIG. 8 is a diagram showing a configuration example of a conventional liquid crystal display device having a partial display function.

[Description of Signs] 1,31 Liquid crystal display panel 2,32 LCD controller 3,33 Drive voltage generator 4,34 Scan driver (Y driver) 5,35 Signal electrode driver (X 6, 26, 36 ... power supply 7 ... timer 8 ... register 9 ... partial display control signal forming unit 10 ... AND circuit unit 11 ... system bus 21 ... display panel 22 ... μPU 23 ... memory 24 ... display device 25 ... crystal vibration Child 37 ... Scan control circuit D, D1, D2 ... Partial display area FRM ... Screen scan start signal CLY ... Scan signal transfer clock DnI, Dn ... Display data CLXI, CLX ... Data transfer clock LPI, LP ... Data latch signal CNT , PDY, PD ... control signal for partial display

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04Q 7/38 H04B 7/26 109T F term (Reference) 2H093 NA33 NC04 NC28 ND34 ND39 NF04 NF05 NF11 NF13 NF19 5C006 AA02 AC13 AC28 AF31 AF44 AF51 AF53 AF61 AF71 BB12 BB16 BB17 BB28 BB29 BC03 BC11 BF01 BF02 BF22 BF26 BF28 BF29 BF37 BF45 BF46 EA01 FA05 FA47 5C080 AA10 BB05 DD26 EE17 EE26 EE32 FF09 JJ02 FF09 JJ02 FF02

Claims (8)

[Claims] 1. A method of driving a matrix type display device having a function of setting a partial area in a screen to a display state and setting another area to a non-display state, wherein the position and area of the partial area to be displayed are set. Alternatively, a method for driving a display device, wherein at least one of display contents is changed at an arbitrary time interval. 2. The method according to claim 1, wherein the partial area is an area corresponding to a part of all the scanning lines. 3. A display device driven based on the display device driving method according to claim 1. 4. The display device according to claim 3, wherein a storage circuit in which data indicating a position of the partial area on the screen is set, and a timing for changing data stored in the storage circuit. A display device comprising a pulse generator. 5. The display device according to claim 4, wherein the pulse generator comprises a timer having a programmable timing interval, and the data stored in the storage circuit is changed according to a pulse from the timer. A display device, comprising: 6. The display device according to claim 3, wherein the driver IC for driving the signal lines includes a circuit for storing display data for one screen or more. How to drive the device. 7. The display device according to claim 3, wherein the display device is a reflective or transflective liquid crystal display device. 8. An electronic apparatus comprising the display device according to claim 3.